Re: [PATCH 39/52] i386: New hook implementation ix86_c_mode_for_floating_type

On Mon, Jun 3, 2024 at 5:02 AM Kewen Lin wrote: > > This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE > defines in i386 port, and add new port specific hook > implementation ix86_c_mode_for_floating_type. > > gcc/ChangeLog: > > * config/i386/i386.cc (ix86_c_mode_for_floating_type):

Re: [PATCH] [x86] Add some preference for floating point rtl ifcvt when sse4.1 is not available

On Mon, Jun 3, 2024 at 5:11 AM liuhongt wrote: > > W/o TARGET_SSE4_1, it takes 3 instructions (pand, pandn and por) for > movdfcc/movsfcc, and could possibly fail cost comparison. Increase > branch cost could hurt performance for other modes, so specially add > some preference for floating point i

[patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30 (was: Re: nvptx target: Global constructor, destructor support, via nvptx-tools 'ld')

Thomas Schwinge wrote: In the following, I have then reconsidered that stance; we may actually "Implement global constructor, destructor support in a conceptually simpler way than using 'collect2' (the program): implement the respective functionality in the nvptx-tools 'ld'". The latter is

[nvptx] *ping* - [patch] [gcn][nvptx] Add warning to mkoffload for 32bit host code

Hi Thomas, hi Tom, any comment regarding this patch? https://gcc.gnu.org/pipermail/gcc-patches/2024-April/650007.html Tobias Am 25.04.24 um 12:51 schrieb Tobias Burnus: Motivated by a surprise of a colleague that with -m32, no offload dumps were created; that's because mkoffload does not proc

[PATCH] pair-fusion: fix for older GCC

Older GCCs fail with: .../gcc/pair-fusion.cc: In member function ‘bool pair_fusion_bb_info::fuse_pair(bool, unsigned int, int, rtl_ssa::insn_info*, rtl_ssa::in sn_info*, base_cand&, const rtl_ssa::insn_range_info&)’: .../gcc/pair-fusion.cc:1790:40: error: ‘writeback’ is not a class, namesp

Re: [Patch, aarch64, middle-end\ v4: Move pair_fusion pass from aarch64 to middle-end

Richard Sandiford writes: > Marc Poulhiès writes: >> Hello, >> >> I can't bootstrap using gcc 5.5 since this change. It fails with: >> >> .../gcc/pair-fusion.cc: In member function ‘bool >> pair_fusion_bb_info::fuse_pair(bool, unsigned int, int, rtl_ssa::insn_info*, >> rtl_ssa::in >> sn_info*,

Re: [PATCH] pair-fusion: fix for older GCC

Marc Poulhiès writes: > Older GCCs fail with: > > .../gcc/pair-fusion.cc: In member function ‘bool > pair_fusion_bb_info::fuse_pair(bool, unsigned int, int, rtl_ssa::insn_info*, > rtl_ssa::in > sn_info*, base_cand&, const rtl_ssa::insn_range_info&)’: > .../gcc/pair-fusion.cc:1790:40: error

[wwwdocs] gcc-15/changes.html (nvptx): Constructors are now supported

Comments or fine as is? Tobias gcc-15/changes.html (nvptx): Constructors are now supported diff --git a/htdocs/gcc-15/changes.html b/htdocs/gcc-15/changes.html index b59fd3be..b3305079 100644 --- a/htdocs/gcc-15/changes.html +++ b/htdocs/gcc-15/changes.html @@ -85,7 +103,14 @@ a work-in-progress

Re: [patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30 (was: Re: nvptx target: Global constructor, destructor support, via nvptx-tools 'ld')

On Mon, 3 Jun 2024, Tobias Burnus wrote: > Thomas Schwinge wrote: > > In the following, I have then reconsidered that stance; we may actually > > "Implement global constructor, destructor support in a conceptually > > simpler way than using 'collect2' (the program): implement the respective > > fu

RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float.

> -Original Message- > From: Richard Biener > Sent: Friday, May 31, 2024 8:41 PM > To: Hu, Lin1 > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, > float > -> float and int <-> float. > > On

Re: [patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30

Richard Biener wrote: On Mon, 3 Jun 2024, Tobias Burnus wrote: Thomas Schwinge wrote: In the following, I have then reconsidered that stance; we may actually "Implement global constructor, destructor support in a conceptually simpler way than using 'collect2' (the program): implement the respec

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Ajit Agarwal writes: > Hello Richard: > On 31/05/24 8:08 pm, Richard Sandiford wrote: >> Ajit Agarwal writes: >>> On 31/05/24 3:23 pm, Richard Sandiford wrote: Ajit Agarwal writes: > Hello All: > > Common infrastructure using generic code for pair mem fusion of different > t

[COMMITTED] testsuite: Require vect_shift in gcc.dg/vect/pr112325.c [PR115303]

The new gcc.dg/vect/pr112325.c test FAILs on Solaris/SPARC: FAIL: gcc.dg/vect/pr112325.c -flto -ffat-lto-objects scan-tree-dump-times vect "vectorized 1 loops" 1 FAIL: gcc.dg/vect/pr112325.c scan-tree-dump-times vect "vectorized 1 loops" 1 As analyzed in the PR, the test requires vect_shift, so

Re: [PATCH 02/52] d: Replace use of LONG_DOUBLE_TYPE_SIZE

Excerpts from Kewen Lin's message of Juni 3, 2024 5:00 am: > Joseph pointed out "floating types should have their mode, > not a poorly defined precision value" in the discussion[1], > as he and Richi suggested, the existing macros > {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE will be replaced with a > hook mo

Re: [PATCH 01/52] ada: Replace use of LONG_DOUBLE_TYPE_SIZE

> Joseph pointed out "floating types should have their mode, > not a poorly defined precision value" in the discussion[1], > as he and Richi suggested, the existing macros > {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE will be replaced with a > hook mode_for_floating_type. To be prepared for that, this > patc

Re: [PATCH 02/52] d: Replace use of LONG_DOUBLE_TYPE_SIZE

Hi Iain, on 2024/6/3 16:40, Iain Buclaw wrote: > Excerpts from Kewen Lin's message of Juni 3, 2024 5:00 am: >> Joseph pointed out "floating types should have their mode, >> not a poorly defined precision value" in the discussion[1], >> as he and Richi suggested, the existing macros >> {FLOAT,{,LON

Re: [PATCH 51/52] sparc: New hook implementation sparc_c_mode_for_floating_type

> * config/sparc/sparc.cc (sparc_c_mode_for_floating_type): New > (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro. > (FLOAT_TYPE_SIZE): Remove. > (DOUBLE_TYPE_SIZE): Likewise. > (LONG_DOUBLE_TYPE_SIZE): Rename to ... > (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this. >

RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float.

On Mon, 3 Jun 2024, Hu, Lin1 wrote: > > -Original Message- > > From: Richard Biener > > Sent: Friday, May 31, 2024 8:41 PM > > To: Hu, Lin1 > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > > ubiz...@gmail.com > > Subject: RE: [PATCH 1/3] vect: generate suitable convert insn for int ->

Re: [patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30

On Mon, 3 Jun 2024, Tobias Burnus wrote: > Richard Biener wrote: > > On Mon, 3 Jun 2024, Tobias Burnus wrote: > >> Thomas Schwinge wrote: > >>> In the following, I have then reconsidered that stance; we may actually > >>> "Implement global constructor, destructor support in a conceptually > >>> si

Re: [PATCH 17/52] gcn: Remove macros {FLOAT, DOUBLE, LONG_DOUBLE}_TYPE_SIZE

On 03/06/2024 04:01, Kewen Lin wrote: This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in gcn port. gcc/ChangeLog: * config/gcn/gcn.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Assuming that this does n

[PATCH] Implement wrap-around arithmetics in DWARF expressions

Hi, for the attached Ada package declaring a simple variable-sized record type, the compiler builds a "size function" in GENERIC which is at -Og: sizetype _GLOBAL.SZ5_p (p__enum p0) { return (UNSIGNED_8) p0 + 252 <= 3 ? 32 : 0; } The UNSIGNED_8-based trick eliminates one branch but relies on

Re: [PATCH] pair-fusion: fix for older GCC

Richard Sandiford writes: > Marc Poulhiès writes: >> Older GCCs fail with: >> >> .../gcc/pair-fusion.cc: In member function ‘bool >> pair_fusion_bb_info::fuse_pair(bool, unsigned int, int, rtl_ssa::insn_info*, >> rtl_ssa::in >> sn_info*, base_cand&, const rtl_ssa::insn_range_info&)’: >>

RE: [PATCH] aarch64: Support multiple variants including up to 3

> -Original Message- > From: Andrew Pinski (QUIC) > Sent: Saturday, May 4, 2024 2:03 AM > To: gcc-patches@gcc.gnu.org > Cc: Andrew Pinski (QUIC) > Subject: [PATCH] aarch64: Support multiple variants including > up to 3 > > On some of the Qualcomm's SoC that includes oryon-1 core, > the v

RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float.

> -Original Message- > From: Richard Biener > Sent: Monday, June 3, 2024 5:03 PM > To: Hu, Lin1 > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > ubiz...@gmail.com > Subject: RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, > float > -> float and int <-> float. > > On

RE: [PATCH 1/3] vect: generate suitable convert insn for int -> int, float -> float and int <-> float.

On Mon, 3 Jun 2024, Hu, Lin1 wrote: > > -Original Message- > > From: Richard Biener > > Sent: Monday, June 3, 2024 5:03 PM > > To: Hu, Lin1 > > Cc: gcc-patches@gcc.gnu.org; Liu, Hongtao ; > > ubiz...@gmail.com > > Subject: RE: [PATCH 1/3] vect: generate suitable convert insn for int ->

[PATCH] aarch64: adjust enum writeback after rename

gcc/ChangeLog: * config/aarch64/aarch64-ldp-fusion.cc (struct aarch64_pair_fusion): Use new type name. --- My previous change fixed the generic code, but I forgot to adjust the overload in aarch64. I don't have an aarch64 setup to check it fixes the build, but will set it up lat

Re: [PATCH 09/52] Replace {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE with new hook mode_for_floating_type

Hi Richi, on 2024/6/3 14:49, Richard Biener wrote: > On Mon, Jun 3, 2024 at 5:02 AM Kewen Lin wrote: >> >> Currently how we determine which mode will be used for a >> floating point type is that for a given type precision >> (size) call mode_for_size to get the first mode which has >> this size i

Re: [PATCH 51/52] sparc: New hook implementation sparc_c_mode_for_floating_type

Hi Eric, on 2024/6/3 17:02, Eric Botcazou wrote: >> * config/sparc/sparc.cc (sparc_c_mode_for_floating_type): New >> (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro. >> (FLOAT_TYPE_SIZE): Remove. >> (DOUBLE_TYPE_SIZE): Likewise. >> (LONG_DOUBLE_TYPE_SIZE): Rename to ... >>

Re: [PATCH] aarch64: adjust enum writeback after rename

Marc Poulhiès writes: > gcc/ChangeLog: > > * config/aarch64/aarch64-ldp-fusion.cc (struct aarch64_pair_fusion): > Use new type name. > --- > My previous change fixed the generic code, but I forgot to adjust the > overload in aarch64. > > I don't have an aarch64 setup to check it fixes

Re: [PATCH] aarch64: adjust enum writeback after rename

Richard Sandiford writes: > Marc Poulhiès writes: >> gcc/ChangeLog: >> >> * config/aarch64/aarch64-ldp-fusion.cc (struct aarch64_pair_fusion): >> Use new type name. >> --- >> My previous change fixed the generic code, but I forgot to adjust the >> overload in aarch64. >> >> I don't ha

Re: [PATCH 17/52] gcn: Remove macros {FLOAT, DOUBLE, LONG_DOUBLE}_TYPE_SIZE

Hi Andrew, on 2024/6/3 17:14, Andrew Stubbs wrote: > On 03/06/2024 04:01, Kewen Lin wrote: >> This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE >> defines in gcn port. >> >> gcc/ChangeLog: >> >> * config/gcn/gcn.h (FLOAT_TYPE_SIZE): Remove. >> (DOUBLE_TYPE_SIZE): Likewise. >> (

[PATCH 1/2][final] Avoid inserting after a GIMPLE_COND with SLP and early break

When vectorizing an early break loop with LENs (do we miss some check here to disallow this?) we can end up deciding to insert stmts after a GIMPLE_COND when doing SLP scheduling and trying to be conservative with placing of stmts only dependent on the implicit loop mask/len. The following avoids

[PATCH 2/2][final] RISC-V: Do single-lane SLP discovery for reductions

The following performs single-lane SLP discovery for reductions. It requires a fixup for outer loop vectorization where a check for multiple types needs adjustments as otherwise bogus pointer IV increments happen when there are multiple copies of vector stmts in the inner loop. For the reduction e

Re: [PATCH 17/52] gcn: Remove macros {FLOAT, DOUBLE, LONG_DOUBLE}_TYPE_SIZE

On Mon, Jun 03, 2024 at 05:41:11PM +0800, Kewen.Lin wrote: > > GCN does have some partially implemented support for HFmode ... do I need > > to do something new for that to work? > > For this hook, no, as it's mainly for float, double and long double types (C > language supported non decimal flo

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

* Jonathan Wakely: > +/** Stop the program with a breakpoint or debug trap. > + * > + * The details of how a breakpoint is implemented are platform-specific. > + * Some systems provide a special instruction, such as `int3` in x86. > + * When no more appropriate mechanism is available, this will st

Re: [patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30

Richard Biener wrote: install.texi also has the issue that it's not pre-packaged in a easy to discover and readable file in the release tarballs and that the online version is only for trunk. I always wondered why it is not included at https://gcc.gnu.org/onlinedocs/ — it would then also be li

Re: [PATCH] regenerate-opt-urls.py: fix transposed values for "vax" and "v850"

On Tue, 28 May 2024, David Malcolm wrote: > I've pushed this to gcc trunk as r15-872-g7cc529fe514cc6 (having > bootstrapped and lightly tested it on x86_64-pc-linux-gnu) Thank you for fixing this up. Is this a new requirement now for .opt file changes? Why does it have to be called by hand th

Re: [PATCH 36/52] aarch64: New hook implementation aarch64_c_mode_for_floating_type

Kewen Lin writes: > This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE > defines in aarch64 port, and add new port specific hook > implementation aarch64_c_mode_for_floating_type. > > gcc/ChangeLog: > > * config/aarch64/aarch64.cc (aarch64_c_mode_for_floating_type): > New functi

[committed] install.texi (gcn): Fix date of recommended newlib version

Somehow, I was one year ahead. The commit wasn't 2025-03-25 but in 2024. Committed as obvious, also to avoid future confusions. Tobias commit 16fb3abf0fb4b88ee0e27732db217909fa429a81 Author: Tobias Burnus Date: Mon Jun 3 12:56:39 2024 +0200 install.texi (gcn): Fix date of recommended new

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Hello Richard: On 03/06/24 2:07 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >> Hello Richard: >> On 31/05/24 8:08 pm, Richard Sandiford wrote: >>> Ajit Agarwal writes: On 31/05/24 3:23 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >> Hello All: >> >> Common in

Re: [PATCH] Implement wrap-around arithmetics in DWARF expressions

On Mon, Jun 3, 2024 at 11:18 AM Eric Botcazou wrote: > > Hi, > > for the attached Ada package declaring a simple variable-sized record type, > the compiler builds a "size function" in GENERIC which is at -Og: > > sizetype _GLOBAL.SZ5_p (p__enum p0) > { > return (UNSIGNED_8) p0 + 252 <= 3 ? 32 :

Re: [patch] install.texi (nvptx): Recommend nvptx-tools 2024-05-30

On Mon, 3 Jun 2024, Tobias Burnus wrote: > Richard Biener wrote: > > install.texi also has the issue that it's not pre-packaged in a > > easy to discover and readable file in the release tarballs and that > > the online version is only for trunk. > > I always wondered why it is not included at ht

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

On Mon, Jun 3, 2024 at 12:20 PM Florian Weimer wrote: > Would it make sense to have a special function symbol for this, on which > the debugger sets the breakpoint? […] Jon and I discussed more details off-list. Hopefully a more complete version is coming soon-ish.

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Ajit Agarwal writes: >> [...] >> If it is intentional, what distinguishes things like vperm and xxinsertw >> (and all other unspecs) from plain addition? >> >> [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") >> (plus:VSX_F (match_operand:VSX_F 1 "vsx_register_operand" "wa") >

[PING] [PATCH v4 2/3] [RFC] ifcvt: Allow more operations in multiple set if conversion

Currently the operations allowed for if conversion of a basic block with multiple sets are few, namely REG, SUBREG and CONST_INT (as controlled by bb_ok_for_noce_convert_multiple_sets). This commit allows more operations (arithmetic, compare, etc) to participate in if conversion. The target's prof

[PING] [PATCH v4 0/3] ifcvt: Allow if conversion of arithmetic in basic blocks with multiple sets

noce_convert_multiple_sets has been introduced and extended over time to handle if conversion for blocks with multiple sets. Currently this is focused on register moves and rejects any sort of arithmetic operations. This series is an extension to allow more sequences to take part in if conversio

[PING] [PATCH v4 1/3] [RFC] ifcvt: handle sequences that clobber flags in noce_convert_multiple_sets

This is an extension of what was done in PR106590. Currently if a sequence generated in noce_convert_multiple_sets clobbers the condition rtx (cc_cmp or rev_cc_cmp) then only seq1 is used afterwards (sequences that emit the comparison itself). Since this applies only from the next iteration it ass

[PING] [PATCH v4 3/3] [RFC] ifcvt: Handle multiple rewired regs and refactor noce_convert_multiple_sets

The existing implementation of need_cmov_or_rewire and noce_convert_multiple_sets_1 assumes that sets are either REG or SUBREG. This commit enchances them so they can handle/rewire arbitrary set statements. To do that a new helper struct noce_multiple_sets_info is introduced which is used by noce_

Re: [PATCH 14/52] fr30: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in fr30 port. gcc/ChangeLog: * config/fr30/fr30.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH] ifcvt: Clarify if_info.original_cost.

Robin Dapp writes: > Hi, > > before noce_find_if_block processes a block it sets up an if_info > structure that holds the original costs. At that point the costs of > the then/else blocks have not been added so we only care about the > "if" cost. > > The code originally used BRANCH_COST for that

[r14-10271 Regression] FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors) on Linux/x86_64

On Linux/x86_64, 97474ba2075dc3c397bbc2861646561dcfd13386 is the first bad commit commit 97474ba2075dc3c397bbc2861646561dcfd13386 Author: Haochen Jiang Date: Mon May 20 15:52:32 2024 +0800 Add AVX10.1 target_clones support caused FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors

Re: [PATCH 06/52] m2: Replace uses of {FLOAT, {, LONG_}DOUBLE}_TYPE_SIZE

Kewen Lin writes: > Joseph pointed out "floating types should have their mode, > not a poorly defined precision value" in the discussion[1], > as he and Richi suggested, the existing macros > {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE will be replaced with a > hook mode_for_floating_type. To be prepared f

[PATCH] testsuite/115304 - properly guard gcc.dg/vect/slp-gap-1.c

Testing on sparc shows we need vect_unpack and vect_perm. This isn't enough to resolve the GCN fail which ends up using interleaving. Tested on x86_64-linux and sparc-solaris. PR testsuite/115304 * gcc.dg/vect/slp-gap-1.c: Require vect_unpack and vect_perm. --- gcc/testsuite/gcc

[COMMITTED] Remove value_range typedef.

Now that pointers and integers have been disambiguated from irange, and all the pointer range temporaries use prange, we can reclaim value_range as a general purpose range container. This patch removes the typedef, in favor of int_range_max, thus providing slightly better ranges in places. I have

[r15-984 Regression] FAIL: gcc.target/i386/pr86722.c scan-assembler-times (?n)(?:andnpd|andpd) 1 on Linux/x86_64

On Linux/x86_64, ac306de7d5100d3682eae2270995a9abbe19db38 is the first bad commit commit ac306de7d5100d3682eae2270995a9abbe19db38 Author: liuhongt Date: Fri May 31 14:38:07 2024 +0800 Add some preference for floating point rtl ifcvt when sse4.1 is not available caused FAIL: gcc.target/i

Re: [PATCH 15/52] frv: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in frv port. gcc/ChangeLog: * config/frv/frv.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH 18/52] iq2000: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in iq2000 port. gcc/ChangeLog: * config/iq2000/iq2000.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH 20/52] m32c: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in m32c port. gcc/ChangeLog: * config/m32c/m32c.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH 21/52] m32r: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in m32r port. gcc/ChangeLog: * config/m32r/m32r.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

On 2024-06-01 03:22, Jonathan Wakely wrote: Here's an implementation of the C++26 header. We should really have some tests that invoke GDB and check that the breakpoint works when a debugger is attached. That seems tricky to do via the main conformance.exp testsuite. It could be done via the pr

Re: [PATCH 25/52] msp430: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in msp430 port. gcc/ChangeLog: * config/msp430/msp430.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nick

Re: [PATCH 32/52] stormy16: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in stormy16 port. gcc/ChangeLog: * config/stormy16/stormy16.h (FLOAT_TYPE_SIZE): Remove. (DOUBLE_TYPE_SIZE): Likewise. (LONG_DOUBLE_TYPE_SIZE): Likewise. Approved - please apply. Cheers Nic

Re: [PATCH 43/52] rx: New hook implementation rx_c_mode_for_floating_type

Hi Kewen, This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE defines in rx port, and add new port specific hook implementation rx_c_mode_for_floating_type. gcc/ChangeLog: * config/rx/rx.cc (rx_c_mode_for_floating_type): New function. (TARGET_C_MODE_FOR_FLOATING_TYPE): Ne

[PATCH] Arm: Fix ldrd offset range [PR115153]

The valid offset range of LDRD in arm_legitimate_index_p is increased to -1024..1020 if NEON is enabled since VALID_NEON_DREG_MODE includes DImode. Fix this by moving the LDRD check earlier. Passes bootstrap & regress, OK for commit? gcc: PR target/115153 * config/arm/arm.cc (arm

[PATCH] Arm: Fix disassembly error in Thumb-1 relaxed load/store [PR115188]

A Thumb-1 memory operand allows single-register LDMIA/STMIA. This doesn't get printed as LDR/STR with writeback in unified syntax, resulting in strange assembler errors if writeback is selected. To work around this, use the 'Uw' constraint that blocks writeback. Passes bootstrap & regress, OK for

[PATCH] s390: testsuite: Fix nobp-table-jump-*.c

Starting with r14-5628-g53ba8d669550d3 interprocedural VRP became strong enough in order to render these tests useless. Fixed by disabling IPA. gcc/testsuite/ChangeLog: * gcc.target/s390/nobp-table-jump-inline-z10.c: Do not perform IPA. * gcc.target/s390/nobp-table-jump-i

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Hello Richard: On 03/06/24 5:03 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >>> [...] >>> If it is intentional, what distinguishes things like vperm and xxinsertw >>> (and all other unspecs) from plain addition? >>> >>> [(set (match_operand:VSX_F 0 "vsx_register_operand" "=wa") >>>

[committed] i386: Force operand 1 of bswapsi2 to a register for !TARGET_BSWAP [PR115321]

PR target/115321 gcc/ChangeLog: * config/i386/i386.md (bswapsi2): Force operand 1 to a register also for !TARGET_BSWAP. gcc/testsuite/ChangeLog: * gcc.target/i386/pr115321.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,m32}. Uros. diff --git a/gcc/config

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Ajit Agarwal writes: > On 03/06/24 5:03 pm, Richard Sandiford wrote: >> Ajit Agarwal writes: [...] If it is intentional, what distinguishes things like vperm and xxinsertw (and all other unspecs) from plain addition? [(set (match_operand:VSX_F 0 "vsx_register_operand" "

Re: [PATCH] Arm: Fix disassembly error in Thumb-1 relaxed load/store [PR115188]

Hi Wilco, On 6/3/24 15:42, Wilco Dijkstra wrote: A Thumb-1 memory operand allows single-register LDMIA/STMIA. This doesn't get printed as LDR/STR with writeback in unified syntax, resulting in strange assembler errors if writeback is selected. To work around this, use the 'Uw' constraint that

[r15-983 Regression] FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors) on Linux/x86_64

On Linux/x86_64, 1f2ca510065a2033bac408eb5a960ef0126f25cc is the first bad commit commit 1f2ca510065a2033bac408eb5a960ef0126f25cc Author: Haochen Jiang Date: Mon May 20 15:52:32 2024 +0800 Add AVX10.1 target_clones support caused FAIL: gcc.target/i386/avx10_1-25.c (test for excess errors

Re: [RFC][PATCH] PR tree-optimization/109071 - -Warray-bounds false positive warnings due to code duplication from jump threading

> On Jun 3, 2024, at 02:29, Richard Biener wrote: > > On Fri, May 31, 2024 at 11:23 PM Qing Zhao wrote: >> >> >> >>> On May 23, 2024, at 07:46, Richard Biener >>> wrote: >>> >>> On Wed, May 22, 2024 at 8:53 PM Qing Zhao wrote: > On May 22, 2024, at 03:38, Richard B

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Hello Richard: On 03/06/24 7:47 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >> On 03/06/24 5:03 pm, Richard Sandiford wrote: >>> Ajit Agarwal writes: > [...] > If it is intentional, what distinguishes things like vperm and xxinsertw > (and all other unspecs) from plain additi

Re: [PATCH v2 1/2] Factor out static_assert constexpr string extraction for reuse

On 6/2/24 23:45, Andi Kleen wrote: No intentional semantics change. gcc/cp/ChangeLog: * cp-tree.h (struct cstr): Add structure. (get_cstr): Declare. (extract_cstr): Declare. (free_cstr): Declare. * semantics.cc (finish_static_assert): Factor out constant

Re: [PATCH 02/52] d: Replace use of LONG_DOUBLE_TYPE_SIZE

Excerpts from Kewen.Lin's message of Juni 3, 2024 10:57 am: > Hi Iain, > > on 2024/6/3 16:40, Iain Buclaw wrote: >> Excerpts from Kewen Lin's message of Juni 3, 2024 5:00 am: >>> Joseph pointed out "floating types should have their mode, >>> not a poorly defined precision value" in the discussion[

Re: [PATCH v7 4/9] C++: Support clang compatible [[musttail]] (PR83324)

On 6/2/24 13:16, Andi Kleen wrote: This patch implements a clang compatible [[musttail]] attribute for returns. musttail is useful as an alternative to computed goto for interpreters. With computed goto the interpreter function usually ends up very big which causes problems with register allocat

Re: [PATCH v7 6/9] Add tests for C/C++ musttail attributes

On 6/2/24 13:16, Andi Kleen wrote: Mostly adopted from the existing C musttail plugin tests. gcc/testsuite/ChangeLog: * c-c++-common/musttail1.c: New test. * c-c++-common/musttail2.c: New test. * c-c++-common/musttail3.c: New test. * c-c++-common/musttail4.c: New

Re: [RFC][PATCH] PR tree-optimization/109071 - -Warray-bounds false positive warnings due to code duplication from jump threading

On Mon, 2024-06-03 at 08:29 +0200, Richard Biener wrote: > On Fri, May 31, 2024 at 11:23 PM Qing Zhao > wrote: > > > > > > > > > On May 23, 2024, at 07:46, Richard Biener > > > wrote: > > > > > > On Wed, May 22, 2024 at 8:53 PM Qing Zhao > > > wrote: > > > > > > > > > > > > > > > > > On M

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Ajit Agarwal writes: > Hello Richard: > > On 03/06/24 7:47 pm, Richard Sandiford wrote: >> Ajit Agarwal writes: >>> On 03/06/24 5:03 pm, Richard Sandiford wrote: Ajit Agarwal writes: >> [...] >> If it is intentional, what distinguishes things like vperm and xxinsertw >> (and all

[PATCH] rs6000: Fix up PCH in --enable-host-pie builds [PR115324]

Hi! PCH doesn't work properly in --enable-host-pie configurations on powerpc*-linux*. The problem is that the rs6000_builtin_info and rs6000_instance_info arrays mix pointers to .rodata/.data (bifname and attr_string point to string literals in .rodata section, and the next member is either NULL o

Re: [PATCH v2 2/2] C++: Support constexpr strings for asm statements

On 6/2/24 23:45, Andi Kleen wrote: Some programing styles use a lot of inline assembler, and it is common to use very complex preprocessor macros to generate the assembler strings for the asm statements. In C++ there would be a typesafe alternative using templates and constexpr to generate the as

Re: [PATCH] regenerate-opt-urls.py: fix transposed values for "vax" and "v850"

On Mon, 2024-06-03 at 11:30 +0100, Maciej W. Rozycki wrote: > On Tue, 28 May 2024, David Malcolm wrote: > > > I've pushed this to gcc trunk as r15-872-g7cc529fe514cc6 (having > > bootstrapped and lightly tested it on x86_64-pc-linux-gnu) > >  Thank you for fixing this up.  Is this a new requireme

Re: [patch] libgomp: Enable USM for some nvptx devices

On 28/05/2024 23:33, Tobias Burnus wrote: While most of the nvptx systems I have access to don't have the support for CU_DEVICE_ATTRIBUTE_PAGEABLE_MEMORY_ACCESS_USES_HOST_PAGE_TABLES, one has: Tesla V100-SXM2-16GB (as installed, e.g., on ORNL's Summit) does support this feature. And with that

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

On Mon, 3 Jun 2024 at 14:36, Peter0x44 wrote: > > +void > > +std::breakpoint() noexcept > > +{ > > +#if _GLIBCXX_HAVE_DEBUGAPI_H && defined(_WIN32) && > > !defined(__CYGWIN__) > > + DebugBreak(); > > +#elif __has_builtin(__builtin_debugtrap) > > + __builtin_debugtrap(); // Clang > > +#elif define

[PATCH] libstdc++: Fix simd conversion for -fno-signed-char for Clang

Tested on x86_64-linux-gnu (also -m32 and -mx32), aarch64-linux-gnu, and arm- linux-gnueabi(hf). OK for trunk and backports? --- 8< --- The special case for Clang in the trait producing a signed integer type lead to the trait returning 'char' where it shou

Re: [PATCH v7 4/9] C++: Support clang compatible [[musttail]] (PR83324)

On Mon, Jun 03, 2024 at 10:42:20AM -0400, Jason Merrill wrote: > > @@ -30316,7 +30348,7 @@ cp_parser_std_attribute (cp_parser *parser, tree > > attr_ns) > > /* Maybe we don't expect to see any arguments for this attribute. */ > > const attribute_spec *as > > = lookup_attribute

Re: [PATCH v7 4/9] C++: Support clang compatible [[musttail]] (PR83324)

On Mon, Jun 03, 2024 at 08:33:52AM -0700, Andi Kleen wrote: > On Mon, Jun 03, 2024 at 10:42:20AM -0400, Jason Merrill wrote: > > > @@ -30316,7 +30348,7 @@ cp_parser_std_attribute (cp_parser *parser, tree > > > attr_ns) > > > /* Maybe we don't expect to see any arguments for this attribute.

Re: [PATCH] libstdc++: Optimize std::basic_string_view::starts_with

Pushed to trunk. On Sat, 1 Jun 2024 at 11:26, Jonathan Wakely wrote: > > We get smaller code at all optimization levels by not creating a > temporary object, just comparing lengths first and then using > traits_type::compare. This does less work than calling substr then > operator==. > > libstdc+

Re: [PATCH v2 2/2] C++: Support constexpr strings for asm statements

On Mon, Jun 03, 2024 at 11:01:02AM -0400, Jason Merrill wrote: > On 6/2/24 23:45, Andi Kleen wrote: > > Some programing styles use a lot of inline assembler, and it is common > > to use very complex preprocessor macros to generate the assembler > > strings for the asm statements. In C++ there would

Re: [Patch, rs6000, aarch64, middle-end] Add implementation for different targets for pair mem fusion

Hello Richard: On 03/06/24 8:24 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >> Hello Richard: >> >> On 03/06/24 7:47 pm, Richard Sandiford wrote: >>> Ajit Agarwal writes: On 03/06/24 5:03 pm, Richard Sandiford wrote: > Ajit Agarwal writes: >>> [...] >>> If it is intenti

Re: [PATCH 31/52] pru: Remove macros {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE

On Sun, Jun 02, 2024 at 10:01:21PM -0500, Kewen Lin wrote: > This is to remove macros {FLOAT,{,LONG_}DOUBLE}_TYPE_SIZE > defines in pru port. > > gcc/ChangeLog: > > * config/pru/pru.h (FLOAT_TYPE_SIZE): Remove. > (DOUBLE_TYPE_SIZE): Likewise. > (LONG_DOUBLE_TYPE_SIZE): Likewise.

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

3 Jun 2024 4:14:28 pm Jonathan Wakely : On Mon, 3 Jun 2024 at 14:36, Peter0x44 wrote: +void +std::breakpoint() noexcept +{ +#if _GLIBCXX_HAVE_DEBUGAPI_H && defined(_WIN32) && !defined(__CYGWIN__) +  DebugBreak(); +#elif __has_builtin(__builtin_debugtrap) +  __builtin_debugtrap(); // Clang +#eli

Re: [PATCH] libstdc++: Implement C++26 features (P2546R5)

On Mon, Jun 3, 2024 at 9:06 AM Peter0x44 wrote: > > 3 Jun 2024 4:14:28 pm Jonathan Wakely : > > > On Mon, 3 Jun 2024 at 14:36, Peter0x44 wrote: > >>> +void > >>> +std::breakpoint() noexcept > >>> +{ > >>> +#if _GLIBCXX_HAVE_DEBUGAPI_H && defined(_WIN32) && > >>> !defined(__CYGWIN__) > >>> + Debug

Re: [PATCH] Fix -Wstringop-overflow warning in 23_containers/vector/types/1.cc PR109849

On Mon, 3 Jun 2024 at 05:56, François Dumont wrote: > > I hadn't try to make my patch as limited as possible to fix the problem, > indeed. > > libstdc++: Fix -Wstringop-overflow warning coming from std::vector > [PR109849] > > libstdc++-v3/ChangeLog: > > PR libstdc++/109849

Re: [PATCH v7 4/9] C++: Support clang compatible [[musttail]] (PR83324)

On 6/3/24 11:44, Jakub Jelinek wrote: On Mon, Jun 03, 2024 at 08:33:52AM -0700, Andi Kleen wrote: On Mon, Jun 03, 2024 at 10:42:20AM -0400, Jason Merrill wrote: @@ -30316,7 +30348,7 @@ cp_parser_std_attribute (cp_parser *parser, tree attr_ns) /* Maybe we don't expect to see any argument

Re: [PATCH] check_GNU_style: Use raw strings.

On 5/31/24 1:38 PM, Robin Dapp wrote: Hi, this silences some warnings when using check_GNU_style. I didn't expect this to have any bootstrap or regtest impact but I still ran it on x86 - no change. Regards Robin contrib/ChangeLog: * check_GNU_style_lib.py: Use raw strings for re

Re: [patch] libgomp: Enable USM for some nvptx devices

Andrew Stubbs wrote: +    /* If USM has been requested and is supported by all devices +   of this type, set the capability accordingly.  */ +    if (omp_requires_mask & GOMP_REQUIRES_UNIFIED_SHARED_MEMORY) +  current_device.capabilities |= GOMP_OFFLOAD_CAP_SHARED_MEM; +

Re: [PATCH v6 1/8] Improve must tail in RTL backend

Hello, On Fri, 31 May 2024, Andi Kleen wrote: > > I think the ultimate knowledge if a call can or cannot be implemented as > > tail-call lies within calls.cc/expand_call: It is inherently > > target and ABI specific how arguments and returns are layed out, how the > > stack frame is generated,

Re: [PATCH] RISC-V: Add min/max patterns for ifcvt.

On Fri, 31 May 2024 08:07:11 PDT (-0700), Robin Dapp wrote: Hi, ifcvt likes to emit (set (if_then_else) (ge (reg 1) (reg2)) (reg 1) (reg 2)) which can be recognized as min/max patterns in the backend. This patch adds such patterns and the respective iterators as well as a test.

Re: [patch] libgomp: Enable USM for some nvptx devices

On 03/06/2024 17:46, Tobias Burnus wrote: Andrew Stubbs wrote: +    /* If USM has been requested and is supported by all devices +   of this type, set the capability accordingly.  */ +    if (omp_requires_mask & GOMP_REQUIRES_UNIFIED_SHARED_MEMORY) +  current_device.capab

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