On 11/22/23 03:17, Alexandre Oliva wrote:
On Nov 20, 2023, Jason Merrill wrote:
I think the warning is wrong here.
Interesting... Yeah, your analysis makes perfect sense.
Still, we're left with a divergence WRT the TYPE_PACKED status of enum
types between C and C++.
It sort of kind of mak
Is it OK to apply this attribute to a (file-scope or block-scope) static
variable or function in C (and if it is, what's the linkage of the
resulting alias)? That doesn't seem very clear to me from the
documentation, and I'd also expect a testcase of this, whatever the answer
is.
What's the i
I prefer ASM_OUTPUT_OPCODE or assembler dialect to %^ and I don't want to see
any change of vector.md.
%^ will cause high burden for future maintainment.
Besides, ASM_OUTPUT_OPCODE can the whole string. My patch is just a draft.
We can exlude for example, in zvbb, we can exclude appending "th."
Hi Mikael!
On 11/22/23 10:36, Mikael Morin wrote:
(...)
diff --git a/gcc/fortran/error.cc b/gcc/fortran/error.cc
index 2ac51e95e4d..be715b50469 100644
--- a/gcc/fortran/error.cc
+++ b/gcc/fortran/error.cc
@@ -980,7 +980,11 @@ char const*
notify_std_msg(int std)
{
- if (std & GFC_STD_F2018_
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk?
-- >8 --
This patch implements C++23 class template argument deduction from
inherited constructors, which is specified in terms of C++20 alias
CTAD which we already fully support. The rule for transforming
the return
This is the last obsolete reference to buildstat.html shared by Thomas
and per my own `grep -r`.
Pushed.
Gerald
---
htdocs/faq.html | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/htdocs/faq.html b/htdocs/faq.html
index 203661dc..5c713a70 100644
--- a/htdocs/faq.html
+
(I have not fully thought about the 2/6, 3/6 and 4/6 patches, but I
think except for some patch apply issues, 1/6 + this 5/6 can be both
committed without needing 2-4.)
On 23.08.23 16:14, Andrew Stubbs wrote:
Use Cuda to pin memory, instead of Linux mlock, when available.
There are two advantag
On Wed, 2023-11-22 at 20:57 -0500, Ben Boeckel wrote:
> Is there a version of autoconf I should use? I have 2.71 laying around
> but see that these were generated with 2.69. If you want me to regen
> with 2.71, I'll do that as separate prep commits so that this diff is
> sensible. Or I can try and
On Mon, 20 Nov 2023, Florian Weimer wrote:
> This test looks like it intends to pass a small struct argument
> through both a non-variadic and variadic argument, but due to
> the typo, it does not achieve that.
>
> gcc/testsuite/
>
> * gcc.target/aarch64/aapcs64/ice_1.c (foo): Call named.
On 11/21/23 11:04, Manolis Tsamis wrote:
This code used to handle SUBREG for register replacement when ifcvt was doing
the replacements manually. This special handling is not needed anymore
because simplify_replace_rtx is used for the replacements and it properly
handles these cases.
gcc/Chan
On Mon, 20 Nov 2023, Jakub Jelinek wrote:
> On Mon, Nov 20, 2023 at 04:03:07PM +0100, Jakub Jelinek wrote:
> > > Note that stdc_bit_ceil now has defined behavior (return 0) on overflow:
> > > CD2 comment FR-135 was accepted for the DIS at the June WG14 meeting.
> > > This affects both the docum
On 11/22/23 12:26, Patrick Palka wrote:
Bootstrapped and regtested on x86-64-pc-linux-gnu, does this look OK for
trunk/13?
OK.
-- >8 --
The entering_scope adjustment in tsubst_aggr_type assumes if an alias is
dependent, then so is the aliased type (and therefore it has template info)
but tha
Excerpts from Rainer Orth's message of November 21, 2023 5:03 pm:
> Rainer Orth writes:
>
>> either this patch or the previous one broke D bootstrap with GCC 9. On
>> both i386-pc-solaris2.11 with gdc 9.4.0 and sparc-sun-solaris2.11 with
>> gdc 9.3.0, stage 1 d21 fails to link with
>>
>> Undefin
On Wednesday, November 22nd, 2023 at 2:38 PM, Jason Merrill
wrote:
>
>
> On 11/22/23 15:46, waffl3x wrote:
>
> > On Tuesday, November 21st, 2023 at 8:22 PM, Jason Merrill ja...@redhat.com
> > wrote:
> >
> > > On 11/21/23 08:04, waffl3x wrote:
> > >
> > > > /* Nonzero for FUNCTION_DE
On 11/22/23 15:46, waffl3x wrote:
On Tuesday, November 21st, 2023 at 8:22 PM, Jason Merrill
wrote:
On 11/21/23 08:04, waffl3x wrote:
/* Nonzero for FUNCTION_DECL means that this decl is a non-static
- member function. */
+ member function, use DECL_IOBJ_MEMBER_FUNC_P instead. */
#define DECL
On 11/22/23 13:12, Jason Merrill wrote:
On 11/22/23 03:17, Alexandre Oliva wrote:
On Nov 20, 2023, Jason Merrill wrote:
I think the warning is wrong here.
Interesting... Yeah, your analysis makes perfect sense.
Still, we're left with a divergence WRT the TYPE_PACKED status of enum
types b
On Wed, Nov 22, 2023 at 11:48 PM Kito Cheng wrote:
>
> I am less worry about the thead vector combined with other zv extension,
> instead we should reject those combinations at all.
>
> My reason is thead vector is transitional products, they won't have any
> further new products with that longe
Hi!
On 2023-11-19T16:05:42+0100, Jan Hubicka wrote:
> this is updated version which also adds testuiste compensation
> I lost earlier while maintaining the patch in my testing tree.
> There are quite few testcases that use constant return values to hide
> something from optimizer.
One more: comm
On 11/22/23 05:00, Jakub Jelinek wrote:
On Tue, Nov 21, 2023 at 10:51:36PM -0500, Jason Merrill wrote:
Actually, let's go back to the previous message, but change the tf_nones
above to 'complain' so that we see those errors and then this explanation.
Likewise with the conversion checks later in
I am less worry about the thead vector combined with other zv extension,
instead we should reject those combinations at all.
My reason is thead vector is transitional products, they won't have any
further new products with that longer, also it's not compatible with all
other zv extension in theory
On 11/20/23 11:56, Dimitar Dimitrov wrote:
On Sun, Nov 19, 2023 at 05:47:56PM -0700, Jeff Law wrote:
...
+/* Process uses in INSN. Set appropriate bits in LIVENOW for any chunks of
+ pseudos that become live, potentially filtering using bits from LIVE_TMP.
+
+ If MODIFIED is true, then o
On 22/11/2023 15:21, Maciej W. Rozycki wrote:
> Use non-capturing parentheses for the subexpressions used with
> `scan-assembler-times', to avoid a quirk with double-counting.
>
> gcc/testsuite/
> * gcc.target/aarch64/ccmp_1.c: Use non-capturing parentheses
> with `scan-assembl
Bootstrapped and regtested on x86-64-pc-linux-gnu, does this look OK for
trunk/13?
-- >8 --
The entering_scope adjustment in tsubst_aggr_type assumes if an alias is
dependent, then so is the aliased type (and therefore it has template info)
but that's not true for the dependent alias template spe
Hi, Richard.
Current define_mode_attr can only map an attribute for a mode.
I wonder whether we can map a mode to multiple attributes ?
E.g. (define_mode_attr dest_constraint [(V16QI "&vr")])
But I want it to be:
(define_mode_attr dest_constraint [(V16QI (TARGET_MIN_VLEN <= 128 "vr")
(TARGET_M
on 2023/11/22 18:25, Richard Biener wrote:
> On Wed, Nov 22, 2023 at 10:31 AM Kewen.Lin wrote:
>>
>> on 2023/11/17 20:55, Alexander Monakov wrote:
>>>
>>> On Fri, 17 Nov 2023, Kewen.Lin wrote:
> I don't think you can run cleanup_cfg after sched_init. I would suggest
> to put it early in sc
For the following immediate load operation in
gcc/testsuite/gcc.target/loongarch/imm-load1.c:
long long r = 0x0101010101010101;
Before this patch:
lu12i.w $r15,16842752>>12
ori $r15,$r15,257
lu32i.d $r15,0x10101>>32
lu52i.d $r1
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_split_plus_constant):
avoid left shift of negative value -0x8000.
---
gcc/config/loongarch/loongarch.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/lo
On Thu, 2023-11-23 at 11:04 +0800, Guo Jie wrote:
> For the following immediate load operation in
> gcc/testsuite/gcc.target/loongarch/imm-load1.c:
>
> long long r = 0x0101010101010101;
>
> Before this patch:
>
> lu12i.w $r15,16842752>>12
> ori $r15,$r15,257
>
On Thu, 2023-11-23 at 11:05 +0800, Guo Jie wrote:
> gcc/ChangeLog:
>
> * config/loongarch/loongarch.cc (loongarch_split_plus_constant):
> avoid left shift of negative value -0x8000.
> ---
> gcc/config/loongarch/loongarch.cc | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
This patch adds initial support for Ampere-1B core.
The Ampere-1B core implements ARMv8.7 with the following (compiler
visible) extensions:
- CSSC (Common Short Sequence Compression instructions),
- MTE (Memory Tagging Extension)
- SM3/SM4
gcc/ChangeLog:
* config/aarch64/aarch64-cores
Applied to master, thanks!
Philipp,
On Thu, 23 Nov 2023 at 04:48, Jeff Law wrote:
>
>
>
> On 11/21/23 11:04, Manolis Tsamis wrote:
> > This code used to handle SUBREG for register replacement when ifcvt was
> > doing
> > the replacements manually. This special handling is not needed anymore
> >
This patch add another condition for gimple-cond optimization. Refer to
the following test case.
int foo1 (int data, int res)
{
res = data & 0xf;
res |= res << 4;
if (res < 0x22)
return 0x22;
return res;
}
with the compilation flag "-march=rv64gc_zba_zbb -mabi=lp64d -O2",
before this pa
Hi all,
This patch should be able to fix the current issue mentioned in PR112643.
Also, I fixed some legacy issues in code related to AVX512/AVX10.
Ok for trunk?
Thx,
Haochen
gcc/ChangeLog:
PR target/112643
* config/i386/driver-i386.cc (check_avx10_avx512_features):
Re
On Wed, Nov 22, 2023 at 10:07 PM Feng Wang wrote:
>
> This patch add another condition for gimple-cond optimization. Refer to
> the following test case.
> int foo1 (int data, int res)
> {
> res = data & 0xf;
> res |= res << 4;
> if (res < 0x22)
> return 0x22;
> return res;
> }
> with t
在 2023/11/20 上午8:47, Xi Ruoyao 写道:
The usage LSX and LASX frint/ftint instructions had some problems:
1. These instructions raises FE_INEXACT, which is not allowed with
-fno-fp-int-builtin-inexact for most C2x section F.10.6 functions
(the only exceptions are rint, lrint, and llrint).
On Wed, Nov 22, 2023 at 10:07 PM Feng Wang wrote:
>
> This patch add another condition for gimple-cond optimization. Refer to
> the following test case.
> int foo1 (int data, int res)
> {
> res = data & 0xf;
> res |= res << 4;
> if (res < 0x22)
> return 0x22;
> return res;
> }
> with t
On Thu, 2023-11-23 at 14:35 +0800, chenglulu wrote:
> Hi,
>
> I don’t quite understand this part. Is it because define_insn would be
> duplicated with the above implementation,
>
> so define_insn_and_split is used?
Yes, but if you think duplicating the above implementation is better I
can dup
On Tue, Nov 21, 2023 at 6:07 AM Jan Hubicka wrote:
>
> > After this patch in addition to the problem already reported about
> > vlda1.c and return-value-range-1.c, we have noticed these regressions
> > on aarch64:
> > Running gcc:gcc.target/aarch64/aarch64.exp ...
> > FAIL: gcc.target/aarch64/movk
在 2023/11/23 下午3:11, Xi Ruoyao 写道:
On Thu, 2023-11-23 at 14:35 +0800, chenglulu wrote:
Hi,
I don’t quite understand this part. Is it because define_insn would be
duplicated with the above implementation,
so define_insn_and_split is used?
Yes, but if you think duplicating the above implem
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