Pushed r14-3818 with test cases added. The pushed patch is attached.
On Sat, 2023-09-09 at 14:10 +0800, chenglulu wrote:
>
> 在 2023/9/8 上午12:14, Xi Ruoyao 写道:
> > gcc/ChangeLog:
> >
> > * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
> > Define to the maximum amount of
Pushed r14-3819.
On Sat, 2023-09-09 at 14:16 +0800, chenglulu wrote:
>
> 在 2023/9/8 上午12:33, Xi Ruoyao 写道:
> > gcc/ChangeLog:
> >
> > * config/loongarch/loongarch.cc
> > (loongarch_block_move_straight):
> > Check precondition (delta must be a power of 2) and use
> > popco
Hi,RuoYao:
I think the test example memcpy-vec-3.c submitted in r14-3818 is
implemented incorrectly.
The 16-byte length in this test example will cause can_move_by_pieces to
return true when with '-mstrict-align', so no vector load instructions
will be generated.
在 2023/9/8 上午12:14, Xi Ru
On Sat, 2023-09-09 at 15:04 +0800, chenglulu wrote:
> Hi,RuoYao:
>
> I think the test example memcpy-vec-3.c submitted in r14-3818 is
> implemented incorrectly.
>
> The 16-byte length in this test example will cause can_move_by_pieces to
> return true when with '-mstrict-align', so no vector
在 2023/9/9 下午3:06, Xi Ruoyao 写道:
On Sat, 2023-09-09 at 15:04 +0800, chenglulu wrote:
Hi,RuoYao:
I think the test example memcpy-vec-3.c submitted in r14-3818 is
implemented incorrectly.
The 16-byte length in this test example will cause can_move_by_pieces to
return true when with '-mstric
On Sat, 2023-09-09 at 15:14 +0800, chenglulu wrote:
>
> 在 2023/9/9 下午3:06, Xi Ruoyao 写道:
> > On Sat, 2023-09-09 at 15:04 +0800, chenglulu wrote:
> > > Hi,RuoYao:
> > >
> > > I think the test example memcpy-vec-3.c submitted in r14-3818 is
> > > implemented incorrectly.
> > >
> > > The 16-byte
PR 111334
gcc/ChangeLog:
* config/loongarch/loongarch.md: Fix bug of di3_fake.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/pr111334.c: New test.
---
gcc/config/loongarch/loongarch.md | 14 +--
gcc/testsuite/gcc.target/loongarch/pr111334.c | 39 ++
On Sat, 2023-09-09 at 15:42 +0800, Lulu Cheng wrote:
> PR 111334
>
> gcc/ChangeLog:
>
> * config/loongarch/loongarch.md: Fix bug of di3_fake.
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/loongarch/pr111334.c: New test.
Ok. Despite I still think we should use unspec in
The generic code will split 16-byte copy into two 8-byte copies, so the
vector code wouldn't be used even if -mno-strict-align. This
contradicted with the purpose of this test case.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/memcpy-vec-3.c: Increase the amount of
copied byte
LGTM!
在 2023/9/9 下午4:20, Xi Ruoyao 写道:
The generic code will split 16-byte copy into two 8-byte copies, so the
vector code wouldn't be used even if -mno-strict-align. This
contradicted with the purpose of this test case.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/memcpy-vec-3.c:
This is a new RTL pass that tries to optimize memory offset calculations
by moving them from add immediate instructions to the memory loads/stores.
For example it can transform this:
addi t4,sp,16
add t2,a6,t4
shl t3,t2,1
ld a2,0(t3)
addi a2,1
sd a2,8(t2)
into the following (one
This new version fixes the issues discussed in v4 and also fixes an
issue that is described in the newly introduced
compute_validity_closure.
Bootstrapped on x86-64 and AArch64.
I also ran the GCC testsuite on x86-64, AArch64 and RISCV64. There are
no regressions except for gcc.target/i386/pr52146
On Sat, 2023-09-09 at 16:21 +0800, chenglulu wrote:
> LGTM!
Pushed r14-3821.
> 在 2023/9/9 下午4:20, Xi Ruoyao 写道:
> > The generic code will split 16-byte copy into two 8-byte copies, so the
> > vector code wouldn't be used even if -mno-strict-align. This
> > contradicted with the purpose of this t
Le 08/09/2023 à 23:22, Harald Anlauf via Fortran a écrit :
Am 08.09.23 um 12:04 schrieb Mikael Morin via Gcc-patches:
Hello,
this avoids some redundant work in the symbol deletion code, which is
used a lot by the parser to cancel statements that fail to match in the
end.
I haven't tried to meas
Hi!
On 2017-01-23T15:10:44-0700, Jeff Law wrote:
> On 01/19/2017 04:46 AM, Martin Liška wrote:
>> Following patch fixes asan bootstrap, as mentioned in the PR.
>>
>> Ready to be installed?
>> * tree-ssa-reassoc.c (rewrite_expr_tree_parallel): Insert assert
>> that would prevent us to c
To make the dump FILE not too big, add TDF_DETAILS.
This patch fix these following FAILs in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111311
FAIL: gcc.c-torture/unsorted/dump-noaddr.c.*r.vsetvl, -O3 -fomit-frame-pointer
-funroll-loops -fpeel-loops -ftracer -finline-functions comparison
FAI
LGTM
Juzhe-Zhong 於 2023年9月10日 週日 07:58 寫道：
> To make the dump FILE not too big, add TDF_DETAILS.
>
> This patch fix these following FAILs in
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111311
>
> FAIL: gcc.c-torture/unsorted/dump-noaddr.c.*r.vsetvl, -O3
> -fomit-frame-pointer -funroll-loops
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Sunday, September 10, 2023 9:22 AM
To: Juzhe-Zhong
Cc: GCC Patches ; Kito Cheng
Subject: Re: [PATCH] RISC-V: Fix dump FILE of VSETVL PASS[PR111311]
LGTM
Juzhe-Zhong 於 2023
When debugging FAIL: gcc.dg/pr92301.c execution test.
Realize a vls vector permutation situation failed to vectorize since early
return false:
- /* For constant size indices, we dont't need to handle it here.
- Just leave it to vec_perm. */
- if (d->perm.length ().is_constant ())
-retu
If a const vector all elements are same, the slide up is unnecessary.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid
unnecessary slideup.
---
gcc/config/riscv/riscv-v.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/ri
Vladimir Makarov via Gcc-patches 于2023年9月9日周六 01:04写道：
>
>
> On 8/31/23 04:20, Hongyu Wang wrote:
> > @@ -2542,6 +2542,8 @@ the code of the immediately enclosing expression
> > (@code{MEM} for the top level
> > of an address, @code{ADDRESS} for something that occurs in an
> > @code{address_op
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