Please consider to review another two pathes then.
This would be nice to have it in upstream
On Thu, Jul 20, 2023 at 10:45 AM Alexey Lapshin
wrote:
>
> On Thu, 2023-07-20 at 08:25 -0700, Max Filippov wrote:
> > But it defines them with their respective values.
> > Just notice that it adds two leading underscores in front of the names.
>
> Why builtin macros were defined with prefix?
> Wit
On Thu, Jul 20, 2023 at 10:54 AM Alexey Lapshin
wrote:
> Please consider to review another two pathes then.
> This would be nice to have it in upstream
Sure, it's going to take some time though as I need to take a good look,
and maybe I'll come back with some change proposals.
--
Thanks.
-- Max
On Wed, Jul 19, 2023 at 10:11:27AM -0400, Patrick Palka wrote:
> On Tue, 18 Jul 2023, Marek Polacek via Gcc-patches wrote:
>
> > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk and branches?
>
> Looks reasonable to me.
Thanks.
> Though I wonder if we could also fix this by not chec
On 7/20/23 14:13, Marek Polacek wrote:
On Wed, Jul 19, 2023 at 10:11:27AM -0400, Patrick Palka wrote:
On Tue, 18 Jul 2023, Marek Polacek via Gcc-patches wrote:
Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk and branches?
Looks reasonable to me.
Thanks.
Though I wonder if w
The following patch improves code for avr LRA port. More explanation
for the patch can be found in the commit message.
The patch was successfully bootstrapped and tested on x86-64, aarch64,
and ppc64le.
commit 4b8878fbf7b74ea5c3405c9f558df0517036f131
Author: Vladimir N. Makarov
Date: Thu Ju
When sign-extending the value in a double-word register pair using shift and
ashiftrt sequence with the same count immediate value less than word width,
there is no need to shift the lower word of the value. The sign-extension
could be limited to the upper word, but we uselessly shift the lower wor
This libgo patch to the go command sources stops collecting package
CGOLDFLAGS when using gccgo. The flags are already collected via
cmd/cgo.
The gccgo_link_c test is tweaked to do real linking as with this
change the cgo ldflags are not fully reflected in go build -n output,
since they now only
On Thu, Jul 20, 2023 at 02:37:07PM -0400, Jason Merrill wrote:
> On 7/20/23 14:13, Marek Polacek wrote:
> > On Wed, Jul 19, 2023 at 10:11:27AM -0400, Patrick Palka wrote:
> > > On Tue, 18 Jul 2023, Marek Polacek via Gcc-patches wrote:
> > >
> > > > Bootstrapped/regtested on x86_64-pc-linux-gnu, ok
include -isystem
/vol/gcc/sparc-sun-solaris2.11/sys-include -fchecking=1 -c -g -O2 -W -Wall
-gnatpg -nostdinc g-alleve.adb -o g-alleve.o
+===GNAT BUG DETECTED==+
| 14.0.0 20230720 (experimental) [master
506f068e7d01ad2fb107185b8f
On 7/19/23 20:47, Ben Boeckel wrote:
On Wed, Jul 19, 2023 at 17:11:08 -0400, Nathan Sidwell wrote:
GCC is neither of these descriptions. a CMI does not contain the transitive
closure of its imports. It contains an import table. That table lists the
transitive closure of its imports (it needs
On 7/18/23 21:06, HAO CHEN GUI via Gcc-patches wrote:
Hi,
The shift mode will be widen in combine pass if the operand has a normal
subreg. But when the target already has rotate/mask/insert instructions on
the narrow mode, it's unnecessary to widen the mode for lshiftrt. As
the lshiftrt is
On 7/20/23 06:38, Richard Biener via Gcc-patches wrote:
When we materialize a layout we push edge permutes to constant/external
defs without checking we can actually do so. For externals defined
by vector stmts rather than scalar components we can't.
Bootstrapped and tested on x86_64-unknown
On Thu, Jul 20, 2023 at 03:51:32PM -0400, Marek Polacek wrote:
> On Thu, Jul 20, 2023 at 02:37:07PM -0400, Jason Merrill wrote:
> > On 7/20/23 14:13, Marek Polacek wrote:
> > > On Wed, Jul 19, 2023 at 10:11:27AM -0400, Patrick Palka wrote:
> > > > On Tue, 18 Jul 2023, Marek Polacek via Gcc-patches
On 7/20/23 00:18, Vineet Gupta wrote:
On 7/18/23 21:31, Jeff Law via Gcc-patches wrote:
In a run with -fno-fold-mem-offsets, the same insn 93 is successfully
grok'ed by cprop_hardreg,
| (insn 93 337 522 11 (set (mem/c:DF (plus:DI (reg/f:DI 2 sp)
| (const_int 8 [0x8])) [4
Hi.
Since start from LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE, COND_LEN_*
patterns,
the order of len and mask is {mask,len,bias}.
The reason we make "mask" argument comes before "len" is because we want to keep
the "mask" location same as mask_* or cond_* patterns to make use of current
code
On Thu, Jul 20, 2023 at 4:11 PM Uros Bizjak via Gcc-patches
wrote:
>
> On Thu, Jul 20, 2023 at 9:35 AM liuhongt wrote:
> >
> > For Intel processors, after TARGET_AVX, vmovdqu is optimized as fast
> > as vlddqu, UNSPEC_LDDQU can be removed to enable more optimizations.
> > Can someone confirm this
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-2688-g5a0aff76a99804.
gcc/analyzer/ChangeLog:
PR analyzer/110387
* region.h (struct cast_region::key_t): Support "m_type" being
null by using "m_original_region" for empty/deleted slots.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-2690-ga4913a19d24a79.
gcc/analyzer/ChangeLog:
PR analyzer/110455
* region-model.cc (region_model::get_gassign_result): Only check
for bad shift counts when dealing with an integral type.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r14-2689-g7006f02bbc3f1d.
gcc/analyzer/ChangeLog:
PR analyzer/110433
PR middle-end/110612
* access-diagram.cc (class spatial_item): Add virtual dtor.
gcc/ChangeLog:
PR middle-end/110
Hi Jeff,
在 2023/7/21 5:27, Jeff Law 写道:
> Wouldn't it make more sense to just try rotate/mask in the original mode
> before trying a shift in a widened mode? I'm not sure why we need a target
> hook here.
There is no change to try rotate/mask with the original mode when
expensive_optimizations
Sorry for the typo
s/change/chance
在 2023/7/21 8:59, HAO CHEN GUI 写道:
> Hi Jeff,
>
> 在 2023/7/21 5:27, Jeff Law 写道:
>> Wouldn't it make more sense to just try rotate/mask in the original mode
>> before trying a shift in a widened mode? I'm not sure why we need a target
>> hook here.
>
> There
Hi,
This patch modifies vsx extract expand and generates mfvsrwz/stxsiwx
for all subtargets when the mode is V4SI and the index of extracted element
is 1 for BE and 2 for LE. Also this patch adds a insn pattern for mfvsrwz
which can help eliminate redundant zero extend.
Compared to last versio
> -Original Message-
> From: Richard Biener
> Sent: Thursday, July 20, 2023 9:28 PM
> To: Maciej W. Rozycki
> Cc: haochen.jiang ; gcc-
> regress...@gcc.gnu.org; gcc-patches@gcc.gnu.org; Jiang, Haochen
>
> Subject: Re: [r14-2639 Regression] FAIL: gcc.dg/vect/bb-slp-pr95839-v8.c
> scan-tre
This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625121.html
Hi, Richard and Richi.
This patch is to align the order of mask and len.
Currently, According to this piece code:
if (final_len && final_mask)
call = gimp
Hi Carl,
on 2023/7/18 03:19, Carl Love wrote:
>
> GCC maintainers:
>
> The rs6000 function find_instance assumes that it is called for built-
> ins with only two arguments. There is no checking for the actual
> number of aruguments used in the built-in. This patch adds an
> additional paramete
Hi, Richard and Richi.
I have double check the recent codes for len && mask support again.
Some places code structure:
if (len_mask_fn)
...
else if (mask_fn)
...
some places code structure:
if (mask_len_fn)
...
else if (mask)
Base on previous review comment from Richi:
https://gcc.gnu.org/pip
- if (mode == FRM_MODE_DYN_EXIT && prev_mode != FRM_MODE_DYN)
+ if (mode == FRM_MODE_DYN_CALL && prev_mode != FRM_MODE_DYN)
/* No need to emit when prev mode is DYN already. */
- emit_insn (gen_fsrmsi_restore_exit (backup_reg));
+ emit_insn (gen_fsrmsi_restore_volatil
LGTM, I think long jump is another issue and making ra become a fixed
register will escalate to an ABI issue, so that should not be a
blocker for this patch.
On Tue, Jul 18, 2023 at 4:10 PM yanzhang.wang--- via Gcc-patches
wrote:
>
> From: Yanzhang Wang
>
> gcc/ChangeLog:
>
> * config/ri
This adds a simple match pattern to simplify
`max,a>` to `max`. Reassociation handles
this already (r0-77700-ge969dbde29bfd396259357) but
seems like we should be able to handle this even before
reassociation.
This fixes part of PR tree-optimization/80574 but more
work is needed fix it the rest of
On 7/20/23 21:49, Kito Cheng wrote:
LGTM, I think long jump is another issue and making ra become a fixed
register will escalate to an ABI issue, so that should not be a
blocker for this patch.
I'll take a look tomorrow, but I'm supportive of what Yanzhang is trying
to do in principle. I've
Hi Carl,
on 2023/7/18 03:20, Carl Love wrote:
> GCC maintainers:
>
> Version 4, changed the new RS6000_OVLD_VEC_REPLACE_UN case statement
> rs6000/rs6000-c.cc. The existing REPLACE_ELT iterator name was changed
> to REPLACE_ELT_V along with the associated define_mode_attr. Renamed
> VEC_RU to R
on 2023/7/20 20:34, Richard Sandiford wrote:
> "Kewen.Lin" writes:
>> Hi,
>>
>> As PR110729 reported, there was one issue for .section
>> __patchable_function_entries with -ffunction-sections, that
>> is we put the same symbol as link_to section symbol for all
>> functions wrongly. The commit r13
on 2023/7/20 20:37, Richard Sandiford wrote:
> "Kewen.Lin" writes:
>> Hi,
>>
>> Commit r14-2267-gb8806f6ffbe72e adjusts the arguments order
>> of LEN_STORE from {len,vector,bias} to {len,bias,vector},
>> in order to make them consistent with LEN_MASK_STORE and
>> MASK_STORE. But it missed to upda
So the problem here is EXPAND_INTER_MACRO_16 expands to nothing if 16 byte FP
does not
exist but we still add a comma after it and that causes a build failure.
The same is true for EXPAND_INTER_MACRO_10 too.
Committed as obvious after a bootstrap and test on x86_64-linux-gnu and
aarch64-linux-gn
On Thu, Jul 20, 2023 at 11:46:47AM -0400, Jason Merrill wrote:
> On 7/20/23 05:36, Nathaniel Shead wrote:
> > Currently, when typeck discovers that a return statement will refer to a
> > local variable it rewrites to return a null pointer. This causes the
> > error messages for using the return val
Hi,
The function vect_update_epilogue_niters which has been
removed by r14-2281 has some code taking care of that if
there is only one scalar iteration left for epilogue then
we won't try to vectorize it any more.
Although costing should be able to care about it eventually,
I think we still want
On Thu, 20 Jul 2023, Richard Sandiford wrote:
> Richard Biener writes:
> >> Am 20.07.2023 um 18:59 schrieb Richard Sandiford
> >> :
> >>
> >> Richard Biener writes:
> > Am 20.07.2023 um 16:09 schrieb Richard Sandiford
> > :
>
> Richard Biener via Gcc-patches writes:
> >>
On Fri, 21 Jul 2023, Juzhe-Zhong wrote:
> Hi.
>
> Since start from LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE, COND_LEN_*
> patterns,
> the order of len and mask is {mask,len,bias}.
>
> The reason we make "mask" argument comes before "len" is because we want to
> keep
> the "mask" location sa
On Fri, 21 Jul 2023, Juzhe-Zhong wrote:
> This patch is depending on:
> https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625121.html
>
> Hi, Richard and Richi.
>
> This patch is to align the order of mask and len.
>
> Currently, According to this piece code:
> if (final
On Fri, 21 Jul 2023, Juzhe-Zhong wrote:
> Hi, Richard and Richi.
>
> I have double check the recent codes for len && mask support again.
>
> Some places code structure:
>
> if (len_mask_fn)
> ...
> else if (mask_fn)
> ...
>
> some places code structure:
>
> if (mask_len_fn)
> ...
> else if (m
On Fri, Jul 21, 2023 at 6:06 AM Andrew Pinski via Gcc-patches
wrote:
>
> This adds a simple match pattern to simplify
> `max,a>` to `max`. Reassociation handles
> this already (r0-77700-ge969dbde29bfd396259357) but
> seems like we should be able to handle this even before
> reassociation.
>
> Thi
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