On 7/11/23 22:01, Lehua Ding wrote:
Hi,
This tiny patch add --append option to mklog.py that support add generated
ChangeLog to the corresponding patch file. With this option there is no need
to manually copy the generated ChangeLog to the patch file. e.g.:
Run `mklog.py -a /path/to/this/pat
This fixes part of PR 110293, for the outer comparison case
being `!=` or `==`. In turn PR 110539 is able to be optimized
again as the if statement for `(a&1) == ((a & 1) != 0)` gets optimized
to `false` early enough to allow FRE/DOM to do a CSE for memory store/load.
OK? Bootstrapped and tested
On Linux/x86_64,
63ae6bc60c0f67fb2791991bf4b6e7e0a907d420 is the first bad commit
commit 63ae6bc60c0f67fb2791991bf4b6e7e0a907d420
Author: Xi Ruoyao
Date: Thu Jul 6 23:08:57 2023 +0800
vect: Fix vectorized BIT_FIELD_REF for signed bit-fields [PR110557]
caused
FAIL: g++.dg/vect/pr110557.cc
On 7/12/23 06:07, Richard Sandiford wrote:
Vladimir Makarov via Gcc-patches writes:
diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc
index 73fbef29912..2f95121df06 100644
--- a/gcc/lra-assigns.cc
+++ b/gcc/lra-assigns.cc
@@ -1443,10 +1443,11 @@ assign_by_spills (void)
pas
Throw the switch in range-ops to make full use of the value/mask
information instead of only the nonzero bits. This will cause most of
the operators implemented in range-ops to use the value/mask
information calculated by CCP's bit_value_binop() function which
range-ops uses. This opens up more o
Vladimir Makarov writes:
> On 7/12/23 06:07, Richard Sandiford wrote:
>> Vladimir Makarov via Gcc-patches writes:
>>> diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc
>>> index 73fbef29912..2f95121df06 100644
>>> --- a/gcc/lra-assigns.cc
>>> +++ b/gcc/lra-assigns.cc
>>> @@ -1443,10 +1443,11 @
On 7/12/23 12:22, Richard Sandiford wrote:
Vladimir Makarov writes:
On 7/12/23 06:07, Richard Sandiford wrote:
Vladimir Makarov via Gcc-patches writes:
diff --git a/gcc/lra-assigns.cc b/gcc/lra-assigns.cc
index 73fbef29912..2f95121df06 100644
--- a/gcc/lra-assigns.cc
+++ b/gcc/lra-assigns.
On Wed, 12 Jul 2023 09:02:06 PDT (-0700), jeffreya...@gmail.com wrote:
On 7/11/23 21:30, juzhe.zh...@rivai.ai wrote:
LGTM
OK for the trunk.
I'd like to make sure Kito is OK with this. IIUC the "pass through
unknown extensions" behavior is deliberate. It's not what I would have
done, but
On 7/12/23 10:32, Palmer Dabbelt wrote:
On Wed, 12 Jul 2023 09:02:06 PDT (-0700), jeffreya...@gmail.com wrote:
On 7/11/23 21:30, juzhe.zh...@rivai.ai wrote:
LGTM
OK for the trunk.
I'd like to make sure Kito is OK with this. IIUC the "pass through
unknown extensions" behavior is delibe
- I am also not sure if the maintainers of gcc will want this ci, but many
other developers will be happy about that.
Because many copies of gcc are already fork on github. We can see it
here: https://github.com/gcc-mirror/gcc.
Also gcc maintainers are requested to check and validate the gcc as
On Wed, Jul 12, 2023 at 2:50 AM Jonathan Wakely wrote:
>
> On Sat, 8 Jul 2023 at 05:47, Ken Matsui via Libstdc++
> wrote:
> >
> > This patch gets std::is_scalar to dispatch to new built-in trait
> > __is_scalar.
> >
> > libstdc++-v3/ChangeLog:
> >
> > * include/std/type_traits (is_scalar)
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
trunk? There might be an existing PR for this issue but Bugzilla search
seems to be timing out for me currently.
-- >8 --
I noticed we were accidentally preventing ourselves from considering
a pointer/reference-to-function
On Wed, 2023-07-12 at 11:32 -0700, Ken Matsui via Gcc-patches wrote:
> > conditional on the front-end change being committed first of course
>
> Does this mean we want to commit this [2/2] patch before committing
> the [1/2] patch in this case?
No, this mean you should get 1/2 reviewed and commit
On Wed, Jul 12, 2023 at 11:56 AM Xi Ruoyao wrote:
>
> On Wed, 2023-07-12 at 11:32 -0700, Ken Matsui via Gcc-patches wrote:
> > > conditional on the front-end change being committed first of course
> >
> > Does this mean we want to commit this [2/2] patch before committing
> > the [1/2] patch in th
gcc/ChangeLog:
* ira.cc (equiv_init_varies_p): Change return type from int to bool
and adjust function body accordingly.
(equiv_init_movable_p): Ditto.
(memref_used_between_p): Ditto.
* lra-constraints.cc (valid_address_p): Ditto.
Bootstrapped and regression tested on x86_64-l
On Wed, 12 Jul 2023, 19:33 Ken Matsui via Libstdc++,
wrote:
> On Wed, Jul 12, 2023 at 2:50 AM Jonathan Wakely
> wrote:
> >
> > On Sat, 8 Jul 2023 at 05:47, Ken Matsui via Libstdc++
> > wrote:
> > >
> > > This patch gets std::is_scalar to dispatch to new built-in trait
> > > __is_scalar.
> > >
>
On 7/12/23 06:49, Jose E. Marchesi wrote:
>
>> On Wed, Jul 12, 2023 at 2:44 PM Jose E. Marchesi
>> wrote:
>>>
>>>
>>> [Added Eduard Zingerman in CC, who is implementing this same feature in
>>> clang/llvm and also the consumer component in the kernel (pahole).]
>>>
>>> Hi Richard.
>>>
On
On Wed, Jul 12, 2023 at 12:23 PM Jonathan Wakely wrote:
>
>
>
> On Wed, 12 Jul 2023, 19:33 Ken Matsui via Libstdc++,
> wrote:
>>
>> On Wed, Jul 12, 2023 at 2:50 AM Jonathan Wakely wrote:
>> >
>> > On Sat, 8 Jul 2023 at 05:47, Ken Matsui via Libstdc++
>> > wrote:
>> > >
>> > > This patch gets s
Tested powerp64le-linux. Pushed to trunk. This can be backported too.
-- >8 --
The testcase added for this bug only checks conversion from wide strings
on construction, but the fix also covered conversion to wide stings via
path::wstring(). Add checks for that, and u16string() and u32string().
l
On Wed, Jul 12, 2023 at 3:01 AM Jonathan Wakely wrote:
>
> On Mon, 10 Jul 2023 at 06:51, Ken Matsui via Libstdc++
> wrote:
> >
> > Hi,
> >
> > Here is the benchmark result for is_pointer:
> >
> > https://github.com/ken-matsui/gcc-benches/blob/main/is_pointer.md#sun-jul--9-103948-pm-pdt-2023
> >
>
Accessing local arrays element turned into load form (fp + (index << C1)) +
C2 address.
In the case when access is in the loop we got loop invariant computation.
For some reason, moving out that part cannot be done in
loop-invariant passes.
But we can handle that in target-specific hook (legitimize
This patch teaches popcount about known set bits which are now
available in the irange.
PR tree-optimization/107053
gcc/ChangeLog:
* gimple-range-op.cc (cfn_popcount): Use known set bits.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr107053.c: New test.
---
gcc/gimple-r
PR tree-optimization/107043
gcc/ChangeLog:
* range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/pr107043.c: New test.
---
gcc/range-op.cc | 8
gcc/testsuite/gcc.dg/tree-ssa/pr10704
On 7/12/23 15:22, 钟居哲 wrote:
I have removed strided load/store, instead, I will support strided
load/store in vectorizer later.
Ok for trunk?
Assuming this removes the strided loads/stores while we figure out the
best way to support them, OK for the trunk. The formatting is so messed
up t
On 7/12/23 15:15, Aldy Hernandez via Gcc-patches wrote:
This patch teaches popcount about known set bits which are now
available in the irange.
PR tree-optimization/107053
gcc/ChangeLog:
* gimple-range-op.cc (cfn_popcount): Use known set bits.
gcc/testsuite/ChangeLog:
Thanks Jeff.
Will commit with formating the codes.
I am gonna first support COND_FMA and reduction first (which I think is
higher priority).
Then come back support strided_load/store.
Thanks.
juzhe.zh...@rivai.ai
发件人： Jeff Law
发送时间： 2023-07-13 05:48
收件人： 钟居哲; gcc-patches
抄送： kito.cheng;
On 7/12/23 16:17, 钟居哲 wrote:
Thanks Jeff.
Will commit with formating the codes.
I am gonna first support COND_FMA and reduction first (which I think
is higher priority).
Then come back support strided_load/store.
Sure.One thing to note with strided loads, they can significantly
hel
On Tue, Jun 27, 2023 at 11:29:34PM -0400, Jason Merrill via Gcc-patches wrote:
> Tested x86_64-pc-linux-gnu, applying to trunk.
>
> -- 8< --
>
> P2768 allows static_cast from void* to ob* in constant evaluation if the
> pointer does in fact point to an object of the appropriate type.
> cxx_fold_i
I notice vectorizable_call in Loop Vectorizer.
It's vectorizing CALL function for example like fmax/fmin.
From my understanding, we dont have RVV instruction for fmax/fmin?
So for now, I don't need to support builtin call function vectorization for RVV.
Am I right?
I am wondering whether we do ha
Hi,
as discussed this patch moves profile updating to tree-ssa-loop-ch.cc since it
is
now quite ch specific. There are no functional changes.
Boostrapped/regtesed x86_64-linux, comitted.
gcc/ChangeLog:
* tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
(gimple_duplicate
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Wednesday, July 12, 2023 11:40 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@sifive.com; kito.ch...@gmail.com; rdapp@gmail.com
Subject: Re: [PATCH V2] RISC-V: S
This patch implements built-in trait for std::is_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_pointer.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/testsuit
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Thursday, July 13, 2023 5:49 AM
To: 钟居哲 ; gcc-patches
Cc: kito.cheng ; kito.cheng ;
rdapp.gcc
Subject: Re: 回复: Re: [PATCH V7] RISC-V: RISC-V: Support gather_load/scatter RVV
Hi,
Here is the updated benchmark result for is_pointer:
https://github.com/ken-matsui/gcc-benches/blob/main/is_pointer.md#wed-jul-12-055654-pm-pdt-2023
Time: -2.79488%
Peak Memory Usage: -2.39379%
Total Memory Usage: -3.39559%
Sincerely,
Ken Matsui
On Wed, Jul 12, 2023 at 6:12 PM Ken Matsui
This patch lets libstdc++ use new built-in trait __is_pointer.
libstdc++-v3/ChangeLog:
* include/bits/cpp_type_traits.h (__is_ptr): Use __is_pointer
built-in trait.
* include/std/type_traits (is_pointer): Likewise.
(is_pointer_v): Likewise. Optimize its implementat
Also, here is the Kanban board for our GSoC project, which might be
useful for you to manage non-reviewed patches.
https://github.com/users/ken-matsui/projects/1/views/1
On Wed, Jul 12, 2023 at 6:13 PM Ken Matsui wrote:
>
> Hi,
>
> Here is the updated benchmark result for is_pointer:
>
> https:/
On Wed, Jul 12, 2023 at 3:20 AM Jonathan Wakely wrote:
>
> On Sun, 9 Jul 2023 at 09:50, Ken Matsui via Libstdc++
> wrote:
> >
> > This patch implements built-in trait for std::is_signed.
> >
> > gcc/cp/ChangeLog:
> >
> > * cp-trait.def: Define __is_signed.
> > * constraint.cc (dia
This patch implements built-in trait for std::is_signed.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_signed.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SIGNED.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/testsuite/C
This patch lets libstdc++ use new built-in trait __is_signed.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_signed): Use __is_signed built-in trait.
(is_signed_v): Likewise.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std/type_traits | 15 ++-
1 file
That's intentional before, since some time binutils may have supported
that but the compiler doesn't, so GCC just bypasses that to binutils
to let binutils reject those unknown extensions.
But I am considering rejecting those extensions or adding more checks
on the GCC side recently too, because a
Hi,
This patch series gets std::is_object to dispatch to built-in traits and
implements the following built-in traits, on which std::object depends.
* __is_reference
* __is_function
std::is_object was depending on them with disjunction and negation.
__not_<__or_, is_reference<_T
This patch gets std::is_reference to dispatch to new built-in trait
__is_reference.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_reference): Use __is_reference built-in
trait.
(is_reference_v): Likewise.
Signed-off-by: Ken Matsui
---
libstdc++-v3/include/std/ty
This patch implements built-in trait for std::is_reference.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_reference.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_REFERENCE.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/te
This patch implements built-in trait for std::is_function.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_function.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_FUNCTION.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/tests
This patch gets std::is_function to dispatch to new built-in trait
__is_function.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_function): Use __is_function built-in
trait.
(is_function_v): Likewise. Optimize its implementation.
Signed-off-by: Ken Matsui
---
lib
Hi,
Here is the benchmark result for is_function:
https://github.com/ken-matsui/gcc-benches/blob/main/is_function.md#wed-jul-12-072510-pm-pdt-2023
Time: -21.3748%
Peak Memory Usage: -10.962%
Total Memory Usage: -12.8384%
Sincerely,
Ken Matsui
On Wed, Jul 12, 2023 at 7:40 PM Ken Matsui wrote:
This patch gets std::is_object to dispatch to new built-in traits,
__is_function and __is_reference.
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_object): Use new built-in traits,
__is_function and __is_reference.
(is_object_v): Likewise.
Signed-off-by: Ken Matsui
On Wed, Jul 12, 2023 at 9:37 PM Richard Biener via Gcc-patches
wrote:
>
> The PRs ask for optimizing of
>
> _1 = BIT_FIELD_REF ;
> result_4 = BIT_INSERT_EXPR ;
>
> to a vector permutation. The following implements this as
> match.pd pattern, improving code generation on x86_64.
>
> On the RTL
Hi,
Here is the benchmark result for is_reference:
https://github.com/ken-matsui/gcc-benches/blob/main/is_reference.md#wed-jul-12-074702-pm-pdt-2023
Time: -8.15593%
Peak Memory Usage: -4.48408%
Total Memory Usage: -8.03783%
Sincerely,
Ken Matsui
On Wed, Jul 12, 2023 at 7:39 PM Ken Matsui wrot
On Thu, Jul 13, 2023 at 10:47 AM Hongtao Liu wrote:
>
> On Wed, Jul 12, 2023 at 9:37 PM Richard Biener via Gcc-patches
> wrote:
> >
> > The PRs ask for optimizing of
> >
> > _1 = BIT_FIELD_REF ;
> > result_4 = BIT_INSERT_EXPR ;
> >
> > to a vector permutation. The following implements this a
This patch implements built-in trait for std::is_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_pointer.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/testsuit
This patch lets libstdc++ use new built-in trait __is_pointer.
libstdc++-v3/ChangeLog:
* include/bits/cpp_type_traits.h (__is_ptr): Use __is_pointer
built-in trait.
* include/std/type_traits (is_pointer): Likewise. Optimize its
implementation.
(is_pointer_v
This patch implements built-in trait for std::is_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_pointer.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER.
* semantics.cc (trait_expr_value): Likewise.
(finish_trait_expr): Likewise.
gcc/testsuit
This patch lets libstdc++ use new built-in trait __is_pointer.
libstdc++-v3/ChangeLog:
* include/bits/cpp_type_traits.h (__is_ptr): Use __is_pointer
built-in trait.
* include/std/type_traits (is_pointer): Likewise. Optimize its
implementation.
(is_pointer_v
Commited to the trunk, thanks Jeff.
-- Original --
From: "Jeff Law"
From: Pan Li
When investigate the FRM dynmaic rounding mode, we find the global
unknown status is quite different between the fixed-point and
floating-point. Thus, we separate the unknown function with extracting
some inner common functions.
We will also prepare more test cases in another PATCH.
Thanks Jeff and Kito for comments, update the V3 version as below.
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624347.html
> Extract vxrm reg to a local static variable to prevent construct that again
> and again.
The "static const_rtx vxrm_rtx = gen_rtx_REG (SImode, VXRM_REGMU)" result
From: Pan Li
Add more test cases include both the asm check and run for RVV FRM.
Signed-off-by: Pan Li
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/float-point-frm-insert-10.c: New test.
* gcc.target/riscv/rvv/base/float-point-frm-insert-7.c: New test.
* gcc.ta
From: Ju-Zhe Zhong
Hi, Richard and Richi.
Previous patch we support COND_LEN_* binary operations. However, we didn't
support COND_LEN_* ternary.
Now, this patch support COND_LEN_* ternary. Consider this following case:
#define TEST_TYPE(TYPE)
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
(riscv_implied_info): Add zihintntl item.
(riscv_ext_version_table): Ditto.
(riscv_ext_flag_table): Ditto.
* config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
(TAR
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_print_operand):
Add 'N' for print a non-temporal locality hints instruction.
* config/riscv/riscv.md (prefetch):
Add NTLH instruction for prefetch.r and prefetch.w.
gcc/testsuite/ChangeLog:
LGTM
於 2023年7月13日 週四 13:10 寫道：
> From: Pan Li
>
> Add more test cases include both the asm check and run for RVV FRM.
>
> Signed-off-by: Pan Li
>
> gcc/testsuite/ChangeLog:
>
> * gcc.target/riscv/rvv/base/float-point-frm-insert-10.c: New test.
> * gcc.target/riscv/rvv/base/floa
Committed, thanks Kito.
Pan
From: Kito Cheng
Sent: Thursday, July 13, 2023 1:54 PM
To: Li, Pan2
Cc: GCC Patches ; 钟居哲 ; Robin
Dapp ; Jeff Law ; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Add more tests for RVV floating-point FRM.
LGTM
mailto:pan2...@intel.com>> 於 2023年7月13日 週四 13:10 寫道
Hi all,
These four patches aimed to add Intel Arrow Lake/Lunar Lake
instructions, including AVX-VNNI-INT16, SM3, SHA512 and SM4.
The information is based on newly released
Intel Architecture Instruction Set Extensions and Future Features.
The document comes following:
https://www.intel.com/conte
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features):
Detech SM4.
* common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
OPTION_MASK_ISA2_SM4_UNSET): New.
(OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
(ix86_handle_option): Handle -
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features):
Detect SM3.
* common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
OPTION_MASK_ISA2_SM3_UNSET): New.
(OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
(ix86_handle_option): Handle -
gcc/ChangeLog:
* common/config/i386/cpuinfo.h (get_available_features):
Detect SHA512.
* common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
OPTION_MASK_ISA2_SHA512_UNSET): New.
(OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
(ix86_handle_optio
From: Kong Lingling
gcc/ChangeLog
* common/config/i386/cpuinfo.h (get_available_features): Detect
avxvnniint16.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
(OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
(ix86_handle
From: Yanzhang Wang
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
when enabling -mno-omit-leaf-frame-pointer
(riscv_option_override): Override omit-frame-pointer.
(riscv_frame_pointer_required): Save s0 for non-leaf function
Hmmm? I didn't get that error on selftest?
my diff with your v2:
$ git diff
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 12655f7fdc65..466e1aed91c7 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -8058,8 +8058,9 @@ asm_insn_p (rtx_insn *insn)
From: XYenChi
Noticed that the rvv-intrinsic-doc updated the __RISCV_VXRM.
gcc/ChangeLog:Add __RISCV_VXRM enum to riscv_vector.h
2023-07-13 XYenChi
* config/riscv/riscv_vector.h (enum __RISCV_VXRM):Add an enum
__RISCV_VXRM to help express the rounding modes.
---
gcc/config/riscv/
On Thu, 13 Jul 2023, Hongtao Liu wrote:
> On Thu, Jul 13, 2023 at 10:47?AM Hongtao Liu wrote:
> >
> > On Wed, Jul 12, 2023 at 9:37?PM Richard Biener via Gcc-patches
> > wrote:
> > >
> > > The PRs ask for optimizing of
> > >
> > > _1 = BIT_FIELD_REF ;
> > > result_4 = BIT_INSERT_EXPR ;
> > >
On Wed, 12 Jul 2023, Richard Sandiford wrote:
> Richard Biener writes:
> > The PRs ask for optimizing of
> >
> > _1 = BIT_FIELD_REF ;
> > result_4 = BIT_INSERT_EXPR ;
> >
> > to a vector permutation. The following implements this as
> > match.pd pattern, improving code generation on x86_64.
> +enum __RISCV_VXRM {
> + __RISCV_VXRM_RNU = 0,
> + __RISCV_VXRM_RNE = 1,
> + __RISCV_VXRM_RDN = 2,
> + __RISCV_VXRM_ROD = 3,
> +};
> +
> __extension__ extern __inline unsigned long
> __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
> vread_csr(enum RVV_CSR csr)
We have
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