The "btf_decl_tag" attribute is handled by constructing a
DW_TAG_GNU_annotation DIE for each occurrence to record the argument
string in debug information. The DIEs are children of the declarations
they annotate, with the following format:
DW_TAG_GNU_annotation
DW_AT_name "btf_decl_tag"
Expose get_die_parent () so it can be used outside of dwarf2out.cc
gcc/
* dwarf2out.cc (get_die_parent): Make non-static.
* dwarf2out.h (get_die_parent): Add extern declaration here.
---
gcc/dwarf2out.cc | 2 +-
gcc/dwarf2out.h | 1 +
2 files changed, 2 insertions(+), 1 deletion
Add documentation for the btf_decl_tag attribute.
gcc/
* doc/extend.texi (Common Function Attributes): Document btf_decl_tag.
(Common Variable Attributes): Likewise.
---
gcc/doc/extend.texi | 47 +
1 file changed, 47 insertions(+)
diff
This patch makes the DWARF-to-CTF conversion process aware of the new
DW_TAG_GNU_annotation DIEs. The DIEs are converted to CTF_K_DECL_TAG
types and added to the compilation unit CTF container to be translated
to BTF and output.
gcc/
* dwarf2ctf.cc (handle_btf_tags): New function.
This patch adds tests for the btf_decl_tag attribute, in both DWARF
and BTF.
gcc/testsuite/
* gcc.dg/debug/btf/btf-decltag-func.c: New test.
* gcc.dg/debug/btf/btf-decltag-sou.c: New test.
* gcc.dg/debug/btf/btf-decltag-var.c: New test.
* gcc.dg/debug/dwarf2/annota
Add the "btf_decl_tag" attribute to the attribute table, along with
a simple handler for it.
gcc/c-family/
* c-attribs.cc (c_common_attribute_table): Add btf_decl_tag.
(handle_btf_decl_tag_attribute): Handle new attribute.
---
gcc/c-family/c-attribs.cc | 23 ++
This patch updates btfout.cc to be aware of BTF_KIND_DECL_TAG types and
output them appropriately.
gcc/
* btfout.cc (funcs_map): New hash map.
(btf_emit_preprocess): ... Initialize it here...
(btf_collect_datasec): ... Populate it here...
(btf_finalize): ... And fr
On 7/11/23 04:37, Andre Vieira (lists) via Gcc-patches wrote:
Hi,
This patch fixes PR110610 by including OPTABS_H in the INTERNAL_FN_H
list, as insn-opinit.h is now required by internal-fn.h. This will lead
to insn-opinit.h, among the other OPTABS_H header files, being installed
in the plu
On 7/11/23 00:38, juzhe.zh...@rivai.ai wrote:
From: Ju-Zhe Zhong
This patch is to recognize specific permutation pattern which can be applied
compress approach.
Consider this following case:
#include
typedef int8_t vnx64i __attribute__ ((vector_size (64)));
#define MASK_64
May I please ping this patch again? I think it would be worthwhile to
close this gap in the support for UTF-8 sources. Thanks!
https://gcc.gnu.org/pipermail/gcc-patches/2023-March/613247.html
-Lewis
On Fri, Jun 2, 2023 at 9:45 AM Lewis Hyatt wrote:
>
> Hello-
>
> Ping please? Thanks.
> https://g
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Wednesday, July 12, 2023 7:19 AM
To: juzhe.zh...@rivai.ai; gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; rdapp@gmail.com
Subject: Re: [PATCH] RISC-
On Wed, Jul 12, 2023 at 4:57 AM Roger Sayle wrote:
>
>
> > From: Hongtao Liu
> > Sent: 28 June 2023 04:23
> > > From: Roger Sayle
> > > Sent: 27 June 2023 20:28
> > >
> > > I've also come up with an alternate/complementary/supplementary
> > > fix of generating the PTEST during RTL expansion, rat
On 7/7/23 08:32, Juzhe-Zhong wrote:
This patch fully support gather_load/scatter_store:
1. Support single-rgroup on both RV32/RV64.
2. Support indexed element width can be same as or smaller than Pmode.
3. Support VLA SLP with gather/scatter.
4. Fully tested all gather/scatter with LMUL = M1/M
On 7/10/23 22:44, Christoph Muellner wrote:
From: Christoph Müllner
Recently, two identical XTheadCondMov tests have been added, which both fail.
Let's fix that by changing the following:
* Merge both files into one (no need for separate tests for rv32 and rv64)
* Drop unrelated attribute ch
Hi, Jeff.
>> Hmm, I'm not sure this is safe, especially if gimple->rtl expansion is
>> complete. While you might be able to get REG_EXPR, I would not really
>> expect SSA_NAME_DEF_STMT to be correct. At the least it'll need some
>> way to make sure it's not called at an inappropriate time.
I thi
PR #104914
When work with
int val;
((unsigned char*)&val)[0] = *buf;
The RTX mode is obtained from REG instead of SUBREG,
which make D is used instead of .
Thus something wrong happens on sign-extend default architectures,
like MIPS64.
gcc/ChangeLog:
PR: 104914.
* expmed.cc(st
Hi,
This tiny patch add a check for extension starts with 'z' or 's' in `-march`
option. Currently this unknown extension will be passed to the assembler, which
then reports an error. With this patch, the compiler will throw a compilation
error if the extension starts with 'z' or 's' is not a stan
LGTM
juzhe.zh...@rivai.ai
From: Lehua Ding
Date: 2023-07-12 11:27
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; kito.cheng; palmer; jeffreyalaw
Subject: [PATCH] RISC-V: Throw compilation error for unknown sub-extension or
supervisor extension
Hi,
This tiny patch add a check for extension star
Hi,
This tiny patch add --append option to mklog.py that support add generated
ChangeLog to the corresponding patch file. With this option there is no need
to manually copy the generated ChangeLog to the patch file. e.g.:
Run `mklog.py -a /path/to/this/patch` will add the generated ChangeLog
```
From: Ju-Zhe Zhong
Hi, Richard and Richi.
As we disscussed before, COND_LEN_* patterns were added for multiple situations.
This patch apply CON_LEN_* for the following situation:
Support for the situation that in "vectorizable_operation":
/* If operating on inactive elements could generate spu
On 10/07/2023 07:23, Ken Matsui via Libstdc++ wrote:
This patch implements built-in trait for std::is_pointer.
gcc/cp/ChangeLog:
* cp-trait.def: Define __is_pointer.
* constraint.cc (diagnose_trait_expr): Handle CPTK_IS_POINTER.
* semantics.cc (trait_expr_value): Likew
This patch is depending on the following patch on Vectorizer:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624179.html
With this patch, we can handle operations may trap on elements outside the loop.
These 2 following cases will be addressed by this patch:
1. integer division:
#define
On 7/11/23 20:34, juzhe.zh...@rivai.ai wrote:
Hi, Jeff.
>> Hmm, I'm not sure this is safe, especially if gimple->rtl expansion is
complete. While you might be able to get REG_EXPR, I would not really
expect SSA_NAME_DEF_STMT to be correct. At the least it'll need some
way to make sure it'
From: Pan Li
When investigate the FRM dynmaic rounding mode, we find the global
unknown status is quite different between the fixed-point and
floating-point. Thus, we separate the unknown function with extracting
some inner common functions.
We will also prepare more test cases in another PATCH.
From: Pan Li
When investigate the FRM dynmaic rounding mode, we find the global
unknown status is quite different between the fixed-point and
floating-point. Thus, we separate the unknown function with extracting
some inner common functions.
We will also prepare more test cases in another PATCH.
Hi all,
This patch is to add initial support for Granite Rapids D for GCC.
The link of related information is listed below:
https://www.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
Also, the patch of removing AMX-COMPLEX fr
> -Original Message-
> From: Mo, Zewei
> Sent: Wednesday, July 12, 2023 1:56 PM
> To: gcc-patches@gcc.gnu.org
> Cc: Liu, Hongtao ; ubiz...@gmail.com
> Subject: [PATCH] Initial Granite Rapids D Support
>
> Hi all,
>
> This patch is to add initial support for Granite Rapids D for GCC.
>
I understand your concern. I CC Richards to see whether this piece of codes is
unsafe.
Hi, Richard and Richi:
Jeff is worrying about this codes in "expand_gather_scatter" of supporting
len_mask_gather_load/len_mask_scatter_store in RISC-V port.
The codes are as follows:
+/* Return true if i
+regnum_definition_p (rtx_insn *insn, unsigned int regno)I prefer it to be
reg_set_p.
+insn_asm_p (rtx_insn *insn)asm_insn_p
+global_vxrm_state_unknown_pvxrm_unknown_p
+global_frm_state_unknown_p (rtx_insn *insn)FRM of CALL function is not
"UNKNOWN" unlike VXRM.It just change into another unknown
From: Sun Haiyong
gcc/ChangeLog:
* config.gcc: Add some include file in tm_file.
---
gcc/config.gcc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 51ca5311fa4..b901aa8e5dc 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -24
On Tue, Jul 11, 2023 at 06:02:18PM +0200, Christoph Müllner wrote:
> Hi Kito,
>
> I take some of the blame because I have sent a series
> that consisted of fixes followed by new features.
>
> You have ack'ed patches 1-9 from the series.
> The last two patches (for XTheadMemIdx and XTheadFMemIdx)
Hi,
just a remark regarding OpenMP. With
...omp ... firstprivate(var) allocator(omp_const_mem_alloc: var) one can also
create constant memory in OpenMP.
Likewise with a custom allocator that uses the memory space
omp_const_mem_space, which is then a run-time thing. I don't think
that's particul
On Mon, 10 Jul 2023 at 16:43, Xi Ruoyao via Gcc-patches
wrote:
>
> On Mon, 2023-07-10 at 10:33 +, Richard Biener wrote:
> > On Fri, 7 Jul 2023, Xi Ruoyao wrote:
> >
> > > If a bit-field is signed and it's wider than the output type, we
> > > must
> > > ensure the extracted result sign-extended
On 11.07.2023 08:45, Liu, Hongtao wrote:
>> -Original Message-
>> From: Jan Beulich
>> Sent: Tuesday, July 11, 2023 2:08 PM
>>
>> There's nothing AVX512BW-ish in here, so no reason to use Yw as the
>> constraints for the AVX alternative. Furthermore by using the 512-bit form of
>> VPSSLD (
On Tue, 2023-07-11 at 13:04 +0530, Prathamesh Kulkarni wrote:
/* snip */
> Hi Xi,
> Your commit:
> https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63ae6bc60c0f67fb2791991bf4b6e7e0a907d420,
>
> seems to cause following regressions on arm-linux-gnueabihf:
> FAIL: g++.dg/vect/pr110557.cc -std=c++98
On Tue, Jul 11, 2023 at 09:50:23AM +0200, Jan Beulich via Gcc-patches wrote:
> > Quote from what Jakub said in [1].
> > ---
> > This is not correct.
> > While using such code for _mm_cvtsbh_ss is fine if it is documented not to
> > raise exceptions and turn a sNaN into a qNaN, it is not fine fo
> -Original Message-
> From: Jan Beulich
> Sent: Tuesday, July 11, 2023 3:50 PM
> To: Liu, Hongtao
> Cc: Kirill Yukhin ; gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] x86: improve fast bfloat->float conversion
>
> On 11.07.2023 08:45, Liu, Hongtao wrote:
> >> -Original Message
> > > FWIW, this particular patch was regstrapped on x86-64-linux
> > > with trunk from a week ago (and sniff-tested on current trunk).
> >
> > This looks really cool.
>
> The biggest benefit might be from IPA with LTO where we'd carefully place
> those
> attributes at WPA time (at that time tiei
On Tue, Jul 11, 2023 at 10:53 AM Jan Hubicka wrote:
>
> > > > FWIW, this particular patch was regstrapped on x86-64-linux
> > > > with trunk from a week ago (and sniff-tested on current trunk).
> > >
> > > This looks really cool.
> >
> > The biggest benefit might be from IPA with LTO where we'd ca
Hi,
Integer expression "(X - N * M) / N" can be optimized to "X / N - M"
if there is no wrap/overflow/underflow and "X - N * M" has the same
sign with "X".
Compare the previous version:
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/623028.html
- The APIs for checking overflow of range opera
Similar like we did for CMPXCHG, but extended to all
ix86_comparison_int_operator since CMPCCXADD set EFLAGS exactly same
as CMP.
When operand order in CMP insn is same as that in CMPCCXADD,
CMP insn can be eliminated directly.
When operand order is swapped in CMP insn, only optimize
cmpccxadd +
> It turns out that adaint.c includes other Windows header files than just
> windows.h, so defining WIN32_LEAN_AND_MEAN is not sufficient for it.
>
> gcc/ada/
>
> * adaint.c [_WIN32]: Undefine 'abort' macro.
I backported it onto the 13 branch.
--
Eric Botcazou
From: Bob Duff
This patch avoids rewriting "X: S := F(...);" as "X: S renames F(...);".
That rewrite is incorrect if S is a constrained array subtype,
because it changes the semantics. In the original, the
bounds of X are that of S. But constraints are ignored in
renamings, so the bounds of X wou
From: Eric Botcazou
The problem occurs for hidden discriminants of private discriminated types.
gcc/ada/
* sem_ch13.adb (Replace_Type_References_Generic.Visible_Component):
In the case of private discriminated types, return a discriminant
only if it is listed in the disc
>
> What I saw most wrecking the profile is when passes turn
> if (cond) into if (0/1) leaving the CFG adjustment to CFG cleanup
> which then simply deletes one of the outgoing edges without doing
> anything to the (guessed) profile.
Yep, I agree that this is disturbing. At the cfg cleanup time
libgcc/
* config/aarch64/aarch64-unwind.h (aarch64_cie_signed_with_b_key):
Add missing const qualifier. Cast from const unsigned char *
to const char *. Use __builtin_strchr to avoid an implicit
function declaration.
* config/aarch64/linux-unwind.h (aarch6
libgcc/
* config/m68k/fpgnulib.c (__cmpdf2): Declare.
---
libgcc/config/m68k/fpgnulib.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/libgcc/config/m68k/fpgnulib.c b/libgcc/config/m68k/fpgnulib.c
index fe41edf26aa..d5c3411e947 100644
--- a/libgcc/config/m68k/fpgnulib.c
+++ b/libgcc
libgcc/
* config/csky/linux-unwind.h (csky_fallback_frame_state): Add
missing cast.
---
libgcc/config/csky/linux-unwind.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config/csky/linux-unwind.h
b/libgcc/config/csky/linux-unwind.h
index 66b2a44e047..
libgcc/
* config/arc/linux-unwind.h (arc_fallback_frame_state): Add
missing cast.
---
libgcc/config/arc/linux-unwind.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config/arc/linux-unwind.h b/libgcc/config/arc/linux-unwind.h
index 0292e22ed1b..dec942
libgcc/
* config/or1k/linux-unwind.h (or1k_fallback_frame_state): Add
missing cast.
---
libgcc/config/or1k/linux-unwind.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config/or1k/linux-unwind.h
b/libgcc/config/or1k/linux-unwind.h
index aa873791daa..
libgcc/
* config/riscv/linux-unwind.h (riscv_fallback_frame_state): Add
missing cast.
---
libgcc/config/riscv/linux-unwind.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libgcc/config/riscv/linux-unwind.h
b/libgcc/config/riscv/linux-unwind.h
index 931c2f27
The following properly guards the re-align (optimized) paths used
on old power CPUs for the added case of SLP splats from non-grouped
loads. Testcases are existing in dg-torture.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/110614
* tree-vect-
On Tue, 11 Jul 2023, Jan Hubicka wrote:
> >
> > What I saw most wrecking the profile is when passes turn
> > if (cond) into if (0/1) leaving the CFG adjustment to CFG cleanup
> > which then simply deletes one of the outgoing edges without doing
> > anything to the (guessed) profile.
>
> Yep, I a
If an actual argument is associated with an INTENT(OUT) dummy, and code
to deallocate it is generated, generate the class wrapper initialization
after the actual argument deallocation.
This is achieved by passing a cleaned up expression to
gfc_conv_class_to_class, so that the class wrapper initial
Hello,
this is a followup to Harald's recent work [1] on the evaluation order
of arguments, when one of them is passed to an intent(out) allocatable
dummy and is deallocated before the call.
This extends Harald's fix to support:
- scalars passed to assumed rank dummies (patch 1),
- scalars passe
In the case of a scalar actual arg passed to a polymorphic assumed-rank
dummy with INTENT(OUT) attribute, avoid repeatedly evaluating the actual
argument reference by saving a pointer to it. This is non-optimal, but
may also be invalid, because the data reference may depend on its own
content. In
In the case of an array actual arg passed to a polymorphic array dummy
with INTENT(OUT) attribute, reorder the argument evaluation code to
the following:
- first evaluate arguments' values, and data references,
- deallocate data references associated with an allocatable,
intent(out) dummy,
-
While by default 'malloc' allocates memory on the same node as the calling
process/thread ('numactl --show' shows 'preferred node: current',
Linux kernel memory policy MPOL_DEFAULT), this can be changed.
For instance, when running the program as follows, 'malloc' now
prefers to allocate on the sec
Hi,
This patch fixes PR110610 by including OPTABS_H in the INTERNAL_FN_H
list, as insn-opinit.h is now required by internal-fn.h. This will lead
to insn-opinit.h, among the other OPTABS_H header files, being installed
in the plugin directory.
Bootstrapped aarch64-unknown-linux-gnu.
@Jakub:
On 07/07/2023 A 12:11 am, Peter Bergner wrote:
> I believe the untested patch below should also work, without having to scan
> the (uncommonly used) options. Jeevitha, can you bootstrap and regtest the
> patch below?
Yeah Peter, Bootstrapped and regtested the below patch on powerpc64le-linux
On Fri, 7 Jul 2023, Tamar Christina wrote:
> Hi All,
>
> Following on from Jakub's patch in g:de0ee9d14165eebb3d31c84e98260c05c3b33acb
> these two patches finishes the work fixing the regression and improves
> codegen.
>
> As explained in that commit, ifconvert sorts PHI args in increasing numb
On Fri, 7 Jul 2023, Tamar Christina wrote:
> Hi All,
>
> This patch builds on the previous patch by fixing another issue with the
> way ifcvt currently picks which branches to test.
>
> The issue with the current implementation is while it sorts for
> occurrences of the argument, it doesn't chec
On Mon, 10 Jul 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> Hi, Richard and Richi.
>
> This patch is adding cond_len_* operations pattern for target support loop
> control with length.
>
> These patterns will be used in these following case:
>
> 1. Integer division:
>void
>
On Mon, 10 Jul 2023, Tamar Christina wrote:
> > > - *type_out = STMT_VINFO_VECTYPE (stmt_info);
> > > + if (cond_cst)
> > > +{
> > > + append_pattern_def_seq (vinfo, stmt_info, pattern_stmt, vectype);
> > > + pattern_stmt
> > > + = gimple_build_cond (gimple_cond_code (cond_stmt),
>
Hi,
upcoming changes for RISC-V will have us exceed 256 modes or 8 bits. The
helper functions in gen* rely on the opcode as well as two modes fitting
into an unsigned int (a signed int even if we consider the qsort default
comparison function). This patch changes the type of the index/hash
from u
Thanks for fixing it.
CC Richards to see whether it is appropriate.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-11 19:51
To: gcc-patches
CC: rdapp.gcc; jeffreyalaw; juzhe.zh...@rivai.ai
Subject: [PATCH] genopinit: Allow more than 256 modes.
Hi,
upcoming changes for RISC-V will have u
Hello,
I saw the light regarding this PR after Paul posted a comment yesterday.
Regression test in progress on x86_64-pc-linux-gnu.
I plan to push in the next hours.
Mikael
-- >8 --
Release symbols in reversed order wrt the order they were allocated.
This fixes an error recovery ICE in the cas
Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk?
-- >8 --
Here during ahead of time coercion of the variable template-id v1,
since we pass only the innermost arguments to coerce_template_parms (and
outer arguments are still dependent at this point), substitution of
Hi Juzhe,
looks good from my side, thanks. While going through it I
thought of some related cases that we could still handle
differently but I didn't bother to formalize them for now.
Most likely we already handle them in the shortest way
anyway. I'm going to check on that when I find some time
The compress optimization pattern has included all variety.
It's not necessary to force split (half/half), we can apply this compress
pattern to any variety of compress pattern.
You can apply this patch to see.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-11 20:17
To: juzhe.zh
> The compress optimization pattern has included all variety.
> It's not necessary to force split (half/half), we can apply this compress
> pattern to any variety of compress pattern.
Yes, that's clear. I meant the testcases are mostly designed
like
MASK4 1, 2, 6, 7
instead of variation like
M
MASK4 0, 5, 6, 7 also works definitely.
The optimization is generic as long as the permutation index matches the
compress insn on RVV ISA SPEC.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-11 20:24
To: 钟居哲; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; Jeff Law
Subject: Re: [PATC
> MASK4 0, 5, 6, 7 also works definitely
Sure :) My remark was that the tests are all(?)
evenly split and a bit more variation would have been nice.
Not that it doesn't work, I'm OK with it as is.
Regards
Robin
Robin Dapp via Gcc-patches writes:
> Hi,
>
> upcoming changes for RISC-V will have us exceed 256 modes or 8 bits. The
> helper functions in gen* rely on the opcode as well as two modes fitting
> into an unsigned int (a signed int even if we consider the qsort default
> comparison function). This
Richard Sandiford writes:
> Robin Dapp via Gcc-patches writes:
>> Hi,
>>
>> upcoming changes for RISC-V will have us exceed 256 modes or 8 bits. The
>> helper functions in gen* rely on the opcode as well as two modes fitting
>> into an unsigned int (a signed int even if we consider the qsort defa
> > By now we did CCP and FRE so we likely optimized out most of constant
> > conditionals exposed by inline.
>
> So maybe we should simply delay re-propagation of the profile? I
> think cunrolli doesn't so much care about the profile - cunrolli
> is (was) about abstraction removal. Jump threadi
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Tuesday, July 11, 2023 7:01 PM
To: Ju-Zhe Zhong
Cc: gcc-patches@gcc.gnu.org; richard.sandif...@arm.com
Subject: Re: [PATCH V2] VECT: Add COND_LEN_* operations for loop
Hi,
this patch improves profile update in loop-ch to handle situation where
duplicated header
has loop invariant test. In this case we konw that all count of the exit edge
belongs to
the duplicated loop header edge and can update probabilities accordingly.
Since we also do all the work to track
On Mon, Jul 10, 2023 at 9:08 PM Alexander Monakov via Gcc-patches
wrote:
>
>
> On Mon, 10 Jul 2023, Michael Matz via Gcc-patches wrote:
>
> > Hello,
> >
> > the ELF psABI for x86-64 doesn't have any callee-saved SSE
> > registers (there were actual reasons for that, but those don't
> > matter anym
> if (NUM_OPTABS > 0x
> || MAX_MACHINE_MODE >= ((1 << MACHINE_MODE_BITSIZE) - 1))
> fatal ("genopinit range assumptions invalid");
>
> so it would be a case of changing those instead.
Thanks, right at the beginning of the file and I didn't see it ;)
MACHINE_MODE_BITSIZE is already 1
On Tue, 11 Jul 2023, ??? wrote:
> Thanks for fixing it.
> CC Richards to see whether it is appropriate.
I agree with Richard S., but generally please avoid
'long long' and use stdint types when you need specific
precision.
Richard.
>
>
> juzhe.zh...@rivai.ai
>
> From: Robin Dapp
> Date: 202
On Tue, 11 Jul 2023, Jan Hubicka wrote:
> > > By now we did CCP and FRE so we likely optimized out most of constant
> > > conditionals exposed by inline.
> >
> > So maybe we should simply delay re-propagation of the profile? I
> > think cunrolli doesn't so much care about the profile - cunrolli
On Thu, Jul 06, 2023 at 03:00:28PM +0200, Richard Biener via Gcc-patches wrote:
> On Wed, Jul 5, 2023 at 3:42 PM Drew Ross via Gcc-patches
> wrote:
> >
> > Adds a simplification for (~X | Y) ^ X to be folded into ~(X & Y).
> > Tested successfully on x86_64 and x86 targets.
> >
> >
Hi Mikhail,
That's more than OK by me.
Thanks for attacking this PR.
I have a couple more of Steve's orphans waiting to be packaged up -
91960 and 104649. I'll submit them this evening.100607 is closed-fixed
and 103796 seems to be fixed.
Regards
Paul
On Tue, 11 Jul 2023 at 13:08, Mikael Morin
> > > When a function doesn't contain calls to
> > > unknown functions we can be a bit more lenient: we can make it so that
> > > GCC simply doesn't touch xmm8-15 at all, then no save/restore is
> > > necessary.
One may also take into account that first 8 registers are cheaper to
encode than the l
Ok so the consensus seems to rather stay with 32 bits and only
change the shift to 10/20? As MACHINE_MODE_BITSIZE is already
16 we would need an additional check independent of that.
Wouldn't that also be a bit confusing?
Attached is a "v2" with unsigned long long changed to
uint64_t and checking
Antony Polukhin 2023-07-11 09:51:58 UTC
There's a typo at
https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/testsuite/g%2B%2B.target/i386/pr110170.C;h=e638b12a5ee2264ecef77acca86432a9f24b103b;hb=d41a57c46df6f8f7dae0c0a8b349e734806a837b#l87
It should be `|| !test3() || !test3r()` rather than `|| !te
Ok.
On Tue, Jul 11, 2023, 9:16 AM Patrick Palka wrote:
> Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for
> trunk?
>
> -- >8 --
>
> Here during ahead of time coercion of the variable template-id v1,
> since we pass only the innermost arguments to coerce_template_parms (an
On 7/11/23 03:38, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/m68k/fpgnulib.c (__cmpdf2): Declare.
OK.
jeff
For example:
https://godbolt.org/z/1d6v5WKhY
Clang can vectorize but GCC failed even with -ffast-math.
So I think conversions should be well checked again to make sure every variant
can vectorize.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-07-11 21:31
To: Robin Dapp via Gcc-p
Sorry for sending incorrect email.
Forget about this:).
juzhe.zh...@rivai.ai
From: 钟居哲
Date: 2023-07-11 21:55
To: rdapp.gcc; gcc-patches; Jeff Law; richard.sandiford; rguenther
CC: rdapp.gcc
Subject: Re: [PATCH] genopinit: Allow more than 256 modes.
For example:
https://godbolt.org/z/1d6v
On 7/11/23 03:38, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/csky/linux-unwind.h (csky_fallback_frame_state): Add
missing cast.
OK
jeff
On 7/11/23 03:38, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/riscv/linux-unwind.h (riscv_fallback_frame_state): Add
missing cast.
OK
jeff
On 7/11/23 03:39, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/arc/linux-unwind.h (arc_fallback_frame_state): Add
missing cast.
OK
jeff
On 7/11/23 03:39, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/or1k/linux-unwind.h (or1k_fallback_frame_state): Add
missing cast.
OK
jeff
On Tue, Jul 11, 2023 at 3:08 PM Jakub Jelinek wrote:
>
> On Thu, Jul 06, 2023 at 03:00:28PM +0200, Richard Biener via Gcc-patches
> wrote:
> > On Wed, Jul 5, 2023 at 3:42 PM Drew Ross via Gcc-patches
> > wrote:
> > >
> > > Adds a simplification for (~X | Y) ^ X to be folded into ~(X & Y).
>
On Tue, 11 Jul 2023, Richard Biener wrote:
> > > If a function contains calls then GCC can't know which
> > > parts of the XMM regset is clobbered by that, it may be parts
> > > which don't even exist yet (say until avx2048 comes out), so we must
> > > restrict ourself to only save/restore the S
Hello,
On Tue, 11 Jul 2023, Jan Hubicka wrote:
> > > > When a function doesn't contain calls to
> > > > unknown functions we can be a bit more lenient: we can make it so that
> > > > GCC simply doesn't touch xmm8-15 at all, then no save/restore is
> > > > necessary.
>
> One may also take into ac
I have now committed this (mostly .texi) patch as Rev.
r14-2434-g8c2fc744a25ec4
Changes to my previously posted version: Fixed a typo in .texi and in
the changelog, tweaked the wording for {nearest} to sound better and to
provide more details.
Tobias
On 11.07.23 00:07, Tobias Burnus wrote:
I n
On 11/07/2023 10:37, Florian Weimer via Gcc-patches wrote:
libgcc/
* config/aarch64/aarch64-unwind.h (aarch64_cie_signed_with_b_key):
Add missing const qualifier. Cast from const unsigned char *
to const char *. Use __builtin_strchr to avoid an implicit
function
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