DSE isn't good at identifying program points that end lifetime
of variables that are not associated with virtual operands. But
at least for those that end basic-blocks we can handle the simple
case where this ending is in the same basic-block as the definition
we want to elide. That should catch
On Mon, 19 Jun 2023, Jason Merrill wrote:
> On 6/19/23 06:15, Richard Biener wrote:
> > When we process a scope typedef during early debug creation and
> > we have already created a DIE for the type when the decl is
> > TYPE_DECL_IS_STUB and this DIE is still in limbo we end up
> > just re-parenti
There's no reason to constrain this to AVX512VL, unless instructed so by
-mprefer-vector-width=, as the wider operation is unusable for more
narrow operands only when the possible memory source is a non-broadcast
one. This way even the scalar copysign3 can benefit from the
operation being a single-
On Mon, 19 Jun 2023, Richard Sandiford wrote:
> Jeff Law writes:
> > On 6/16/23 06:34, Richard Biener via Gcc-patches wrote:
> >> IVOPTs has strip_offset which suffers from the same issues regarding
> >> integer overflow that split_constant_offset did but the latter was
> >> fixed quite some time
From: Ronan Desplanques
Before this patch, Ada.Calendar.Formatting.Time_Of executed extra code
when passed a number of seconds equal to the number of seconds in a day.
This caused the result to be off, perhaps because a statement resetting
the number of seconds to zero was missing.
Instead of ad
From: Javier Miranda
The compiler reports spurious errors processing the instantation
of a generic package when the instantation is performed in the
the body of a package that has a private type T, a dispatching
primitive of T has the same name as a component of T, and
an extension of T is used a
From: Eric Botcazou
This just applies the same fix to Expand_Array_Aggregate as the one that was
recently applied to Convert_To_Assignments.
gcc/ada/
* exp_aggr.adb (Convert_To_Assignments): Tweak comment.
(Expand_Array_Aggregate): Do not delay the expansion if the parent
From: Daniel King
The package Interfaces.CHERI provides intrinsic bindings and
helper functions to allow software to query, create, and
manipulate CHERI capabilities.
gcc/ada/
* libgnat/i-cheri.ads: Add CHERI intrinsics and helper functions.
* libgnat/i-cheri.adb: Likewise
Test
Deriving from a subtype of a derived type of a private type, whose full
view is itself a derived type of a discriminated record with a known
discriminatant was failing with the error message:
invalid constraint: type has no discriminant
The compiler needs to use the full view to be able to cons
From: Ghjuvan Lacambre
When not passing Error_Node, Error_Msg will treat Current_Node as the
node attached to the message. When this happens in lib-load.adb due to a
file that cannot be loaded, Current_Node might reference a node that
doesn't actually exist. This is a problem when using -gnatdJ a
From: Eric Botcazou
The main change is the removal of the special bypass for private views in
Resolve_Implicit_Dereference, which in exchange requires additional work
in Check_Generic_Actuals and a couple more calls to Set_Global_Type in
Save_References_In_Identifier. This also removes an unused
From: Eric Botcazou
Check_Actual_Type incorrectly switches the view of a private type declared
in the enclosing scope of a generic unit but that has a private ancestor.
gcc/ada/
* einfo.ads (Has_Private_Ancestor): Fix inaccuracy in description.
* sem_ch12.adb (Check_Actual_Type)
From: Claire Dross
The Might_Not_Return and Always_Return annotations for GNATprove
should now be replaced by the two more precise aspects
Exceptional_Cases and Always_Terminates.
They allow to specify whether a subprogram is allowed to raise
exceptions or fail to complete.
gcc/ada/
* l
From: Yannick Moy
With bump of stable SPARK used for proof of the runtime,
some annotations need to change.
gcc/ada/
* libgnat/s-aridou.adb (Scaled_Divide): Add assertions.
* libgnat/s-valuti.adb: Add Loop_Variant.
* libgnat/s-valuti.ads: Add Exceptional_Cases on No_Retu
From: Bob Duff
This patch fixes a compiler bug triggered by having a type with some
defaulted components, and a predicate, and an object of that type with
an address clause. In this case, the compiler was crashing.
gcc/ada/
* sem_ch3.adb (Analyze_Object_Declaration): Remove predicate-ch
From: Ghjuvan Lacambre
The previous version of this code stopped printing messages as soon as
it encountered a deleted or continuation message. This was wrong,
continuation and deleted messages can be followed by live messages that
do need to be printed.
gcc/ada/
* errout.adb (Output_Me
From: Eric Botcazou
This can be helpful for legacy code that still makes use of an original
reverse Bit_Order clause, i.e. without a Scalar_Storage_Order clause.
gcc/ada/
* doc/gnat_ugn/building_executable_programs_with_gnat.rst (Compiler
Switches): Document -gnateH.
* o
Hi Jakub,
Thanks for reviewing but I am not quite sure if I fully understand how to fix
this issue. Could you please help to enlighten me more about this ?
Currently for RISC-V, the memset has touched out of range memory already due to
MAX_MACHINE_MODE > 256. And we may have below parts require
From: Piotr Trojanek
When detecting illegal uses of formal parameters of the current
subprogram in contract of its Exceptional_Cases, we relied on the
Current_Scope. However, quantified expressions introduce an implicit
scope, which we need to take into account.
gcc/ada/
* sem_res.adb (
> >
> > size_type
> > _M_check_len(size_type __n, const char* __s) const
> > {
> > const size_type __size = size();
> > const size_type __max_size = max_size();
> >
> > if (__is_same(allocator_type, allocator<_Tp>)
> > && __size > __max_size /
From: Yannick Moy
Add a new character sequence [] for error codes in error messages
handled by Error_Msg procedures, to use for SPARK-related errors.
Display of additional information on the error or warning based on
the error code is delegated to GNATprove.
gcc/ada/
* err_vars.ads (Err
From: Yannick Moy
Warning on suspicious postcondition is not relevant if contract
Exceptional_Cases is present, or if contract Always_Terminates is
present with a non-statically True value, as in those cases the
postcondition can be used to indicate constraints on those pre-state
for which the su
From: Piotr Trojanek
Attribute Range is now handled like First and Last when occurring within
the consequence of Exceptional_Cases, i.e. attribute Range is not
considered to be a read of a formal parameter that would not be allowed
in the contract.
gcc/ada/
* sem_res.adb (Resolve_Entity
Hi All,
I accidentally left a test comment in the final version of the patch.
This removes the comment.
Regtested on aarch64-none-linux-gnu and no issues.
Committed under the obvious rule.
Thanks,
Tamar
gcc/ChangeLog:
* config/aarch64/aarch64.md (*mov_aarch64): Drop test comment.
---
From: Eric Botcazou
There is still a mention of the defunct CHECKED mode and the Default
Settings paragraph is confusing with regard to the -gnato switch.
gcc/ada/
* doc/gnat_ugn/gnat_and_program_execution.rst (Overflows in GNAT)
: Remove obsolete paragraph about -gnato.
Hi Juzhe,
> Case 1:
> void
> f (uint8_t *restrict a, uint8_t *restrict b)
> {
> for (int i = 0; i < 100; ++i)
> {
> a[i * 8] = b[i * 8 + 37] + 1;
> a[i * 8 + 1] = b[i * 8 + 37] + 2;
> a[i * 8 + 2] = b[i * 8 + 37] + 3;
> a[i * 8 + 3] = b[i * 8 + 37] + 4;
> a[i *
Hi,
I forgot to check for vfmul in the multiplication tests. Fix this.
Regards
Robin
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vmul-rv32gcv.c: Check for
vfmul.
* gcc.target/riscv/rvv/autovec/binop/vmul-rv64gcv.c: Dito.
---
gcc/testsuite/gcc.target/
> This is a nice improvement. Even though we're in the SLP realm I would
> still add an assert that documents that we're indeed operating with
> pow2_p (NPATTERNS) and some comment as to why we can use AND.
> Sure we're doing exact_log2 et al later anyway, just to make things
> clearer.
Actually
On Tue, Jun 20, 2023 at 07:50:00AM +, Li, Pan2 wrote:
> Hi Jakub,
>
> Thanks for reviewing but I am not quite sure if I fully understand how to fix
> this issue. Could you please help to enlighten me more about this ?
>
> Currently for RISC-V, the memset has touched out of range memory alrea
> > >
> > > size_type
> > > _M_check_len(size_type __n, const char* __s) const
> > > {
> > > const size_type __size = size();
> > > const size_type __max_size = max_size();
> > >
> > > if (__is_same(allocator_type, allocator<_Tp>)
> > > && __s
Hi, Robin.
>> Actually no assert necessary, just a comment like:
>> /* As NPATTERNS is always a power of two, we can ..." */
Ok.
>> My immediate idea would have been to fall back to the first
>> approach, i.e. create the "0x00030002..." constant
>>and then
>> vid.v v4
vand.vi v4, v4, -4
>
On Tue, Jun 20, 2023 at 09:50:25AM +0200, Jan Hubicka wrote:
> > >
> > > size_type
> > > _M_check_len(size_type __n, const char* __s) const
> > > {
> > > const size_type __size = size();
> > > const size_type __max_size = max_size();
> > >
> > > if (__is_sa
Ok. No need to wait just commit.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-20 15:58
To: gcc-patches; palmer; Kito Cheng; juzhe.zh...@rivai.ai; jeffreyalaw
CC: rdapp.gcc
Subject: [PATCH] RISC-V: Fix vmul test expectation.
Hi,
I forgot to check for vfmul in the multiplication
Hi, Robin. Can you give me more details of the comments:
What about:
/* As NPATTERNS is always a power of two, we can optimize codegen of
VLA const vector according to this feature. */
Is this comment Ok ? You know I am always struggle with adding an English
comment or description.
Tha
On Jun 20 2023, Jakub Jelinek via Gcc-patches wrote:
> Is it safe even on 64bit targets? I mean, doesn't say PowerPC already allow
> full 64-bit virtual address space? The assumption that one can't have
> more than half of virtual address space allocations is true right now at
> least on x86-64,
On Tue, 20 Jun 2023 at 01:54, Patrick Palka wrote:
> On Fri, 9 Jun 2023, Jonathan Wakely via Libstdc++ wrote:
>
> > Tested powerpc64le-linux. Pushed to trunk.
> >
> > This makes sense to backport after some soak time on trunk.
> >
> > -- >8 --
> >
> > As reported in PR libstdc++/110167, std::to_a
On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
wrote:
>
> There's no reason to constrain this to AVX512VL, unless instructed so by
> -mprefer-vector-width=, as the wider operation is unusable for more
> narrow operands only when the possible memory source is a non-broadcast
> one. Thi
On Fri, Jun 2, 2023 at 3:01 AM liuhongt via Gcc-patches
wrote:
>
> We have already use intermidate type in case WIDEN, but not for NONE,
> this patch extended that.
>
> I didn't do that in pattern recog since we need to know whether the
> stmt belongs to any slp_node to decide the vectype, the rel
Hi,
This patch adds two peephole2 patterns which help convert certain insn
sequences to "mr." instruction. These insn sequences can't be combined in
combine pass.
Compared to last version, the empty constraint is removed and test cases
run only on powerpc Linux as AIX doesn't support "-mregnam
V2 patch adds comment for Robin:
/* As NPATTERNS is always a power of two, we can AND -NPATTERNS
to simplify the codegen. */
Recently, I figure out a better approach in case of codegen for VLA stepped
vector.
Here is the detail descriptions:
Case 1:
void
f (uint8_t *restrict a, uint8_t *res
> + /* Step 2: VID AND -NPATTERNS:
> + { 0&-4, 1&-4, 2&-4, 3 &-4, 4 &-4, 5 &-4, 6 &-4, 7 &-4, ... }
> + */
Before that, just add something simple like:
We want to create a pattern where value[ix] = floor (ix / NPATTERNS).
As NPATTERNS is always a power of two we
Ok. Just sent V2. I will adjust comment and send V3 again :)
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-20 16:55
To: juzhe.zh...@rivai.ai; gcc-patches
CC: rdapp.gcc; kito.cheng; Kito.cheng; palmer; palmer; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Optimize codegen of VLA SLP
> +
> Ok. Just sent V2. I will adjust comment and send V3 again :)
Sorry, was too slow.
Regards
Robin
Add comments for Robin:
We want to create a pattern where value[ix] = floor (ix / NPATTERNS).
As NPATTERNS is always a power of two we can rewrite this as
= ix & -NPATTERNS.
`
Recently, I figure out a better approach in case of codegen for VLA stepped
vector.
Here is the detail descriptions:
Cas
LGTM.
Regards
Robin
On Tue, Jun 20, 2023 at 4:41 PM Richard Biener
wrote:
>
> On Fri, Jun 2, 2023 at 3:01 AM liuhongt via Gcc-patches
> wrote:
> >
> > We have already use intermidate type in case WIDEN, but not for NONE,
> > this patch extended that.
> >
> > I didn't do that in pattern recog since we need to know wh
On 20.06.2023 10:33, Hongtao Liu wrote:
> On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
> wrote:
>>
>> I guess the underlying pattern, going along the lines of what
>> one_cmpl2 uses, can be applied elsewhere
>> as well.
> That should be guarded with !TARGET_PREFER_AVX256, let's hand
Hi,
on 2023/6/20 16:49, HAO CHEN GUI wrote:
> Hi,
> This patch adds two peephole2 patterns which help convert certain insn
> sequences to "mr." instruction. These insn sequences can't be combined in
> combine pass.
>
> Compared to last version, the empty constraint is removed and test cases
>
On Tue, Jun 20, 2023 at 11:02 AM Hongtao Liu wrote:
>
> On Tue, Jun 20, 2023 at 4:41 PM Richard Biener
> wrote:
> >
> > On Fri, Jun 2, 2023 at 3:01 AM liuhongt via Gcc-patches
> > wrote:
> > >
> > > We have already use intermidate type in case WIDEN, but not for NONE,
> > > this patch extended t
On Tue, Jun 20, 2023 at 5:03 PM Jan Beulich wrote:
>
> On 20.06.2023 10:33, Hongtao Liu wrote:
> > On Tue, Jun 20, 2023 at 3:07 PM Jan Beulich via Gcc-patches
> > wrote:
> >>
> >> I guess the underlying pattern, going along the lines of what
> >> one_cmpl2 uses, can be applied elsewhere
> >> as w
Disable zcmp multi push/pop if shrink-wrap-separate is active.
So in -Os that prefers smaller code size, by default shrink-wrap-separate
is disabled while zcmp multi push/pop is enabled.
And in -O2 and others that prefers speed, by default shrink-wrap-separate
is enabled while zcmp multi push/pop
These 2 patches resolve confilct between zcmp multi push/pop and
shrink-wrap-separate.
As per Kito's review comment
https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg310564.html,
I split the orginal patch into two parts: RISC-V part and
the rest part (shrink-wrap.h / shrink-wrap.cc).
Fei Ga
gcc/ChangeLog:
* shrink-wrap.cc (try_shrink_wrapping_separate):call
use_shrink_wrapping_separate.
(use_shrink_wrapping_separate): wrap the condition
check in use_shrink_wrapping_separate.
* shrink-wrap.h (use_shrink_wrapping_separate): add to extern
---
Hi,
This little patch fixes a compile warning issue that my previous patch
introduced, sorry for introducing this issue.
Best,
Lehua
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_arg_has_vector): Add default branch.
---
gcc/config/riscv/riscv.cc | 6 --
1 file changed, 4 insertio
Ok.
juzhe.zh...@rivai.ai
From: Lehua Ding
Date: 2023-06-20 17:45
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; kito.cheng; palmer; jeffreyalaw; pan2.li
Subject: [PATCH] RISC-V: Fix compiler warning of riscv_arg_has_vector
Hi,
This little patch fixes a compile warning issue that my previous pat
Hi Richard,
For the following reduced test-case taken from PR:
#include "arm_sve.h"
svuint32_t l() {
alignas(16) const unsigned int lanes[4] = {0, 0, 0, 0};
return svld1rq_u32(svptrue_b8(), lanes);
}
compiling with -O3 -mcpu=generic+sve results in following ICE:
during GIMPLE pass: fre
pr1102
Hi all,
We've been asked to optimise the testcase in this patch of a 64-bit ADDP with
the low and high halves of the same 128-bit vector. This can be done by a
single .4s ADDP followed by just reading the bottom 64 bits. A splitter for
this is quite straightforward now that all the vec_concat stuf
On Tue, 20 Jun 2023 at 09:21, Andreas Schwab wrote:
> On Jun 20 2023, Jakub Jelinek via Gcc-patches wrote:
>
> > Is it safe even on 64bit targets? I mean, doesn't say PowerPC already
> allow
> > full 64-bit virtual address space? The assumption that one can't have
> > more than half of virtual a
> This little patch fixes a compile warning issue that my previous
> patch introduced, sorry for introducing this issue.
OK and obvious enough to push directly.
Regards
Robin
When just matching a symbol, one can use 'gfc_match_symbol (&sym, host_assoc)'
and has the option to match with and without host association.
However, when matching something more complex via 'gfc_match' like
"something ( %s ) , " the match uses host_assoc = false.
While it can be combined ("some
This keeps virtual SSA form up-to-date in phiprop when easily possible.
Only when we deal with aggregate copies the work would be too
heavy-handed in general.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
* tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
On Tue, 20 Jun 2023 at 11:45, Jonathan Wakely wrote:
> On Tue, 20 Jun 2023 at 09:21, Andreas Schwab wrote:
>
>> On Jun 20 2023, Jakub Jelinek via Gcc-patches wrote:
>>
>> > Is it safe even on 64bit targets? I mean, doesn't say PowerPC already
>> allow
>> > full 64-bit virtual address space? The
Could you merge it ?
By the way, could Lehua get the write access?
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-06-20 18:47
To: Lehua Ding; gcc-patches
CC: rdapp.gcc; juzhe.zhong; kito.cheng; palmer; jeffreyalaw; pan2.li
Subject: Re: [PATCH] RISC-V: Fix compiler warning of riscv_ar
Hi Harald,
Fixing the original testcase in this PR turned out to be slightly more
involved than I expected. However, it resulted in an open door to fix
some other PRs and the attached much larger patch.
This time, I did remember to include the testcases in the .diff :-)
I believe that, between t
> Could you merge it ?
> By the way, could Lehua get the write access?
IMHO nothing stands in the way but I'll defer to Jeff to have
the "official seal" :)
Once he ACKs Lehua needs to go the usual way of requesting
sourceware access via https://sourceware.org/cgi-bin/pdw/ps_form.cgi.
Regards
Rob
Hi Tobias,
This looks good to me. I'm interested to see it in use :-)
OK for trunk
Paul
On Tue, 20 Jun 2023 at 11:50, Tobias Burnus wrote:
>
> When just matching a symbol, one can use 'gfc_match_symbol (&sym, host_assoc)'
> and has the option to match with and without host association.
>
> How
On Tue, Jun 20, 2023 at 11:56 AM Prathamesh Kulkarni via Gcc-patches
wrote:
>
> Hi Richard,
> For the following reduced test-case taken from PR:
>
> #include "arm_sve.h"
> svuint32_t l() {
> alignas(16) const unsigned int lanes[4] = {0, 0, 0, 0};
> return svld1rq_u32(svptrue_b8(), lanes);
> }
From: Ronan Desplanques
The Preelaborate pragma the removed comment was referring to was
indeed present in AI 167, as well as in clause 5.3 of the rationale
for Ada 2012, but it never made it into the 2012 version of the
reference manual.
gcc/ada/
* libgnarl/s-mudido.ads: Remove outdate
From: Yannick Moy
After the recent change on detection of non-inlining, calls inside
the iterator part of a quantified expression were not considered
as preventing inlining anymore, leading to a crash later on inside
GNATprove. Now fixed.
gcc/ada/
* sem_res.adb (Resolve_Call): Fix chang
From: Eric Botcazou
gcc/ada/
* gcc-interface/decl.cc (gnat_to_gnu_entity) : Pass
the NULL_TREE explicitly and test imported_p in lieu of
Is_Imported. : Remove public_flag local variable and
make extern_flag local variable a constant.
Tested on x86_64-pc-linux-gnu
From: Eric Botcazou
This removes more bypasses for private views in instances that are present
in type predicates (Conforming_Types, Covers, Specific_Type and Wrong_Type),
which in exchange requires additional work in Sem_Ch12 to restore the proper
view of types during the instantiation of generi
A rather obvious fix. The allocator(...) bit showed up with -fdump-parse-tree.
Committed as Rev. r14-1988-g99e3214f582b08
Side remark:
Regarding the example inside the commit log: OpenMP 5.1 permitted derived-type
components. Due to global wording changes, OpenMP 5.2 disabled it for both
the ne
> Committed, thanks Jeff.
The vec_set/vec_extract tests FAIL since this commit. I'm going to
commit the attached as obvious.
Lehua, would they not show up in your test runs? You fixed several
other tests but these somehow not?
Regards
Robin
Subject: [PATCH] RISC-V: testsuite: Add -Wno-psabi
On Tue, 20 Jun 2023, juzhe.zh...@rivai.ai wrote:
> From: Ju-Zhe Zhong
>
> This patch is apply LEN_MASK_{LOAD,STORE} into vectorizer.
> I refactor gimple IR build to make codes look cleaner.
>
> gcc/ChangeLog:
>
> * internal-fn.cc (expand_partial_store_optab_fn): Add
> LEN_MASK_{LOAD,S
Hi Iain,
On 14/05/2023 17:05, Iain Sandoe wrote:
> Hi Alex,
>
> thanks for working on this.
>
> I’ve applied this patch and evaluated on a few Darwin versions (which is the
> target currently most affected, I believe):
>
> > On 9 May 2023, at 13:07, Alex Coplan wrote:
>
> > This patch impleme
I just noticed there is also a -ffast-math missing in vadd-run.c
as well as one redundant in vrem-rv32gcv.c and added it to the
patch.
Going to commit the attached as obvious.
Regards
Robin
Subject: [PATCH] RISC-V: testsuite: Fix vmul test expectation and fix
-ffast-math.
I forgot to check fo
Hi,
this adds vector copysign, ncopysign and xorsign as well as the
accompanying tests.
In order to easily match the ncopysign patterns I changed the
builtin implementation slightly. Juzhe might want to comment
on that. For now I kept the attribute's name even though
it doesn't emit an "n" any
> Lehua, would they not show up in your test runs? You fixed several
> other tests but these somehow not?
Oh, I should know why. These cases of yours were added yesterday,
while I submitted the patch the day before, and then yesterday by Pan
to help me merge in after your cases. Sorry for introd
Hi,
On 20/06/2023 09:47, Marc Poulhiès via Gcc-patches wrote:
> From: Daniel King
>
> The package Interfaces.CHERI provides intrinsic bindings and
> helper functions to allow software to query, create, and
> manipulate CHERI capabilities.
I'm curious what the motivation for these intrinsic wrap
> Oh, I should know why. These cases of yours were added yesterday,
> while I submitted the patch the day before, and then yesterday by Pan
> to help me merge in after your cases. Sorry for introducing this issue,
> I'll submit a new fix patch.
Actually they are already in for a bit :)
51795b91073
> Could you merge it ?
Committed.
Regards
Robin
On 6/20/23 04:56, Robin Dapp wrote:
Could you merge it ?
By the way, could Lehua get the write access?
IMHO nothing stands in the way but I'll defer to Jeff to have
the "official seal" :)
Once he ACKs Lehua needs to go the usual way of requesting
sourceware access via https://sourceware.org/
> Actually they are already in for a bit :)
> 51795b910737 (Robin Dapp 2023-06-01 14:18:57 +0200 1) /* { dg-do
compile } */
>I thought something is special about them that they somehow didn't run
> on your machine or so.
The time I just said is your commit time from this link
https://gcc.gnu.or
On 6/20/23 03:01, Robin Dapp wrote:
LGTM.
Likewise -- that V2/V3 is a nice improvement over the original V1 approach.
jeff
Just a quick update, the benchmark code link has been updated and can
now be accessed at
https://github.com/ken-matsui/gcc-benches/blob/main/is_object.cc. I
have also created a report file which can be found at
https://github.com/ken-matsui/gcc-benches/blob/main/is_object.md.
On Thu, Jun 15, 2023
Just a quick update, the benchmark code link has been updated and can
now be accessed at
https://github.com/ken-matsui/gcc-benches/blob/main/remove_pointer.cc.
I have also created a report file which can be found at
https://github.com/ken-matsui/gcc-benches/blob/main/remove_pointer.md.
On Sat, Jun
> Lehua fills out that form. List me as the approver and the process
will
> run from there. Takes a day or two for everything to get into place.
I just followed this step to submit the form, thanks to Robin, Jeff and Juzhe.
Best,
Lehua
On 6/20/23 00:59, Richard Biener via Gcc-patches wrote:
DSE isn't good at identifying program points that end lifetime
of variables that are not associated with virtual operands. But
at least for those that end basic-blocks we can handle the simple
case where this ending is in the same basic-
I intend to push this to trunk once testing finishes.
I generated the diff with -b so the whitespace changes aren't shown,
because there was some re-indenting that makes the diff look larger than
it really is.
Honza, I don't think this is likely to make much difference for the PR
110287 testcases
From: Ju-Zhe Zhong
gcc/ChangeLog:
* internal-fn.cc (expand_partial_store_optab_fn): Add
LEN_MASK_{LOAD,STORE} vectorizer support.
(internal_load_fn_p): Ditto.
(internal_store_fn_p): Ditto.
(internal_fn_mask_index): Ditto.
(internal_fn_stored_value_index):
> -/* { dg-additional-options "-march=rv64gcv_zvfh -Wno-pedantic" } */
> +/* { dg-additional-options "-march=rv64gcv_zvfh -Wno-pedantic -Wno-psabi"
} */
By the way, shouldn't these cases have the `-mabi=lp64d` option added,
otherwise I get the following failure message when I run tests on RV32 GC
Hi, Richi. I am not sure why I failed to send this patch to @sues email at the
first time.
Now I cc your gmail.
This is the V2 patch addressing your comments for V1.
Thanks.
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-06-20 21:42
To: gcc-patches
CC: richard.sandiford; rguenther; Ju-Zhe
> By the way, shouldn't these cases have the `-mabi=lp64d` option added,
> otherwise I get the following failure message when I run tests on RV32 GCC.
>
> FAIL: gcc.target/riscv/rvv/autovec/vls-vlmax/vec_set-1.c -std=c99 -O3
> -ftree-vectorize --param riscv-autovec-preference=fixed-vlmax (test
Hi,
>> The package Interfaces.CHERI provides intrinsic bindings and
>> helper functions to allow software to query, create, and
>> manipulate CHERI capabilities.
>
> I'm curious what the motivation for these intrinsic wrappers is, given that
> GCC trunk doesn't currently support them. Out of inter
Committed, thanks Robin and Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Tuesday, June 20, 2023 9:18 PM
To: Robin Dapp ; Juzhe-Zhong ;
gcc-patches@gcc.gnu.org
Cc: kito.ch...@gmail.com; kito.ch...@sifive.com; pal...@dabbelt.com;
pal...@rivo
Hi,
I'm going to commit the attached. Thanks Lehua for reporting.
Regards
Robin
>From 1a4dfe90f251e38e27104f2fa11feecd3b04c4c1 Mon Sep 17 00:00:00 2001
From: Robin Dapp
Date: Tue, 20 Jun 2023 15:52:16 +0200
Subject: [PATCH] RISC-V: testsuite: Add missing -mabi=lp64d.
This fixes more cases o
Hi Alex
again, thanks for working on this and for fixing the SDK blocker.
> On 20 Jun 2023, at 13:30, Alex Coplan wrote:
>
> The patch can now survive bootstrap on Darwin (it looks like we'll need
> to adjust some Objective-C++ tests in light of the new pedwarn, but that
> looks to be straight
On 6/20/23 00:47, juzhe.zh...@rivai.ai wrote:
LGTM. Thanks!
OK for the trunk, of course.
jeff
Committed, thanks Jeff and Juzhe.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Tuesday, June 20, 2023 10:12 PM
To: juzhe.zh...@rivai.ai; Li Xu ; gcc-patches
Cc: kito.cheng ; palmer
Subject: Re: [PATCH v2] RISC-V: Set the natural size of constan
Thanks Jakub for the explanation, I have a try like below patch but I am not
quite sure it is expected, and where should I put the assertion.
> If yes, it needs to
> be unsigned short, if not, we should add an assertion (e.g. on streaming
> in the LTO table) that MAX_MACHINE_MODE <= 256.
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