LGTM
juzhe.zh...@rivai.ai
From: pan2.li
Date: 2023-06-19 14:46
To: gcc-patches
CC: juzhe.zhong; rdapp.gcc; jeffreyalaw; pan2.li; yanzhang.wang; kito.cheng
Subject: [PATCH v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
From: Pan Li
The rvv widdening reduction has 3 different patt
On 19.06.2023 04:07, Liu, Hongtao wrote:
>> -Original Message-
>> From: Jan Beulich
>> Sent: Friday, June 16, 2023 2:22 PM
>>
>> --- a/gcc/config/i386/sse.md
>> +++ b/gcc/config/i386/sse.md
>> @@ -12597,11 +12597,11 @@
>> (set_attr "mode" "")])
>>
>> (define_insn "*_vternlog_all"
>> -
Hi Carl,
on 2023/5/31 04:46, Carl Love wrote:
> GCC maintainers:
>
> The following patch takes the tests in vsx-vector-6-p7.h, vsx-vector-
> 6-p8.h, vsx-vector-6-p9.h and reorganizes them into a series of smaller
> test files by functionality rather than processor version.
>
> The patch has bee
On Sun, 18 Jun 2023, ??? wrote:
> Bootstrap and Regreesion on X86 passed.
> Jeff and Richi approved.
>
> Let's wait for Richard S final approve.
No need to wait.
Richard.
> Thanks.
>
>
> juzhe.zh...@rivai.ai
>
> From: juzhe.zhong
> Date: 2023-06-18 06:53
> To: gcc-patches
> CC: jeffreyalaw
Hi Hongtao,
on 2023/6/14 16:17, Hongtao Liu wrote:
> On Tue, Jun 13, 2023 at 10:07 AM Kewen Lin via Gcc-patches
> wrote:
>>
>> This patch adjusts the cost handling on
>> VMAT_CONTIGUOUS_PERMUTE in function vectorizable_load. We
>> don't call function vect_model_load_cost for it any more.
>>
>> A
On Fri, Jun 16, 2023 at 3:27 PM Roger Sayle wrote:
>
>
> Hi Uros,
> Here's an updated version of this patch incorporating your comments.
> It uses emit_insn (target, const1_rtx), bt_comparison operator to
> combine the sete/setne to setc/setnc, and je/jne to jc/jnc patterns,
> uses scan-assembler-
Hi,
this patch avoids unnecessary post dominator and update_ssa in phiprop.
Bootstrapped/regtested x86_64-linux, OK?
gcc/ChangeLog:
* tree-ssa-phiprop.cc (propagate_with_phi): Add
post_dominators_computed;
compute post dominators lazilly.
(const pass_data pass_data_phipr
Hi,
this was suggested earlier somewhere, but I can not find the thread.
C++ has assume attribute that expands int
if (conditional)
__builtin_unreachable ()
We do not want to account the conditional in inline heuristics since
we know that it is going to be optimized out.
Bootstrapped/regtest
On 16.06.23 22:42, Thomas Schwinge wrote:
I see the new tests PASS, but with offloading enabled (nvptx) also see:
PASS: libgomp.c/target-51.c (test for excess errors)
PASS: libgomp.c/target-51.c execution test
[-PASS:-]{+FAIL:+} libgomp.c/target-51.c output pattern test
... due t
From: Pan Li
We extend the machine mode from 8 to 16 bits already. But there still
one placing missing from the tree-streamer. It has one hard coded array
for the machine code like size 256.
In the lto pass, we memset the array by MAX_MACHINE_MODE count but the
value of the MAX_MACHINE_MODE will
Add Richard Biener for reviewing, sorry for inconvenient.
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, June 19, 2023 4:07 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; rdapp@gmail.com; jeffreya...@gmail.com; Li, Pan2
; Wang, Yanzhang ;
kito.ch...@gmail.com
Subjec
>> Bootstrap and Regreesion on X86 passed.
>> Jeff and Richi approved.
>>
>> Let's wait for Richard S final approve.
>
> No need to wait.
Thanks, I pushed it in Juzhe's stead, fixing the LEN_LOAD/LEN_STORE
documentation (+ vs -) as r14-1932.
Regards
Robin
On Mon, 19 Jun 2023, Jan Hubicka wrote:
> Hi,
> this patch avoids unnecessary post dominator and update_ssa in phiprop.
>
> Bootstrapped/regtested x86_64-linux, OK?
>
> gcc/ChangeLog:
>
> * tree-ssa-phiprop.cc (propagate_with_phi): Add
> post_dominators_computed;
> compute post dom
The mips16e2 ASE uses eight general-purpose registers
from mips32, with some special-purpose registers,
these registers are GPRs: s0-1, v0-1, a0-3, and
special registers: t8, gp, sp, ra.
As mentioned above, the special register gp is
used in mips16e2, which is the global pointer register,
it is us
This patch adds LUI instruction from mips16e2
with corresponding test.
gcc/ChangeLog:
* config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
(mips_const_insns): Same as above.
(mips_output_move): Same as above.
(mips_output_function_prologue): Same
The MIPS16e2 ASE has PREF, LL and SC instructions,
they use 9 bits immediate, like mips32r6.
The MIPS32 PRE-R6 uses 16 bits immediate.
gcc/ChangeLog:
* config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
for ISA_HAS_MIPS16E2.
(ISA_HAS_SYNC): Same as above.
(I
Patch V2: adds new patch.
Patch V3: `%{mmips16e2} \` puts the wrong palce in first patch,
V3 fix it.
Patch V4: fixed style error for the patch.
The MIPS16e2 ASE is an enhancement to the MIPS16e ASE,
which includes all MIPS16e instructions, with some addition.
This series of patches adds all instr
This patch adds LWL/LWR, SWL/SWR instructions with their
corresponding tests.
gcc/ChangeLog:
* config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
Add logics for generating instruction.
* config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
*
This patch allows mips16e2 acts the same with -O1~3
when generating ZEB/ZEH instead of ANDI under
the -O0 option, which shrinks the code size.
gcc/ChangeLog:
* config/mips/mips.md(*and3_mips16): Generates
ZEB/ZEH instructions.
---
gcc/config/mips/mips.md | 30 +
This patch adds CACHE instruction from mips16e2
with corresponding tests.
gcc/ChangeLog:
* config/mips/mips.c(mips_9bit_offset_address_p): Restrict the
address register to M16_REGS for MIPS16.
(BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
(AVAIL_MIPS16E2_OR_NON_MI
The MIPS16e2 ASE is an enhancement to the MIPS16e ASE,
which includes all MIPS16e instructions, with some addition.
It defines new special instructions for increasing
code density (e.g. Extend, PC-relative instructions, etc.).
This patch adds basic support for mips16e2 used by the
following series
This patch adds MOVx instructions from mips16e2
(movn,movz,movtn,movtz) with corresponding tests.
gcc/ChangeLog:
* config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for
ISA_HAS_MIPS16E2.
* config/mips/mips.md(*mov_on_): Add logics for
MOVx insts.
(*mov_on__mips16e2): G
There are shortened bitwise instructions in the mips16e2 ASE,
for instance, ANDI, ORI/XORI, EXT, INS etc. .
This patch adds these instrutions with corresponding tests.
gcc/ChangeLog:
* config/mips/constraints.md(Yz): New constraints for mips16e2.
* config/mips/mips-protos.h(mips_
The following fixes a reference to LOOP_VINFO_MASKS array in the
aarch64 backend after my changes.
Building on aarch64-linux, will push if that succeeds.
Richard.
* config/aarch64/aarch64.cc
(aarch64_vector_costs::analyze_loop_vinfo): Fix reference
to LOOP_VINFO_MASKS.
--
Hi Paul!
On 2023-06-16T11:00:02-0500, "Paul E. Murphy via Gcc-patches"
wrote:
> This was noticed when fixing the gccgo usage of the macro, the
> rust usage is very similar.
>
> TARGET_AIX is defined as a non-zero value on linux/powerpc64le
> which may cause unexpected behavior. TARGET_AIX_OS sh
On Mon, 19 Jun 2023, Li, Pan2 wrote:
> Add Richard Biener for reviewing, sorry for inconvenient.
>
> Pan
>
> -Original Message-
> From: Li, Pan2
> Sent: Monday, June 19, 2023 4:07 PM
> To: gcc-patches@gcc.gnu.org
> Cc: juzhe.zh...@rivai.ai; rdapp@gmail.com; jeffreya...@gmail.com; L
On Sun, Jun 18, 2023 at 5:55 PM Jan Hubicka via Gcc-patches
wrote:
>
> Hi,
> we currently produce very bad code on loops using std::vector as a stack,
> since
> we fail to inline push_back which in turn prevents SRA and we fail to optimize
> out some store-to-load pairs (PR109849).
>
> I looked i
Spot-tested on aarch64-linux-gnu, pushed as obvious.
Richard
gcc/
* tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
Handle null niters_skip.
---
gcc/tree-vect-loop-manip.cc | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/gcc/tree-vect-loo
On Mon, Jun 19, 2023 at 3:09 PM Jan Beulich via Gcc-patches
wrote:
>
> On 19.06.2023 04:07, Liu, Hongtao wrote:
> >> -Original Message-
> >> From: Jan Beulich
> >> Sent: Friday, June 16, 2023 2:22 PM
> >>
> >> --- a/gcc/config/i386/sse.md
> >> +++ b/gcc/config/i386/sse.md
> >> @@ -12597,1
Since r14-1807-g4bcb46b3ade179, using -foffload-options='-lgfortran -lm' are
no longer required as they get automatically linked on the offload side, if
linked on the host side. (Linking with g++ implies -lm, with gfortran
'-lgfortran -lm', while an explicit 'gcc -lm -lgfortran' would also do the
On Mon, Jun 19, 2023 at 9:52 AM Jan Hubicka via Gcc-patches
wrote:
>
> Hi,
> this was suggested earlier somewhere, but I can not find the thread.
> C++ has assume attribute that expands int
> if (conditional)
> __builtin_unreachable ()
> We do not want to account the conditional in inline he
From: Pan Li
We extend the machine mode from 8 to 16 bits already. But there still
one placing missing from the tree-streamer. It has one hard coded array
for the machine code like size 256.
In the lto pass, we memset the array by MAX_MACHINE_MODE count but the
value of the MAX_MACHINE_MODE will
When unrolling we eventually kill nb_iterations info since it may
refer to removed SSA names. But we do this only after cleaning
up the CFG which in turn can end up accessing it. Fixed by
swapping the two.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization
Thanks Richard for the review, just go thru the word (1 << 8) and found another
one besides bp. Update the PATCH v2 as below.
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/622151.html
Pan
-Original Message-
From: Richard Biener
Sent: Monday, June 19, 2023 4:41 PM
To: Li, Pan2
C
On Mon, Jun 19, 2023 at 08:40:58AM +, Richard Biener wrote:
> You also have to fix bp_pack_machine_mode/bp_unpack_machine_mode which
> streams exactly values in [0, 1<<8 - 1].
>
> CCing Jakub who invented this code.
For stream-out, all it stores is a bool flag whether the mode is streamed
out
On Mon, 19 Jun 2023, pan2...@intel.com wrote:
> From: Pan Li
>
> We extend the machine mode from 8 to 16 bits already. But there still
> one placing missing from the tree-streamer. It has one hard coded array
> for the machine code like size 256.
>
> In the lto pass, we memset the array by MAX_
On Mon, Jun 19, 2023 at 05:05:48PM +0800, pan2...@intel.com wrote:
> --- a/gcc/lto-streamer-in.cc
> +++ b/gcc/lto-streamer-in.cc
> @@ -1985,7 +1985,8 @@ lto_input_mode_table (struct lto_file_decl_data
> *file_data)
> internal_error ("cannot read LTO mode table from %s",
> fi
> -Original Message-
> From: Richard Biener
> Sent: Monday, June 19, 2023 7:28 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Tamar Christina
> Subject: [PATCH] Remove -save-temps from tests using -flto
>
> The following removes -save-temps that doesn't seem to have any good
> reason from tests
Jeff Law writes:
> On 6/16/23 06:02, Thiago Jung Bauermann via Gcc-patches wrote:
>> contrib/ChangeLog:
>> * testsuite-management/validate_failures.py (IsInterestingResult):
>> Add result_set argument and use it. Adjust callers.
> Thanks. I pushed this to the trunk.
Thank you!
--
On Sun, 18 Jun 2023 at 19:37, Jan Hubicka wrote:
> Hi,
> _M_check_len is used in vector reallocations. It computes __n + __s but
> does
> checking for case that (__n + __s) * sizeof (Tp) would overflow ptrdiff_t.
> Since we know that __s is a size of already allocated memory block if __n
> is
> n
When we process a scope typedef during early debug creation and
we have already created a DIE for the type when the decl is
TYPE_DECL_IS_STUB and this DIE is still in limbo we end up
just re-parenting that type DIE instead of properly creating
a DIE for the decl, eventually picking up the now compl
> On Mon, Jun 19, 2023 at 9:52 AM Jan Hubicka via Gcc-patches
> wrote:
> >
> > Hi,
> > this was suggested earlier somewhere, but I can not find the thread.
> > C++ has assume attribute that expands int
> > if (conditional)
> > __builtin_unreachable ()
> > We do not want to account the condit
On Mon, 19 Jun 2023, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Monday, June 19, 2023 7:28 AM
> > To: gcc-patches@gcc.gnu.org
> > Cc: Tamar Christina
> > Subject: [PATCH] Remove -save-temps from tests using -flto
> >
> > The following removes -save-
Hi!
On 2023-06-19T10:02:58+0200, Tobias Burnus wrote:
> On 16.06.23 22:42, Thomas Schwinge wrote:
>> I see the new tests PASS, but with offloading enabled (nvptx) also see:
>>
>> PASS: libgomp.c/target-51.c (test for excess errors)
>> PASS: libgomp.c/target-51.c execution test
>> [
Hi,
With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x +
0.0' to 'x'.
GCC Bugzilla : Bug 110305
gcc/ChangeLog:
2023-06-19 Toru Kisuki
* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
---
gcc/simplify-rtx.cc | 3 ++-
1 file changed, 2 inserti
> -Original Message-
> From: Richard Biener
> Sent: Monday, June 19, 2023 11:19 AM
> To: Tamar Christina
> Cc: gcc-patches@gcc.gnu.org
> Subject: RE: [PATCH] Remove -save-temps from tests using -flto
>
> On Mon, 19 Jun 2023, Tamar Christina wrote:
>
> > > -Original Message-
> >
> > - if (max_size() - size() < __n)
> > - __throw_length_error(__N(__s));
> > + // On 64bit systems vectors of small sizes can not
> > + // reach overflow by growing by small sizes; before
> > + // this happens, we will run out of memory.
> > + if (__builtin_c
On Mon, 19 Jun 2023, Tamar Christina wrote:
> > -Original Message-
> > From: Richard Biener
> > Sent: Monday, June 19, 2023 11:19 AM
> > To: Tamar Christina
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: RE: [PATCH] Remove -save-temps from tests using -flto
> >
> > On Mon, 19 Jun 2023, Ta
On Mon, Jun 19, 2023 at 01:05:36PM +0200, Jan Hubicka via Gcc-patches wrote:
> - if (max_size() - size() < __n)
> - __throw_length_error(__N(__s));
> + const size_type __max_size = max_size();
> + // On 64bit systems vectors can not reach overflow by growing
> + // by small si
On Mon, Jun 19, 2023 at 12:15 PM Jan Hubicka wrote:
>
> > On Mon, Jun 19, 2023 at 9:52 AM Jan Hubicka via Gcc-patches
> > wrote:
> > >
> > > Hi,
> > > this was suggested earlier somewhere, but I can not find the thread.
> > > C++ has assume attribute that expands int
> > > if (conditional)
> >
There were implementations for HImode division in libgcc, but there were
no matching libfuncs defined in the compiler, so the code was inactive
(GCC only defines SImode and DImode, by default, and amdgcn only adds
TImode explicitly).
On trying to activate it I find that the definition of
TARG
This patch adds just enough TImode vector support to use them for moving
data about. This is primarily for the use of divmodv64di4, which will
use TImode to return a pair of DImode values.
The TImode vectors have no other operators defined, and there are no
hardware instructions to support thi
On Mon, Jun 19, 2023 at 1:30 PM Richard Biener
wrote:
>
> On Mon, Jun 19, 2023 at 12:15 PM Jan Hubicka wrote:
> >
> > > On Mon, Jun 19, 2023 at 9:52 AM Jan Hubicka via Gcc-patches
> > > wrote:
> > > >
> > > > Hi,
> > > > this was suggested earlier somewhere, but I can not find the thread.
> > >
On 6/19/23 00:56, Robin Dapp wrote:
If the pattern is not allowed to fail, then what code enforces the bias
argument's restrictions? I don't see it in the generic expander code.
I have no ideal since this is just copied from len_load/len_store which is
s390 target dependent stuff.
I have s
On Mon, Jun 19, 2023 at 12:33 PM Toru Kisuki via Gcc-patches
wrote:
>
> Hi,
>
>
> With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x
> + 0.0' to 'x'.
>
OK if you bootstrapped / tested this change.
Thanks,
Richard.
> GCC Bugzilla : Bug 110305
>
>
> gcc/ChangeLog:
>
> 2
On 6/19/23 01:01, juzhe.zh...@rivai.ai wrote:
LGTM
ACK for the trunk.
jeff
The following works around the lack of the x86 backend making the
vectorizer compare the costs of the different possible vector
sizes the backed advertises through the vector_modes hook. When
enabling masked epilogues or main loops then this means we will
select the prefered vector mode which is u
Thanks Jeff, will commit this one after the RVV float reduction PATCH (reviewed
by Juzhe already).
Pan
-Original Message-
From: Jeff Law
Sent: Monday, June 19, 2023 7:45 PM
To: juzhe.zh...@rivai.ai; Li, Pan2 ; gcc-patches
Cc: Robin Dapp ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [P
On 6/19/23 00:05, juzhe.zh...@rivai.ai wrote:
LGTM.
OK
jeff
Thanks Jakub for reviewing, sorry for misleading and will have a try for PATCH
v3.
Pan
-Original Message-
From: Jakub Jelinek
Sent: Monday, June 19, 2023 5:17 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; rdapp@gmail.com;
jeffreya...@gmail.com; Wang, Yanzhang
Ok for trunk?
And a reminder to myself that this PATCH should be committed before the RVV
widen reduction one.
Pan
From: 钟居哲
Sent: Sunday, June 18, 2023 9:15 PM
To: Li, Pan2 ; gcc-patches
Cc: rdapp.gcc ; Jeff Law ; Li, Pan2
; Wang, Yanzhang ; kito.cheng
Subject: Re: [PATCH v2] RISC-V: Bugf
On 6/18/23 07:14, 钟居哲 wrote:
Thanks for fixing it for me.
LGTM now.
OK for the trunk.
jeff
On 6/18/23 04:22, Roger Sayle wrote:
An x86 backend improvement that I'm working results in combine attempting
to recognize:
(set (reg:DI 87 [ xD.2846 ])
(ior:DI (subreg:DI (ashift:TI (zero_extend:TI (reg:DI 92))
(const_int 64 [0x40])) 0)
On Mon, Jun 12, 2023 at 03:29:00PM -0600, Jeff Law wrote:
>
>
> On 6/12/23 01:57, Stefan Schulze Frielinghaus via Gcc-patches wrote:
> > Comparisons between memory and constants might be done in a smaller mode
> > resulting in smaller constants which might finally end up as immediates
> > instead
May I please ping this one? FWIW, it's 10 months old now without any feedback.
https://gcc.gnu.org/pipermail/gcc-patches/2022-December/607647.html
Most of the changes are just adapting the testsuite to look for the
improved diagnostic location. Otherwise it's a handful of lines in
libcpp and it ju
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, June 19, 2023 9:51 PM
To: 钟居哲 ; Li, Pan2 ; gcc-patches
Cc: rdapp.gcc ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v2] RISC-V: Bugfix for RVV float reduction in ZVE32/64
On 6/18/23 07:14, 钟居哲 wrote:
>
Comparisons between memory and constants might be done in a smaller mode
resulting in smaller constants which might finally end up as immediates
instead of in the literal pool.
For example, on s390x a non-symmetric comparison like
x <= 0x3fff
results in the constant being spilled to
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Monday, June 19, 2023 7:45 PM
To: juzhe.zh...@rivai.ai; Li, Pan2 ; gcc-patches
Cc: Robin Dapp ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v2] RISC-V: Bugfix for RVV widenning reduction in ZVE32/64
On 6/19/2
Committed, thanks Jeff.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Jeff Law via Gcc-patches
Sent: Monday, June 19, 2023 9:10 PM
To: juzhe.zh...@rivai.ai; Li Xu ; gcc-patches
Cc: kito.cheng ; palmer
Subject: Re: [PATCH v2] RISC-V: Fix VWEXTF iterator requirement
On 6/19/
Also change some internal variables to bool and change return type of
split_all_insns_noflow to void.
gcc/ChangeLog:
* recog.h (check_asm_operands): Change return type from int to bool.
(insn_invalid_p): Ditto.
(verify_changes): Ditto.
(apply_change_group): Ditto.
(constrain_o
On Mon, 19 Jun 2023 at 12:20, Jakub Jelinek wrote:
> On Mon, Jun 19, 2023 at 01:05:36PM +0200, Jan Hubicka via Gcc-patches
> wrote:
> > - if (max_size() - size() < __n)
> > - __throw_length_error(__N(__s));
> > + const size_type __max_size = max_size();
> > + // On 64bit systems
P.S. please CC libstd...@gcc.gnu.org for all libstdc++ patches.
On Mon, 19 Jun 2023 at 16:13, Jonathan Wakely wrote:
> On Mon, 19 Jun 2023 at 12:20, Jakub Jelinek wrote:
>
>> On Mon, Jun 19, 2023 at 01:05:36PM +0200, Jan Hubicka via Gcc-patches
>> wrote:
>> > - if (max_size() - size() < __n)
On Mon, 19 Jun 2023 at 16:13, Jonathan Wakely wrote:
> On Mon, 19 Jun 2023 at 12:20, Jakub Jelinek wrote:
>
>> On Mon, Jun 19, 2023 at 01:05:36PM +0200, Jan Hubicka via Gcc-patches
>> wrote:
>> > - if (max_size() - size() < __n)
>> > - __throw_length_error(__N(__s));
>> > + const si
GCC maintainers:
The GLibC team requested a builtin to replace the mffscrn and mffscrniinline
asm instructions in the GLibC code. Previously there was discussion on adding
builtins for the mffscrn instructions.
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/620261.html
In the end, it was
> On Mon, 19 Jun 2023 at 12:20, Jakub Jelinek wrote:
>
> > On Mon, Jun 19, 2023 at 01:05:36PM +0200, Jan Hubicka via Gcc-patches
> > wrote:
> > > - if (max_size() - size() < __n)
> > > - __throw_length_error(__N(__s));
> > > + const size_type __max_size = max_size();
> > > + // O
From: Ju-Zhe Zhong
This patch is apply LEN_MASK_{LOAD,STORE} into vectorizer.
I refactor gimple IR build to make codes look cleaner.
gcc/ChangeLog:
* internal-fn.cc (expand_partial_store_optab_fn): Add
LEN_MASK_{LOAD,STORE} vectorizer support.
(internal_load_fn_p): Ditto.
Hello Manolis,
Philipp Tomsich writes:
> On Thu, 8 Jun 2023 at 00:18, Jeff Law wrote:
>>
>> On 5/25/23 06:35, Manolis Tsamis wrote:
>> > Propagation of the stack pointer in cprop_hardreg is currenty forbidden
>> > in all cases, due to maybe_mode_change returning NULL. Relax this
>> > restrict
Ping. OK for trunk?
On Mon, 5 Jun 2023, Alexander Monakov wrote:
> Ping for the front-end maintainers' input.
>
> On Mon, 22 May 2023, Richard Biener wrote:
>
> > On Thu, May 18, 2023 at 11:04 PM Alexander Monakov via Gcc-patches
> > wrote:
> > >
> > > Implement -ffp-contract=on for C and C+
On Mon, Jun 19, 2023 at 7:57 PM Thiago Jung Bauermann
wrote:
>
>
> Hello Manolis,
>
> Philipp Tomsich writes:
>
> > On Thu, 8 Jun 2023 at 00:18, Jeff Law wrote:
> >>
> >> On 5/25/23 06:35, Manolis Tsamis wrote:
> >> > Propagation of the stack pointer in cprop_hardreg is currenty forbidden
> >> >
On 6/19/23 06:15, Richard Biener wrote:
When we process a scope typedef during early debug creation and
we have already created a DIE for the type when the decl is
TYPE_DECL_IS_STUB and this DIE is still in limbo we end up
just re-parenting that type DIE instead of properly creating
a DIE for the
On 6/19/23 05:41, Richard Biener via Gcc-patches wrote:
On Mon, Jun 19, 2023 at 12:33 PM Toru Kisuki via Gcc-patches
wrote:
Hi,
With -O3 -fsignaling-nans -fno-signed-zeros, compiler should not simplify 'x +
0.0' to 'x'.
OK if you bootstrapped / tested this change.
I'm suspect Toru doe
On 6/18/23 07:16, 钟居哲 wrote:
Thanks for cleaning up codes for future's ABI support patch.
Let's wait for Jeff or Robin comments.
Looks reasonable to me given the state we're in WRT psabi and vectors.
jeff
On Mon, Jun 19, 2023 at 1:32 AM Richard Biener via Gcc-patches
wrote:
>
> On Mon, 19 Jun 2023, Jan Hubicka wrote:
>
> > Hi,
> > this patch avoids unnecessary post dominator and update_ssa in phiprop.
> >
> > Bootstrapped/regtested x86_64-linux, OK?
> >
> > gcc/ChangeLog:
> >
> > * tree-ssa-p
> Am 19.06.2023 um 20:08 schrieb Andrew Pinski via Gcc-patches
> :
>
> On Mon, Jun 19, 2023 at 1:32 AM Richard Biener via Gcc-patches
> wrote:
>>
>>> On Mon, 19 Jun 2023, Jan Hubicka wrote:
>>>
>>> Hi,
>>> this patch avoids unnecessary post dominator and update_ssa in phiprop.
>>>
>>> Boo
> Am 19.06.2023 um 19:03 schrieb Alexander Monakov :
>
>
> Ping. OK for trunk?
Ok if the FE maintainers do not object within 48h.
Thanks,
Richard
>> On Mon, 5 Jun 2023, Alexander Monakov wrote:
>>
>> Ping for the front-end maintainers' input.
>>
>>> On Mon, 22 May 2023, Richard Biener w
On 6/18/23 17:06, Juzhe-Zhong wrote:
This patch is a propsal patch is **NOT** ready to push since
after this patch the total machine modes will exceed 255 which will create ICE
in LTO:
internal compiler error: in bp_pack_int_in_range, at data-streamer.h:290
Right. Note that an ack from Jak
On 6/16/23 06:34, Richard Biener via Gcc-patches wrote:
IVOPTs has strip_offset which suffers from the same issues regarding
integer overflow that split_constant_offset did but the latter was
fixed quite some time ago. The following implements strip_offset
in terms of split_constant_offset, r
Kewen:
On Mon, 2023-06-19 at 14:08 +0800, Kewen.Lin wrote:
> >
> Hi Carl,
>
> on 2023/6/17 01:57, Carl Love wrote:
> > overloaded instance. Update comments.
> > * config/rs6000/rs6000-overload.def
> > (__builtin_vec_scalar_insert_exp): Add new overload definition
> > with
> >
On 16 June 2023 07:35:27 CEST, Alexandre Oliva via Gcc-patches
wrote:
index 0..634feaed4deef
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/hardbool-err.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+typedef _Bool __attribute__ ((__hardbool__))
+hbbl; /* { dg-error
Kewen, GCC maintainers:
Version 6, Fixed missing change log entry. Changed builtin id names as
requested. Missed making the change on the last version. Fixed
comment in the three test cases. Reran regression suite on Power 10,
no regressions.
Version 5, Tested the patch on P9 BE per request
On 6/14/23 01:57, Jin Ma wrote:
In order to avoid interrupt functions to change the FCSR, it needs to be saved
and restored at the beginning and end of the function.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for
FCSR.
(riscv_for_each_s
Jeff Law writes:
> On 6/16/23 06:34, Richard Biener via Gcc-patches wrote:
>> IVOPTs has strip_offset which suffers from the same issues regarding
>> integer overflow that split_constant_offset did but the latter was
>> fixed quite some time ago. The following implements strip_offset
>> in terms
This series (for the og13 branch) is a rebased and merged version of
the first few patches of the series previously sent upstream for mainline:
https://gcc.gnu.org/pipermail/gcc-patches/2022-December/609031.html
The series contains patches 1-6 and the parts of 8 ("C++
"declare mapper" support)
This reverts commit 3385743fd2fa15a2a750a29daf6d4f97f5aad0ae.
2023-06-16 Julian Brown
Revert:
2022-02-24 Chung-Lin Tang
gcc/c/ChangeLog:
* c-typeck.cc (handle_omp_array_sections): Add handling for
creating array-reference base-pointer attachment clause.
gcc/cp/Cha
This reverts commit c9cd2bac6a5127a01c6f47e5636a926ac39b5e21.
2023-06-16 Julian Brown
gcc/fortran/
Revert:
* trans-openmp.cc (gfc_omp_finish_clause): Guard addition of clauses for
pointers with DECL_P.
gcc/
Revert:
* gimplify.cc (oacc_array_mapping_info
This reverts commit 72733f6e6f6ec1bb9884fea8bfbebd3de03d9374.
2023-06-16 Julian Brown
gcc/
Revert:
* gimplify.cc (gimplify_adjust_omp_clauses_1): Raise error for
assumed-size arrays in map clauses for Fortran/OpenMP.
* omp-low.cc (lower_omp_target): Set the size
This reverts commit a84b89b8f070f1efe86ea347e98d57e6bc32ae2d.
Relevant tests are temporarily disabled or XFAILed.
2023-06-16 Julian Brown
gcc/
Revert:
* gimplify.cc (oacc_array_mapping_info): New struct.
(gimplify_omp_ctx): Add decl_data_clause hash map.
(new_o
Following from discussion in:
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570075.html
and:
https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608100.html
and also upstream OpenMP issue 342, this patch changes mapping for array
sections of pointer components on compute regions li
This patch trivially adds braces and reindents the
OMP_CLAUSE_TO/OMP_CLAUSE_FROM/OMP_CLAUSE__CACHE_ stanza in
c_finish_omp_clause and finish_omp_clause, in preparation for the
following patch (to clarify the diff a little).
2022-09-13 Julian Brown
gcc/c/
* c-typeck.cc (c_finish_omp_cla
This patch reimplements the functionality of the previously-reverted
patch "Assumed-size arrays with non-lexical data mappings". The purpose
is to support implicit uses of assumed-size arrays for Fortran when those
arrays have already been mapped on the target some other way (e.g. by
"acc enter dat
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