I will rebase and commit this patch, thanks!
Lili.
> -Original Message-
> From: Cui, Lili
> Sent: Thursday, May 25, 2023 7:30 AM
> To: gcc-patches@gcc.gnu.org
> Cc: richard.guent...@gmail.com; li...@linux.ibm.com; Cui, Lili
>
> Subject: [PATCH] Handle FMA friendly in reassoc pass
>
>
When resetting the parent link after having restored the selected
component node, the assertion used was incorrectly triggered when the
traversal hits the members of the parameters association list, as in:
This.Some_Func (Param1, Param2).Dispatching_Call
When restoring the selected component f
From: Piotr Trojanek
Aspects Pre/Post attached to an access-to-subprogram type were relocated
to a spec of a wrapper subprogram and analyzed there; the body of the
wrapper was only created with expansion enabled. However, there were
several problems with this approach.
When switch -gnat2022 was
From: Yannick Moy
GNATprove has ad-hoc support for the standard numerical functions, which
consists in emitting an unprovable preconditions on cases which could
lead to an overflow. These functions are thus valid to call from SPARK
code.
gcc/ada/
* libgnat/a-ngelfu.ads: Restore SPARK_Mo
From: Piotr Trojanek
Calls to Install_Formals are typically enclosed by Push_Scope/End_Scope.
There were just two such calls that instead used Pop_Scope, but most
likely that was by mistake.
Cleanup related to handling of class-wide contracts. Behavior appears to
be unaffected.
gcc/ada/
From: Javier Miranda
The frontend reports spurious errors on operators found in
interpolated string literals.
gcc/ada/
* scans.ads (Inside_Interpolated_String_Expression): New variable.
* par-ch2.adb (P_Interpolated_String_Literal): Set/clear new
variable when parsing in
From: Johannes Kliemann
The QNX runtimes used the default implementation of
System.Parameters that defines a default stack size
of 2 MB. The QNX specific version uses the QNX default
stack size of 256 KB instead.
gcc/ada/
* Makefile.rtl (QNX): Use s-parame__qnx.adb for s-parame.adb.
From: Arnaud Charlet
By marking relevant functions inline when -gnatn is used.
gcc/ada/
* sem_ch7.adb: Refine handling of inlining for CCG
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_ch7.adb | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff
From: Piotr Trojanek
When retrieving entities of subprogram spec we only handled functions
and procedures, but not entries. This had no consequences, because we
then only applied checks to functions, but still is worth a cleanup, so
the code is easier to adapt for access-to-subprogram entities as
From: Piotr Trojanek
Fix grammar in error message; make it consistent with a similar message
for pre/postcondition on formal subprogram.
gcc/ada/
* sem_prag.adb (Analyze_Pre_Post_Condition): Tune error message.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_prag.
From: Eric Botcazou
The problem is that the renaming slightly changes the form of a global
reference that was saved during the analysis of a generic package, and
that is sufficient to fool the code adjusting global references during
the instantiation.
gcc/ada/
* sem_ch12.adb (Copy_Gener
From: Javier Miranda
The frontend may crash processing an aggregate initializing
a derived tagged record type that has discriminants.
gcc/ada/
* sem_aggr.adb
(Resolve_Record_Aggregate): For aggregates of derived tagged
record types with discriminants, when collecting com
From: Piotr Trojanek
Make the message consistent with the one for postcondition.
gcc/ada/
* sem_util.adb (Check_Result_And_Post_State): Tune message.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_util.adb | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Initializing a vector using
Vec : V.Vector := [Some_Type'(Some_Abstract_Type with F => 0)];
may crash the compiler. The expander marks the N_Extension_Aggregate for
delayed expansion which never happens and incorrectly ends up in gigi.
The delayed expansion is needed for nested aggregates, whic
From: Piotr Trojanek
Cleanup related to handling of access-to-subprogram types with Pre and
Post aspects. Behavior is unaffected.
gcc/ada/
* sem_util.adb (Check_Result_And_Post_State): Replace low-level
navigation with a high-level Unique_Entity.
Tested on x86_64-pc-linux-gnu,
From: Eric Botcazou
It was partially broken to fix a regression in error reporting, because the
fix was applied to the first pass of resolution instead of the second pass,
as needs to be done for user-defined literals.
gcc/ada/
* sem_ch4.ads (Unresolved_Operator): New procedure.
From: Piotr Trojanek
Rules about parameters of modes OUT and IN OUT in aspect
Exceptional_Cases only apply to the parameters of the current
subprogram.
gcc/ada/
* sem_res.adb (Resolve_Entity_Name): Refine rules for Exceptional_Cases.
Tested on x86_64-pc-linux-gnu, committed on master.
From: Piotr Trojanek
When preanalysing class-wide conditions, we restore "Function (Object)"
to its original "Object.Function" notation. This requires the Parent
links to be fixed. We did it for nodes; now we do it for lists as well.
This patch is enough to fix assertion failure in CCG and to ma
From: Eric Botcazou
This happens when the call is a dependent expression of the conditional
expression, and the conditional expression is either the expression of a
simple return statement or the return expression of an expression function.
The reason is that the special processing of "tail call
From: Piotr Trojanek
Calls to First on No_List intentionally return Empty, so explicit guards
against No_List are unnecessary. Code cleanup; semantics is unaffected.
gcc/ada/
* sem_util.adb (Check_Function_Writable_Actuals): Remove guard against
a membership test with no alterna
From: Eric Botcazou
The result must be False as per the RM 4.5.2 (30.2/4) clause.
gcc/ada/
* exp_ch4.adb (Expand_N_In): Deal specifically with a null operand.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_ch4.adb | 8 +---
1 file changed, 5 insertions(+), 3
From: Steve Baird
If the Default_Component_Value aspect is specified for an array type, then
specifying Initialize_Scalars or Normalize_Scalars should have no effect
on the default initialization of an object of the array type.
gcc/ada/
* exp_ch3.adb
(Expand_N_Object_Declaration
From: Eric Botcazou
It comes from a superfluous adjustment for subarray components.
gcc/ada/
* exp_aggr.adb (Initialize_Array_Component): Fix condition detecting
the nested case that requires an adjustment.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/exp_a
From: Eric Botcazou
The same guard must be added to Expand_Simple_Function_Return as the one
that was added to Analyze_Function_Return.
gcc/ada/
* exp_ch6.adb (Expand_Simple_Function_Return): Deal with a rewriting
of the simple return during the adjustment of its expression.
Te
From: Piotr Trojanek
Calls to access-to-subprogram from its own pre/post aspects are rejected
as illegal, e.g.:
type F is access function (X : Natural) return Boolean with
Pre => F.all (X);
but they caused an assertion failure in detection of recursive calls.
Now they are properly reco
From: Piotr Trojanek
Attributes that do not read data from the object can be safely used in
consequences of Exceptional_Cases regardless of the parameter passing
mode.
gcc/ada/
* sem_res.adb (Resolve_Entity_Name): Relax rules for Exceptional_Cases.
Tested on x86_64-pc-linux-gnu, commit
From: Eric Botcazou
This happens when the pragmas are deferred to the back-end from an external
unit to the main unit that is generic, because the back-end does not compile
a main unit that is generic.
gcc/ada/
* sem_prag.adb (Process_Compile_Time_Warning_Or_Error): Do not defer
From: Eric Botcazou
The problem is that a transient temporary created for the constant indexing
of the container is finalized almost immediately after its creation.
gcc/ada/
* exp_util.adb (Is_Finalizable_Transient.Is_Indexed_Container):
New predicate to detect a temporary creat
From: Piotr Trojanek
Aspects Pre/Post that annotate access-to-subprogram type were attached
to the source entity (whose kind is either E_Access_Subprogram_Type or
E_Access_Protected_Subprogram_Type). However, it is more convenient to
attach them to the internal entity (whose kind is E_Subprogram_
From: Eric Botcazou
The test is inspired from the example of user-defined literals given in the
Ada 2022 RM. Mixed Arabic numbers/Roman numbers computations are rejected
because the second resolution pass would try to resolve Arabic numbers only
as user-defined literals.
gcc/ada/
* sem
From: Eric Botcazou
It may lead to an infinite recursion if no interpretation exists.
gcc/ada/
* sem_res.adb (Try_User_Defined_Literal): Restrict previous change
to non-leaf nodes.
Tested on x86_64-pc-linux-gnu, committed on master.
---
gcc/ada/sem_res.adb | 10 ++
1
From: Eric Botcazou
We fail to establish a transient scope around the return statement because
the function returns a controlled type, but this is no longer problematic
because controlled types are no longer returned on the secondary stack.
gcc/ada/
* exp_ch7.adb (Establish_Transient_Sc
From: Eric Botcazou
This happens when the case expression contains a single alternative.
gcc/ada/
* exp_ch5.adb (Expand_N_Case_Statement): Do not remove the statement
if it is the node to be wrapped by a transient scope.
Tested on x86_64-pc-linux-gnu, committed on master.
---
From: Eric Botcazou
This implements the recursive resolution of conditional expressions whose
dependent expressions are (all) user-defined literals the same way it is
implemented for operators.
gcc/ada/
* sem_res.adb (Has_Applicable_User_Defined_Literal): Make it clear
that the
From: Piotr Trojanek
Avoid repeated calls to Get_TSS_Name. Code cleanup related to handling
of dispatching operations in GNATprove; semantics is unaffected.
gcc/ada/
* exp_aggr.adb (Convert_Aggr_In_Allocator): Replace Get_TSS_Name
with a high-level Is_TSS.
* sem_ch6.adb
From: Eric Botcazou
It occurs during the instantiation because the compiler forgets the context
of the generic declaration.
gcc/ada/
* freeze.adb (Wrap_Imported_Subprogram): Use Copy_Subprogram_Spec in
both cases to copy the spec of the subprogram.
Tested on x86_64-pc-linux-gnu
From: Eric Botcazou
In the primary stack case, Insert_Actions is invoked when the expression is
being rewritten, whereas Insert_List_Before_And_Analyze is invoked in the
secondary stack case. The former is idiomatic, the latter is not.
gcc/ada/
* exp_ch6.adb (Expand_Simple_Function_Ret
From: Piotr Trojanek
Whitespace cleanup.
gcc/ada/
* doc/gnat_ugn/gnat_and_program_execution.rst
(Some Useful Memory Pools): Remove extra whitespace from examples.
* sem_aggr.adb (Make_String_Into_Aggregate): Remove extra whitespace.
* gnat_ugn.texi: Regenerate.
T
From: Cedric Landet
In s-oscons-tmplt.c, sigset is defined inside the HAVE_SOCKETS bloc.
A platform could require sigset without supporting sockets.
gcc/ada/
* s-oscons-tmplt.c: move the definition of sigset out of the
HAVE_SOCKETS bloc.
Tested on x86_64-pc-linux-gnu, committed
From: Cedric Landet
g-spogwa.adb is the body of the procedure GNAT.Sockets.Poll.G_Wait.
This is a socket specific procedure. It should only be built for
systems that support sockets.
gcc/ada/
* Makefile.rtl: Move g-spogwa$(objext) from GNATRTL_NONTASKING_OBJS
to GNATRTL_SOCKETS_
From: Patrick Bernardi
The runtime used label addresses to determine the code address of
subprograms because the subprogram's canonical address on some targets
is a descriptor or a stub. Simplify the code by using the Code_Address
attribute instead, which is designed to return the code address of
Updated the PATCH v7 for comments addressing.
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619939.html
Pan
From: Li, Pan2
Sent: Thursday, May 25, 2023 11:17 AM
To: juzhe.zh...@rivai.ai; gcc-patches
Cc: Kito.cheng ; Wang, Yanzhang
Subject: RE: [PATCH v6] RISC-V: Using merge approach to op
From: Pan Li
This patch would like to optimize the VLS vector initialization like
repeating sequence. From the vslide1down to the vmerge with a simple
cost model, aka every instruction only has 1 cost.
Given code with -march=rv64gcv_zvl256b --param
riscv-autovec-preference=fixed-vlmax
typedef i
LGTM, thanks
On Mon, May 29, 2023 at 4:54 PM Pan Li via Gcc-patches
wrote:
>
> From: Pan Li
>
> This patch would like to optimize the VLS vector initialization like
> repeating sequence. From the vslide1down to the vmerge with a simple
> cost model, aka every instruction only has 1 cost.
>
> Giv
Hi,
This change, separating Benjamin's name and email address with tabs
rather than spaces, makes contrib/check-MAINTAINERS.py script happy
about our MAINTAINERS file again, so I tool the liberty of committing
this as obvious.
Thanks,
Martin
ChangeLog:
2023-05-29 Martin Jambor
* M
Hi Joseph and Martin,
this series adds UBSan checking for assignment of variably-modified
types, i.e. it checks that size expressions on both sides of the
assignment match.
1. no functional change, adds a structure argument to the
comptypes family functions in the C FE.
2. checking for all as
c: introduce ubsan checking for assigment of VM types 4/4
Support instrumentation of functions called via pointers. To do so,
record the declaration with the parameter types, so that it can be
retrieved later.
gcc/c:
c-decl.cc (get_parm_info): Record
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, May 29, 2023 5:33 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang,
Yanzhang
Subject: Re: [PATCH v7] RISC-V: Using merge approach to optimize repeating
sequenc
c: introduce ubsan checking for assigment of VM types 2/4
When checking compatibility of types during assignment, collect
all pairs of types where the outermost bound needs to match at
run-time. This list is then processed to add UBSan checks for
each bound.
gc
c: introduce ubsan checking for assigment of VM types 3/4
Support instrumentation of function arguments for functions
called via a declaration. We can support only simple size
expressions without side effects, because the UBSan
instrumentation is done before the call, b
This patch changes alignment for typedef types when passed as
arguments, making the alignment equal to the alignment of
original (aliased) types.
This change makes it impossible for a typedef type to have
alignment that is less than its size.
Signed-off-by: Jovan Dmitrovic
gcc/ChangeLog:
Committed, thanks Kito.
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, May 29, 2023 1:38 PM
To: Kito Cheng
Cc: Robin Dapp ; gcc-patches@gcc.gnu.org;
juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang
Subject: RE: [PATCH] RISC-V: Eliminate the magic number in riscv-v.cc
pushed the bug fixed part to gcc 13 branch
On Mon, May 29, 2023 at 12:52 PM Li, Pan2 via Gcc-patches
wrote:
>
> Committed with 2 patches, thanks Kito.
>
> Pan
>
> From: juzhe.zh...@rivai.ai
> Sent: Monday, May 29, 2023 11:19 AM
> To: kito.cheng
> Cc: gcc-patches ; Kito.cheng
> ; palmer ; Robin
Unrecog insns (such as CLOBBER, USE) does not represent real instructions,
but in the
process of pipeline optimization, they will wait for transmission in ready list
like
other insns, without considering resource conflicts and cycles. This results in
a
multi-issue CPU architecture that can be
Reference:
https://github.com/gcc-mirror/gcc/commit/d0bc0cb66bcb0e6a5a5a31a9e900e8ccc98e34e5
RISC-V should also be implemented to handle no_insn patterns for pipelining.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
(TARGET_SCHED_VARIABLE_ISS
On 5/29/23 05:01, Jin Ma wrote:
Reference:
https://github.com/gcc-mirror/gcc/commit/d0bc0cb66bcb0e6a5a5a31a9e900e8ccc98e34e5
RISC-V should also be implemented to handle no_insn patterns for pipelining.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_sched_variable_issue): New functio
On 5/28/23 21:46, Jin Ma wrote:
When testing a extension, it is often necessary for a certain program not to
need some kind of extension, such as the bitmanip extension, to evaluate the
performance or codesize of the extension. However, the current multilib rules
will report an error when it i
Looks there may be unnecessary due to the release/gcc-13 has the code as is.
diff --git a/gcc/config/riscv/vector.md b/gcc/config/riscv/vector.md
index 15f66efaa48..cd696da5d89 100644
--- a/gcc/config/riscv/vector.md
+++ b/gcc/config/riscv/vector.md
@@ -388,7 +388,7 @@ (define_attr "avl_type" ""
From: Pan Li
This patch would like to remove unnecessary comments of some self
explained parameters and try a better name to avoid misleading.
Signed-off-by: Pan Li
gcc/ChangeLog:
* config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
comments and rename local variabl
LGTM
On Mon, May 29, 2023 at 9:03 PM wrote:
>
> From: Pan Li
>
> This patch would like to remove unnecessary comments of some self
> explained parameters and try a better name to avoid misleading.
>
> Signed-off-by: Pan Li
>
> gcc/ChangeLog:
>
> * config/riscv/riscv-v.cc (emit_vlmax_ins
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, May 29, 2023 9:30 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; rdapp@gmail.com
Subject: Re: [PATCH v1] RISC-V: Refactor comments and naming of riscv-v.cc.
LGTM
On
On 5/23/23 13:46, Jivan Hakobyan via Gcc-patches wrote:
In the case where the target supports extension instructions,
it is preferable to use that instead of doing the same in other ways.
For the following case
void foo (unsigned long a, unsigned long* ptr) {
ptr[0] = a & 0xUL;
Hi Eric!
On Tue, 2023-05-23 10:08:26 +0200, Marc Poulhiès via Gcc-patches
wrote:
> From: Eric Botcazou
>
> All the subprograms declared in the unit have convention Intrinsic and
> their current implementation makes some implicit assumptions that are
> not valid universally, so it is replaced b
gcc/ChangeLog:
PR target/110021
* config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
TARGET_AVX512BW to generate truncv16hiv16qi2.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Uros.
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-
> Is this an issue with the patch? Or does it need a newer Ada compiler
> to for building it?
Neither, it's very likely an issue with your build procedure: you need to use
a matching host Ada compiler to build a cross Ada compiler, that's documented
in https://gcc.gnu.org/install/prerequisites.h
Jan-Benedict Glaw writes:
> (A full build log is at
> http://toolchain.lug-owl.de/laminar/jobs/gcc-aarch64-linux/74)
>
> Is this an issue with the patch? Or does it need a newer Ada compiler
> to for building it?
Hello Jan,
IIUC, your base compiler is "g++ (Debian 20230315-1) 13.0.1 20230315"
gcc/ChangeLog:
* rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
(rtx_unstable_p): Ditto.
(reg_mentioned_p): Ditto.
(reg_referenced_p): Ditto.
(reg_used_between_p): Ditto.
(reg_set_between_p): Ditto.
(modified_between_p): Ditto.
(no_labels_between_
Hi,
On Mon, May 22 2023, Aldy Hernandez via Gcc-patches wrote:
> Implement hashing for ipa_vr. When all is said and done, all these
> patches incurr a 7.64% slowdown for ipa-cp, with is entirely covered by
> the similar 7% increase in this area last week. So we get type agnostic
> ranges with "i
On Fri, Mar 10, 2023, 14:00 Gerald Pfeifer wrote:
> On Fri, 10 Mar 2023, Sandra Loosemore wrote:
> > AFAIK we have not knowingly changed any specific requirements beyond the
> > stated 4.7 and 4.9 for PDF output, but it concerns me that nobody is
> > likely to be using versions that old on a regu
On Mon, 2023-05-29 16:11:26 +0200, Marc Poulhiès wrote:
> Jan-Benedict Glaw writes:
> > (A full build log is at
> > http://toolchain.lug-owl.de/laminar/jobs/gcc-aarch64-linux/74)
> >
> > Is this an issue with the patch? Or does it need a newer Ada compiler
> > to for building it?
>
> Hello Jan,
Hi,
there have been concerns that linear searches through DECL_ARGUMENTS
that are often necessary to compute the index of a particular
PARM_DECL which is the key to results of IPA-CP can happen often
enough to be a compile time issue, especially if we plug the results
into value numbering, as I in
Hi,
PRs 68930 and 92497 show that when IPA-CP figures out constants in
aggregate parameters or when passed by reference but the loads happen
in an inlined function the information is lost. This happens even
when the inlined function itself was known to have - or even cloned to
have - such constan
On 5/25/23 01:54, juzhe.zh...@rivai.ai wrote:
From: Juzhe-Zhong
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc (register_frm): New function.
(DEF_RVV_FRM_ENUM): New macro.
(handle_pragma_vector): Add FRM enum
* config/riscv/riscv-vector-builtins.d
On 5/25/23 18:52, Die Li wrote:
This patch allows less instructions to be used when TARGET_XTHEADCONDMOV is
enabled.
Provide an example from the existing testcases.
Testcase:
int ConEmv_imm_imm_reg(int x, int y){
if (x == 1000) return 10;
return y;
}
Cflags:
-O2 -march=rv64gc_xtheadc
Hi,
NightStrike writes:
> Can you include texinfo in a top-level directory and have it built with the
> build, like you can with dejagnu? That's generally a decent path for
> building new gcc on older systems.
Note that the Texinfo requirement wasn't bumped, so nothing changed in
this regard, h
This is my proposed minimal fix for PR target/109973 (hopefully suitable
for backporting) that follows Jakub Jelinek's suggestion that we introduce
CCZmode and CCCmode variants of ptest and vptest, so that the i386
backend treats [v]ptest instructions similarly to testl instructions;
using differe
n 5/29/23 11:26, Arsen Arsenović wrote:
Hi,
NightStrike writes:
Can you include texinfo in a top-level directory and have it built
with the build, like you can with dejagnu? That's generally a
decent path for building new gcc on older systems.
Note that the Texinfo requirement wasn't bumped
On 5/29/23 08:38, Uros Bizjak via Gcc-patches wrote:
gcc/ChangeLog:
* rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
(rtx_unstable_p): Ditto.
(reg_mentioned_p): Ditto.
(reg_referenced_p): Ditto.
(reg_used_between_p): Ditto.
(reg_set_between_p):
On 5/26/23 13:43, Roger Sayle wrote:
I believe that a better (or supplementary) fix to PR target/107172 is to
avoid
producing incorrect (but valid) RTL in simplify_const_relational_operation
when
presented with questionable (obviously invalid) expressions, such as those
produced during combin
On 5/25/23 08:02, Manolis Tsamis wrote:
On Thu, May 25, 2023 at 4:53 PM Richard Biener via Gcc-patches
wrote:
On Thu, May 25, 2023 at 3:32 PM Jeff Law via Gcc-patches
wrote:
On 5/25/23 07:01, Richard Biener via Gcc-patches wrote:
On Thu, May 25, 2023 at 2:36 PM Manolis Tsamis wrote:
Hi, this patch is same implementation as FMA which has been merged.
Ok for trunk?
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-05-29 14:53
To: gcc-patches
CC: kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH V2] RISC-V: Add RVV FNMA auto-vectoriz
From: Juzhe-Zhong
Notice there is warning:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison
between signed and unsigned integer expressions [-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: w
在 2023/5/29 下午2:09, Xi Ruoyao 写道:
On Tue, 2023-04-18 at 21:06 +0800, Lulu Cheng wrote:
Hi, ruoyao:
Thank you so much for making this submission. But we are testing the
impact of these two alignment parameters
(also including -falign-jumps and -falign-lables ) on performance. So
before the re
LGTM
On Tue, May 30, 2023 at 8:30 AM juzhe.zh...@rivai.ai
wrote:
>
> Hi, this patch is same implementation as FMA which has been merged.
> Ok for trunk?
>
>
>
> juzhe.zh...@rivai.ai
>
> From: juzhe.zhong
> Date: 2023-05-29 14:53
> To: gcc-patches
> CC: kito.cheng; kito.cheng; palmer; palmer; jeff
You could use UINTVAL rather than (unsigned HOST_WIDE_INT) INTVAL
On Tue, May 30, 2023 at 9:14 AM wrote:
>
> From: Juzhe-Zhong
>
> Notice there is warning:
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison
> between signed and unsigned integer expressions [-Wsign-compa
From: Juzhe-Zhong
Notice there is warning:
../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison
between signed and unsigned integer expressions [-Wsign-compare]
if (INTVAL (operands[2]) == GET_MODE_MASK (HImode))
../../../riscv-gcc/gcc/config/riscv/riscv.md:1358:37: w
LGTM :)
On Tue, May 30, 2023 at 10:09 AM wrote:
>
> From: Juzhe-Zhong
>
> Notice there is warning:
> ../../../riscv-gcc/gcc/config/riscv/riscv.md:1356:32: warning: comparison
> between signed and unsigned integer expressions [-Wsign-compare]
>if (INTVAL (operands[2]) == GET_MODE_MASK (H
Ok for trunk ?
juzhe.zh...@rivai.ai
From: juzhe.zhong
Date: 2023-05-29 12:35
To: gcc-patches
CC: kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc; Juzhe-Zhong
Subject: [PATCH V2] RISC-V: Add floating-point to integer conversion RVV
auto-vectorization support
From: Juzhe-Zhong
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Tuesday, May 30, 2023 10:04 AM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches ; Kito.cheng ;
palmer ; palmer ; jeffreyalaw
; Robin Dapp
Subject: Re: [PATCH V2] RISC-V: Add RVV FNM
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Tuesday, May 30, 2023 10:10 AM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; pal...@dabbelt.com;
pal...@rivosinc.com; jeffreya...@gmail.com; rda
LGTM
On Tue, May 30, 2023 at 10:15 AM juzhe.zh...@rivai.ai
wrote:
>
> Ok for trunk ?
>
>
>
> juzhe.zh...@rivai.ai
>
> From: juzhe.zhong
> Date: 2023-05-29 12:35
> To: gcc-patches
> CC: kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; rdapp.gcc;
> Juzhe-Zhong
> Subject: [PATCH V2] RISC-V: Add
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Tuesday, May 30, 2023 10:18 AM
To: juzhe.zh...@rivai.ai
Cc: gcc-patches ; Kito.cheng ;
palmer ; palmer ; jeffreyalaw
; Robin Dapp
Subject: Re: [PATCH V2] RISC-V: Add floatin
When long double is wider than double, but from_chars is implemented
in terms of double, tests that involve the full precision of long
double are expected to fail. Mark them as such on x86_64-*-vxworks*.
Tested on x86_64-vxworks7r2 with gcc-12. Ok to install?
for libstdc++-v3/ChangeLog
Hello Richard:
On 22/05/23 6:26 pm, Richard Biener wrote:
> On Thu, May 18, 2023 at 9:14 AM Ajit Agarwal wrote:
>>
>> Hello All:
>>
>> This patch improves code sinking pass to sink statements before call to
>> reduce
>> register pressure.
>> Review comments are incorporated.
>>
>> Bootstrapped a
>> +/* Return TRUE if Zcmp push and pop insns should be
>> + avoided. FALSE otherwise.
>> + Only use multi push & pop if all GPRs masked can be covered,
>> + and stack access is SP based,
>> + and GPRs are at top of the stack frame,
>> + and no conflicts in stack allocation with other features */
>
GNU vector extensions is widly used around this world, and this patch
enable that with RISC-V vector extensions, this can help people
leverage existing code base with RVV, and also can write vector programs in a
familiar way.
The idea of VLS code gen support is emulate VLS operation by VLA operati
On Mon, May 29, 2023 at 07:17:42PM +0100, Roger Sayle wrote:
> The only change that was unanticipated was the tweak to ix86_match_ccmode.
> Oddly, CCZmode is allowable for CCmode, but CCCmode isn't. Given that
So another option would be to use CCZmode for the ptestz cases and keep
CCmode for ptes
On Fri, May 26, 2023 at 4:35 PM Andrew Stubbs wrote:
>
> Hi all,
>
> I want to implement a vector DIVMOD libfunc for amdgcn, but I can't just
> do it because the GCC middle-end models DIVMOD's return value as
> "complex int" type, and there are no vector equivalents of that type.
>
> Therefore, th
>> /* Return true if MODE is true VLS mode. */
>> bool
>> vls_mode_p (machine_mode mode)
>> {
>> switch (mode)
>> {
>> case E_V4SImode:
>> case E_V2DImode:
>> case E_V8HImode:
>> case E_V16QImode:
>> return true;
>> default:
>> return false;
>> }
>> }
To
Hi,
By checking the object files of SPECint, I found that two kinds of
compare/move can't be combined to "mr." pattern as there is no register
link between them. The patch adds two peephole2 patterns for them.
Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
Thanks
Gu
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