On 11/14/22 02:21, Gerald Pfeifer wrote:
> On Sun, 13 Nov 2022, Martin Liška wrote:
>> So Gerald, I'm suggesting a new url base gcc.gnu.org/docs that will be
>> filled with the new manuals and gcc.gnu.org/onlinedocs/$man and
>> gcc.gnu.org/install locations should point to older (trunk) manuals
Hi!
Thanks so much for your review!
Richard Biener writes:
> On Fri, 11 Nov 2022, Jiufu Guo wrote:
>
>> Hi,
>>
>> When assigning a struct parameter to another variable, or loading a
>> memory block to a struct var (especially for return value),
>> Now, "block move" would be used during expand
Tested on x86_64-pc-linux-gnu, does this look OK for trunk?
libstdc++-v3/ChangeLog:
* include/bits/ranges_algo.h (__contains_fn, contains): Define.
(__contains_subrange_fn, contains_subrange): Define.
* testsuite/25_algorithms/contains/1.cc: New test.
* testsuite/2
Tested on x86_64-pc-linux-gnu, does this look OK for trunk?
libstdc++-v3/ChangeLog:
* include/bits/ranges_algo.h (out_value_result): Define.
(iota_result): Define.
(__iota_fn, iota): Define.
* testsuite/25_algorithms/iota/1.cc: New test.
---
libstdc++-v3/include/b
Tested on x86_64-pc-linux-gnu, does this look OK for trunk?
libstdc++-v3/ChangeLog:
* include/bits/ranges_algo.h (__find_last_fn, find_last):
Define.
(__find_last_if_fn, find_last_if): Define.
(__find_last_if_not_fn, find_last_if_not): Define.
* testsuite/2
> Ok, Note GCC documents have been ported to sphinx, so you need to
> adjust changes in invoke.texi to new sphinx files.
Yes, this is the patch I'm going to check-in. Thanks.
Hongtao Liu 于2022年11月14日周一 09:35写道:
>
> On Wed, Nov 9, 2022 at 9:29 AM Hongyu Wang wrote:
> >
> > > Although ix86_small_
On Fri, Nov 11, 2022 at 10:45 AM Haochen Jiang via Gcc-patches
wrote:
>
> Hi all,
>
> For all AMX related ISAs, we have a potential dependency on AMX-TILE
> or we even won't have the basic support on AMX.
>
> This patch added those dependency. Ok for trunk?
Ok.
>
> BRs,
> Haochen
>
> gcc/ChangeLog
The following avoids exceeding the maximum object size on 32bit
platforms.
Pushed.
* gcc.dg/pr107554.c: Restrict to lp64.
---
gcc/testsuite/gcc.dg/pr107554.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/testsuite/gcc.dg/pr107554.c b/gcc/testsuite/gcc.dg/pr10755
On Mon, 14 Nov 2022, Jiufu Guo wrote:
>
> Hi!
> Thanks so much for your review!
>
> Richard Biener writes:
>
> > On Fri, 11 Nov 2022, Jiufu Guo wrote:
> >
> >> Hi,
> >>
> >> When assigning a struct parameter to another variable, or loading a
> >> memory block to a struct var (especially for r
On Sun, Nov 13, 2022 at 4:09 PM Christoph Muellner
wrote:
>
> From: Christoph Müllner
>
> This patch adds a new pass that looks up function pointer assignments,
> and adds guarded direct calls to the call sites of the function
> pointers.
>
> E.g.: Lets assume an assignment to a function pointer
> Sorry for the breakage. However, I contacted you (and your colleague)
> and haven't received
> any feedback for a couple of weeks.
> >>>
> >>> Right although I did give you feedback that what you sent wasn’t in a
> >>> suitable form for review wrt Ada.
> >>
> >> Sure, but sending
On Sun, Nov 13, 2022 at 4:38 PM Christoph Muellner
wrote:
>
> From: mtsamis
>
> The IPA CP pass offers a wide range of optimizations, where most of them
> lead to specialized functions that are called from a call site.
> This can lead to multiple specialized function clones, if more than
> one ca
On Sun, Nov 13, 2022 at 9:39 PM Jakub Jelinek wrote:
>
> On Sun, Nov 13, 2022 at 09:05:53PM +0100, Aldy Hernandez wrote:
> > It seems SQRT is relatively straightforward, and it's something Jakub
> > wanted for this release.
> >
> > Jakub, what do you think?
> >
> > p.s. Too tired to think about op
Hi!
Working virtually out of Baker Island.
We got a response from AMD in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
so the following patch starts treating AMD with AVX and CMPXCHG16B
ISAs like Intel by using vmovdqa for atomic load/store in libatomic.
Ok for trunk if it passes boots
Hi!
Working virtually out of Baker Island.
Given
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
the following patch implements atomic load/store (and therefore also
enabling compare and exchange) for -m64 -mcx16 -mavx.
Ok for trunk if it passes bootstrap/regtest?
2022-11-13 Jakub Jeli
On Mon, Nov 14, 2022 at 8:48 AM Jakub Jelinek wrote:
>
> Hi!
>
> Working virtually out of Baker Island.
>
> We got a response from AMD in
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
> so the following patch starts treating AMD with AVX and CMPXCHG16B
> ISAs like Intel by using vmovdq
On Mon, Nov 14, 2022 at 8:52 AM Jakub Jelinek wrote:
>
> Hi!
>
> Working virtually out of Baker Island.
>
> Given
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688#c10
> the following patch implements atomic load/store (and therefore also
> enabling compare and exchange) for -m64 -mcx16 -mavx.
101 - 117 of 117 matches
Mail list logo