PING^1 [PATCH v2] rs6000: Use direct move for char/short vector CTOR [PR96933]

Hi, I'd like to gentle ping this patch: https://gcc.gnu.org/pipermail/gcc-patches/2020-September/553555.html BR, Kewen on 2020/9/10 上午11:19, Kewen.Lin via Gcc-patches wrote: > Hi, > > As Segher's suggestion in the PR, for 128bit_direct_move, this new > version leverages vector pack insns inste

PING^3 [PATCH 1/4] unroll: Add middle-end unroll factor estimation

Hi, Gentle ping this: https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546698.html BR, Kewen on 2020/9/15 下午3:44, Kewen.Lin via Gcc-patches wrote: > Hi, > > Gentle ping this: > > https://gcc.gnu.org/pipermail/gcc-patches/2020-May/546698.html > > BR, > Kewen > > on 2020/8/31 下午1:49, Kewen.

Re: [PATCH] Fortran : ICE in build_field PR95614 (2nd attempt)

**ping** previously omitted commit message added On 29/09/2020 14:03, Mark Eggleston wrote: For review. When the first attempt was committed the result was PR97224 i.e. it broke the build of SPECCPU 2006 Games. I've changed the condition under which the error is produced. It was produced i

Re: [PATCH] Fortran : Two further previously missed ICEs PR53298

**ping** see https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554034.html and https://gcc.gnu.org/pipermail/gcc-patches/2020-September/555072.html OK for master? On 14/09/2020 08:22, Mark Eggleston wrote: Second attempt this time with patch attached. For review. Fixes the two ICEs

[committed] openmp: Improve composite triangular loop lowering and expansion

Hi! This propagates needed values from the point where number of iterations is calculated on composite loops to the places where that information is needed to use the more efficient square root discovery to compute the starting iterator values from the logical iteration number. Bootstrapped/regte

[PATCH] combine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]

Hi! The following testcases are miscompiled (the first one since my improvements to rotate discovery on GIMPLE, the other one for many years) because combiner optimizes nested ROTATEs with narrowing SUBREG in between (i.e. the outer rotate is performed in shorter precision than the inner one) to j

Re: [PATCH] Fortran : ICE in build_field PR95614 (2nd attempt)

Hi Mark, OK for master. If you want to backport, that's fine by me but please give it a few weeks. Thanks for fixing this. Paul On Tue, 13 Oct 2020 at 08:17, Mark Eggleston wrote: > **ping** > > previously omitted commit message added > > On 29/09/2020 14:03, Mark Eggleston wrote: > > For re

Re: [PATCH v2] arm&aarch64: subdivide the type attribute "alu_shfit_imm"

Thanks, the new patch looks great. One minor suggestion: "Qian, Jianhua" writes: > @@ -1106,7 +1125,45 @@ >mve_move,\ >mve_store,\ >mve_load" > - (const_string "untyped")) > + (cond [(eq_attr "autodetect_type" "alu_shift_lsr_op2") > +(const_string "alu_shift_imm_other

Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions emitted at -O3

xiezhiheng writes: >> -Original Message- >> From: Richard Sandiford [mailto:richard.sandif...@arm.com] >> Sent: Thursday, August 27, 2020 4:08 PM >> To: xiezhiheng >> Cc: Richard Biener ; gcc-patches@gcc.gnu.org >> Subject: Re: [PATCH PR94442] [AArch64] Redundant ldp/stp instructions >> e

[PATCH] ASAN: disable -Wno-stringop-overflow for 2 tests

Hey. The patch is about disabling of the warning that properly identifies a violation that we want to catch by ASAN. Survives asan.exp on x86_64-linux-gnu. Ready to be installed? Thanks, Martin gcc/testsuite/ChangeLog: PR middle-end/97392 * g++.dg/asan/asan_test.C: Disable -Ws

Re: [PATCH] ASAN: disable -Wno-stringop-overflow for 2 tests

On Tue, Oct 13, 2020 at 10:11:26AM +0200, Martin Liška wrote: > --- a/gcc/testsuite/g++.dg/asan/asan_test.C > +++ b/gcc/testsuite/g++.dg/asan/asan_test.C > @@ -9,6 +9,7 @@ > // { dg-additional-options "-DASAN_AVOID_EXPENSIVE_TESTS=1" { target { ! > run_expensive_tests } } } > // { dg-additional-

[Patch] x86: Enable support for Intel UINTR extension

Hi: This patch is about to support User Interrupt (UINTR) instructions. This feature defines user interrupts as new events in the architecture. They are delivered to software operating in 64-bit mode with CPL = 3 without any change to segmentation state. For more details, please refer to https:/

[arm-perf-staging branch] Add support for -fno-alias

Hi, I am sending some old patches that we have internally since GCC 10 to the Arm Branch but feel free to comment as we will be looking to submit them for GCC 12 to mainline. This patch adds the option '-fno-alias'. The option makes the compiler treat any pointer being passed as a parameter as

[PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

Hi: For rtx like (vec_select:V2SI (subreg:V4SI (inner:V2SI) 0) (parallel [(const_int 0) (const_int 1)])) it could be simplified as inner. Bootstrap is ok, regression test on i386 backend is ok. gcc/ChangeLog PR rtl-optimization/97249 * simplify-rtx.c (sim

[Patch] x86: Enable GCC support for Intel Hreset extension

Hi: This patch is about to support Intel Hreset instruction. Hreset provides a hint to the processor to selectively reset the prediction history of the current logical processor. For more details, please refer to https://software.intel.com/content/dam/develop/external/us/en/documents/architectur

Re: [PATCH] PR target/96307: Fix KASAN option checking.

ping On Mon, Oct 5, 2020 at 5:49 PM Kito Cheng wrote: > - Disable kasan if target is unsupported and -fasan-shadow-offset= is not >given, no matter `--param asan-stack=1` is given or not. > > - Moving KASAN option checking testcase to gcc.dg, those testcase could be >useful for all oth

Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

ping^2 Hi Eric: Do you mind having a review for that? thanks :) On Mon, Oct 5, 2020 at 5:24 PM Kito Cheng wrote: > ping. > > > On Fri, Sep 25, 2020 at 2:33 PM Richard Biener wrote: > >> On Fri, 25 Sep 2020, Kito Cheng wrote: >> >> > In g:70cdb21e579191fe9f0f1d45e328908e59c0179e, DECL/global

Re: [PATCH] MIPS/libphobos: Fix switchcontext.S assembly for MIPS I ISA

On Mon, 12 Oct 2020, Maciej W. Rozycki wrote: > On Thu, 8 Oct 2020, Iain Buclaw wrote: > > > > Noticed in a build of a MIPS I toolchain. I have no way to run MIPS > > > regression-testing right now, however in `libopcodes' the L.D and S.D > > > instructions are strict aliases valid for the MI

Support ofsetted parameters in local modref

Hi, this patch makes local modref to track parameters that are passed through with and adjustment (via pointer_plus or addr_expr of mem_ref). I intended to re-use logic in ipa-prop, but it turns out that it is weird: if (TREE_CODE (op1) != ADDR_EXPR) return; op1 = TREE_OPERAND (op1, 0);

Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

> Do you mind having a review for that? Sorry for missing the v2 patch; yes, it looks good to me. -- Eric Botcazou

Re: [PING][PATCH] correct handling of indices into arrays with elements larger than 1 (PR c++/96511)

On Tue, 29 Sep 2020 at 00:02, Martin Sebor via Gcc-patches wrote: > > On 9/25/20 11:17 PM, Jason Merrill wrote: > > On 9/22/20 4:05 PM, Martin Sebor wrote: > >> The rebased and retested patches are attached. > >> > >> On 9/21/20 3:17 PM, Martin Sebor wrote: > >>> Ping: > >>> https://gcc.gnu.org/pi

Re: Support ofsetted parameters in local modref

> Hi, > this patch makes local modref to track parameters that are passed through with > and adjustment (via pointer_plus or addr_expr of mem_ref). I intended to > re-use > logic in ipa-prop, but it turns out that it is weird: > if (TREE_CODE (op1) != ADDR_EXPR) > return; > op1 = TREE_OPE

[PATCH][GCC-10 backport] arm: Fix fp16 move patterns for base MVE

Backport of commit 6abd428605e3a279e533fde1cecbc9735ce03b66 from master branch. OK for gcc-10 ? This patch fixes ICEs in gcc.dg/torture/float16-basic.c for -march=armv8.1-m.main+mve -mfloat-abi=hard. The problem was that an fp16 argument was (rightly) being passed in FPRs, but the fp16 move patt

[PATCH][GCC-10 backport] arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]

This patch is a backport of PR97251 fix already commited to master. OK for gcc-10 branch ? This patch fixes ICEs when compiling gcc/testsuite/gcc.target/arm/pure-code/no-literal-pool.c with -mfp16-format=ieee -mfloat-abi=hard -march=armv8.1-m.main+mve -mpure-code. The existing conditions in the

Re: [r11-3641 Regression] FAIL: gcc.dg/torture/pta-ptrarith-1.c -Os scan-tree-dump alias "ESCAPED = {[^\n}]* i f [^\n}]*}" on Linux/x86_64 (-m32 -march=cascadelake)

On Mon, 12 Oct 2020 at 18:43, Segher Boessenkool wrote: > > On Mon, Oct 12, 2020 at 03:26:38PM +0200, Christophe Lyon wrote: > > That's why I kept the reporting part manual on my side: once you know > > which commit introduced a failure/regression (either via bisect, or by > > some other way), it'

RE: [PATCH][GCC-10 backport] arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]

> -Original Message- > From: Przemyslaw Wirkus > Sent: 13 October 2020 10:56 > To: gcc-patches@gcc.gnu.org > Cc: Richard Earnshaw ; ni...@redhat.com; > Ramana Radhakrishnan ; Kyrylo > Tkachov > Subject: [PATCH][GCC-10 backport] arm: Fix ICEs in no-literal-pool.c on MVE > [PR97251] > >

RE: [PATCH][GCC-10 backport] arm: Fix fp16 move patterns for base MVE

> -Original Message- > From: Przemyslaw Wirkus > Sent: 13 October 2020 10:56 > To: gcc-patches@gcc.gnu.org > Cc: ni...@redhat.com; Richard Earnshaw ; > Kyrylo Tkachov ; Ramana Radhakrishnan > > Subject: [PATCH][GCC-10 backport] arm: Fix fp16 move patterns for base > MVE > > Backport o

RE: [PATCH][GCC-10 backport] arm: Fix ICEs in no-literal-pool.c on MVE [PR97251]

> > This patch is a backport of PR97251 fix already commited to master. > > > > OK for gcc-10 branch ? Cherry-picked and applied: commit d121b3259b77203e62402024add1538c1bdf5fdf > Ok. > Thanks, > Kyrill

RE: [PATCH][GCC-10 backport] arm: Fix fp16 move patterns for base MVE

> > Backport of commit 6abd428605e3a279e533fde1cecbc9735ce03b66 > > from master branch. > > > > OK for gcc-10 ? Cherry-picked and applied: commit eb061188276d0ac9ec53fd5619c578a6bce6b129 > Ok. > Thanks, > Kyrill

[PATCH] RISC-V: Add support for -mcpu option.

- The behavior of -mcpu basically equal to -march plus -mtune, but it has lower priority than -march and -mtune. - The behavior and available options has sync with clang except we don't add few LLVM specific value, and add more sifive processor to the list. - -mtune also accept all avail

[PATCH] Remove STMT_VINFO_SAME_ALIGN_REFS

This makes the only consumer of STMT_VINFO_SAME_ALIGN_REFS, the loop peeling for alignment code, use locally computed data and then removes STMT_VINFO_SAME_ALIGN_REFS and its computation. The main benefit is reducing the dependence computation load by not asking for read-read dependences and gettin

Re: Support ofsetted parameters in local modref

On Tue, 13 Oct 2020, Jan Hubicka wrote: > Hi, > this patch makes local modref to track parameters that are passed through with > and adjustment (via pointer_plus or addr_expr of mem_ref). I intended to > re-use > logic in ipa-prop, but it turns out that it is weird: > if (TREE_CODE (op1) != AD

[Patch, committed] nvptx/mkoffload.c: Add missing fclose

When looking at nvptx/mkoffload.c, I spotted a missing fclose. Committed as obvious. Tobias - Mentor Graphics (Deutschland) GmbH, Arnulfstraße 201, 80634 München / Germany Registergericht München HRB 106955, Geschäftsführer: Thomas Heurung, Alexander Walter commit 35103c6d8e3ee

Re: Support ofsetted parameters in local modref

> > So I implemented my own pattern matching and I think we should switch > > ipa-prop > > on it incrementally. It is based on similar logic in > > ao_ref_init_from_ptr_and_size. > > So instead of re-inventing the wheel what about splitting out a > common helper instead? It was my original idea.

Re: [PATCH] Remove STMT_VINFO_SAME_ALIGN_REFS

Richard Biener writes: > This makes the only consumer of STMT_VINFO_SAME_ALIGN_REFS, the > loop peeling for alignment code, use locally computed data and > then removes STMT_VINFO_SAME_ALIGN_REFS and its computation. > The main benefit is reducing the dependence computation load > by not asking fo

Re: Support ofsetted parameters in local modref

On Tue, 13 Oct 2020, Jan Hubicka wrote: > > > So I implemented my own pattern matching and I think we should switch > > > ipa-prop > > > on it incrementally. It is based on similar logic in > > > ao_ref_init_from_ptr_and_size. > > > > So instead of re-inventing the wheel what about splitting out

[Patch] lto-wrapper: Use nontemp filename with -save-temps

There are still some @cc... files under /tmp, but at lease another file is now at the proper place. This patch generates (for a.out and -save-temps) the file a.crtoffloadtable.o. (I have not fully digested the LTO calls, but I think this file is only created once and not by concurrent lto-wrappe

Re: [PATCH] Remove STMT_VINFO_SAME_ALIGN_REFS

On Tue, 13 Oct 2020, Richard Sandiford wrote: > Richard Biener writes: > > This makes the only consumer of STMT_VINFO_SAME_ALIGN_REFS, the > > loop peeling for alignment code, use locally computed data and > > then removes STMT_VINFO_SAME_ALIGN_REFS and its computation. > > The main benefit is re

Re: Support ofsetted parameters in local modref

> On Tue, 13 Oct 2020, Jan Hubicka wrote: > > > > > So I implemented my own pattern matching and I think we should switch > > > > ipa-prop > > > > on it incrementally. It is based on similar logic in > > > > ao_ref_init_from_ptr_and_size. > > > > > > So instead of re-inventing the wheel what abo

Re: [Patch] lto-wrapper: Use nontemp filename with -save-temps

On Tue, 13 Oct 2020, Tobias Burnus wrote: > There are still some @cc... files under /tmp, > but at lease another file is now at the proper place. > > This patch generates (for a.out and -save-temps) > the file a.crtoffloadtable.o. > > (I have not fully digested the LTO calls, but I think > this

Re: [PATCH] arm: Add missing vec_cmp and vcond patterns

Sorry for the slow reply. Christophe Lyon writes: > On Thu, 1 Oct 2020 at 16:10, Richard Sandiford via Gcc-patches > wrote: >> >> This patch does several things at once: >> >> (1) Add vector compare patterns (vec_cmp and vec_cmpu). >> >> (2) Add vector selects between floating-point modes when t

Re: [PATCH, 1/3, OpenMP] Target mapping changes for OpenMP 5.0, front-end parts

On Tue, Sep 01, 2020 at 09:16:23PM +0800, Chung-Lin Tang wrote: > this patch set implements parts of the target mapping changes introduced > in OpenMP 5.0, mainly the attachment requirements for pointer-based > list items, and the clause ordering. > > The first patch here are the C/C++ front-end c

Re: Fix handling of access ranges in ipa-modref

Hi, On Sun, Oct 11 2020, Jan Hubicka wrote: > Hi, > this patch fixes the range tracking in argument and re-enables it for clones > (the bug that broke dealII and x264 benchmarks) > > It turned out that there was three problems > 1) for SRA/ipa-cp clones we did not update summarries to represent n

Re: [PATCH, 2/3, OpenMP] Target mapping changes for OpenMP 5.0, middle-end parts and compiler testcases

On Tue, Sep 01, 2020 at 09:16:48PM +0800, Chung-Lin Tang wrote: > --- a/gcc/gimplify.c > +++ b/gcc/gimplify.c > @@ -8350,14 +8350,126 @@ extract_base_bit_offset (tree base, tree *base_ref, > poly_int64 *bitposp, >/* Set *BASE_REF if BASE was a dereferenced reference variable. */ >if (base

Re: [arm-perf-staging branch] Add support for -fno-alias

On Tue, Oct 13, 2020 at 10:36 AM Tamar Christina via Gcc-patches wrote: > > Hi, > > I am sending some old patches that we have internally since GCC 10 to the Arm > Branch but feel free to comment as we will be looking to submit them for GCC > 12 to mainline. > > This patch adds the option '-fno-

Re: [patch] Rework CPP_BUILTINS_SPEC for powerpc-vxworks

Hi Segher, > On 5 Oct 2020, at 19:27, Olivier Hainque wrote: > > I'll post an updated version, thanks for the comments. Here's an updated version which passed in-house build & tests with gcc-10 based toolchains for VxWorks 6.9 & 7.2, and with which I could build mainline for VxWorks 6.9 includi

[PATCH] AArch64: Add Neoverse N2 tuning model

Hi all, This patch adds a tuning structure for Neoverse N2 to allow for further tuning. For now it's just a deduplication of the Neoverse N1 struct that it was reusing but with the SVE width set to 128. Bootstrapped and tested on aarch64-none-linux-gnu. Pushing to trunk and will push similar pat

Re: [PATCH] arm: Add a couple of extra stack-protector tests

Christophe Lyon writes: > On Wed, 23 Sep 2020 at 20:33, Richard Sandiford > wrote: >> >> These tests were inspired by the corresponding aarch64 ones that I just >> committed. They already pass. >> >> Tested on arm-linux-gnueabi, arm-linux-gnueabihf and armeb-eabi. >> OK for trunk? >> >> Richard

Re: [PATCH] arm: Add a couple of extra stack-protector tests

On Tue, 13 Oct 2020 at 15:51, Richard Sandiford wrote: > > Christophe Lyon writes: > > On Wed, 23 Sep 2020 at 20:33, Richard Sandiford > > wrote: > >> > >> These tests were inspired by the corresponding aarch64 ones that I just > >> committed. They already pass. > >> > >> Tested on arm-linux-gn

Re: [Patch] lto-wrapper: Use nontemp filename with -save-temps

On 10/13/20 2:56 PM, Richard Biener wrote: On Tue, 13 Oct 2020, Tobias Burnus wrote: This patch generates (for a.out and -save-temps) the file a.crtoffloadtable.o. I missed a misused of concat in my patch :-( Committed as obvious. Tobias - Mentor Graphics (Deutschland) GmbH,

Re: [Patch] libgomp: Add, if existing, -latomic to libgomp.spec --as-needed (was: Re: [RFC] Offloading and automatic linking of libraries)

On Mon, Oct 12, 2020 at 05:51:17PM +0200, Tobias Burnus wrote: > first: *PING*. > > secondly, I think the change to testsuite/lib/libgomp.exp's libgomp_init > is also needed. > (Hence, I now added it.) I have a too new system-installed libatomic to > be sure that > it fails without. I think for l

[PATCH][GCC 10] AArch64: Add Neoverse N2 tuning model

This is the GCC 10 version of the Neoverse N2 tuning struct patch. It's more or less identical. Bootstrapped and tested on the branch. Pushing to GCC 10. Thanks, Kyrill gcc/ * config/aarch64/aarch64.c (neoversen2_tunings): Define. * config/aarch64/aarch64-cores.def (neoverse-n2):

[PATCH][GCC 9] AArch64: Add Neoverse N2 tuning mode

Hi all, This is the GCC 9 patch for the Neoverse N2 tuning struct. It sets the AARCH64_EXTRA_TUNE_PREFER_ADVSIMD_AUTOVEC tune flag as well. Bootstrapped and tested on the branch. Pushing to GCC 9. Thanks, Kyrill gcc/ * config/aarch64/aarch64.c (neoversen2_tunings): Define. * conf

[PATCH][GCC 8] AArch64: Add Neoverse N2 tuning model

Hi all, This is the GCC 8 patch for the Neoverse N2 tuning struct. It sets the AARCH64_EXTRA_TUNE_PREFER_ADVSIMD_AUTOVEC tune flag as well. Bootstrapped and tested on the branch. Pushing to GCC 8. Thanks, Kyrill gcc/ * config/aarch64/aarch64.c (neoversen2_tunings): Define. * conf

Re: [PATCH] Practical Improvement to libgcc Complex Divide

Ping - still need review of version 4 of this patch. It has been over a month since the last comment. - patrick On 9/9/2020 2:13 AM, Richard Biener wrote: On Tue, Sep 8, 2020 at 8:50 PM Patrick McGehearty via Gcc-patches wrote: (Version 4) (Added in version 4) Fixed Changelog entry to incl

[PUSHED] ranger: Do not save hash slots across calls to hash_table::get_or_insert.

There's a read of a freed block while accessing the default_slot in calc_switch_ranges. default_slot->intersect (def_range); It seems the default_slot got swiped from under us, and the valgrind dump indicates the free came from the get_or_insert in the same function: irange *&slot =

[RFA,PATCH] Bail in bounds_of_var_in_loop if no step found.

[Neither Andrew nor I are familiar with the SCEV code. We treat it as a black box :). So we could use a SCEV expert here.] In bounds_of_var_in_loop, evolution_part_in_loop_num is returning NULL: step = evolution_part_in_loop_num (chrec, loop->num); and we ICE while trying to calculate the r

Re: [RFC][gimple] Move can_duplicate_bb_p to gimple_can_duplicate_bb_p

On 10/12/20 9:15 AM, Richard Biener wrote: > On Fri, 9 Oct 2020, Tom de Vries wrote: > >> Hi, >> >> The function gimple_can_duplicate_bb_p currently always returns true. >> >> The presence of can_duplicate_bb_p in tracer.c however suggests that >> there are cases when bb's indeed cannot be duplica

Re: [patch] Rework CPP_BUILTINS_SPEC for powerpc-vxworks

Hi! On Tue, Oct 13, 2020 at 03:35:11PM +0200, Olivier Hainque wrote: > Here's an updated version which passed in-house build & tests > with gcc-10 based toolchains for VxWorks 6.9 & 7.2, and with which > I could build mainline for VxWorks 6.9 including libstdc++ (combined > with a few other patche

[committed] libstdc++: Remove trailing whitespace from XML docs

Very boring. Committed to trunk. commit 16d0b033ca4d3dd1331c58730c7944ae6e648a14 Author: Jonathan Wakely Date: Tue Oct 13 16:43:11 2020 libstdc++: Remove trailing whitespace from XML docs libstdc++-v3/ChangeLog: * doc/xml/book.txml: Remove trailing whitespace.

Re: [PATCH 1/X] libsanitizer: Tie the hwasan library into our build system

Sorry for the slow review. Matthew Malcomson writes: > This patch tries to tie libhwasan into the GCC build system in the same way > that the other sanitizer runtime libraries are handled. > > libsanitizer/ChangeLog: > > * Makefile.am: Build libhwasan. > * Makefile.in: Build libhwas

Re: [RFA,PATCH] Bail in bounds_of_var_in_loop if no step found.

On October 13, 2020 5:17:48 PM GMT+02:00, Aldy Hernandez via Gcc-patches wrote: >[Neither Andrew nor I are familiar with the SCEV code. We treat it as >a >black box :). So we could use a SCEV expert here.] > >In bounds_of_var_in_loop, evolution_part_in_loop_num is returning NULL: > > step = e

Re: [PATCH 2/X] libsanitizer: Only build libhwasan when targeting AArch64

Matthew Malcomson writes: > diff --git a/libsanitizer/configure.tgt b/libsanitizer/configure.tgt > index > 52503f1a880ba08b515b8a429ac44a262873f74b..fb55ae9762e9ac6531087a258e1291b5635fcd3e > 100644 > --- a/libsanitizer/configure.tgt > +++ b/libsanitizer/configure.tgt > @@ -61,6 +61,7 @@ case "$

Re: [r11-3641 Regression] FAIL: gcc.dg/torture/pta-ptrarith-1.c -Os scan-tree-dump alias "ESCAPED = {[^\n}]* i f [^\n}]*}" on Linux/x86_64 (-m32 -march=cascadelake)

Hi! On Tue, Oct 13, 2020 at 11:58:11AM +0200, Christophe Lyon wrote: > On Mon, 12 Oct 2020 at 18:43, Segher Boessenkool > wrote: > > > > On Mon, Oct 12, 2020 at 03:26:38PM +0200, Christophe Lyon wrote: > > > That's why I kept the reporting part manual on my side: once you know > > > which commit

Re: [RFA,PATCH] Bail in bounds_of_var_in_loop if no step found.

On 10/13/20 6:02 PM, Richard Biener wrote: On October 13, 2020 5:17:48 PM GMT+02:00, Aldy Hernandez via Gcc-patches wrote: [Neither Andrew nor I are familiar with the SCEV code. We treat it as a black box :). So we could use a SCEV expert here.] In bounds_of_var_in_loop, evolution_part_i

Re: [PATCH] libstdc++: Implement C++20 features for

On 09/10/20 16:28 -0700, Thomas Rodgers via Libstdc++ wrote: Jonathan Wakely writes: On 07/10/20 18:15 -0700, Thomas Rodgers wrote: @@ -500,6 +576,40 @@ _GLIBCXX_BEGIN_NAMESPACE_CXX11 } #endif +#if __cplusplus > 201703L && _GLIBCXX_USE_CXX11_ABI + basic_istringstream(ios_base::ope

[committed] libstdc++: Update C++20 status documentation

libstdc++-v3/ChangeLog: * doc/xml/manual/evolution.xml: Document some API changes and deprecations. * doc/xml/manual/intro.xml: Document LWG 2499. * doc/xml/manual/status_cxx2020.xml: Update status. * doc/html/*: Regenerate. Committed to trunk. commit 0e0b

Re: [PATCH] combine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]

Hi! On Tue, Oct 13, 2020 at 09:44:25AM +0200, Jakub Jelinek wrote: > The following testcases are miscompiled (the first one since my improvements > to rotate discovery on GIMPLE, the other one for many years) because > combiner optimizes nested ROTATEs with narrowing SUBREG in between (i.e. > the

Re: [PING][PATCH] correct handling of indices into arrays with elements larger than 1 (PR c++/96511)

On 10/13/20 3:46 AM, Christophe Lyon wrote: On Tue, 29 Sep 2020 at 00:02, Martin Sebor via Gcc-patches wrote: On 9/25/20 11:17 PM, Jason Merrill wrote: On 9/22/20 4:05 PM, Martin Sebor wrote: The rebased and retested patches are attached. On 9/21/20 3:17 PM, Martin Sebor wrote: Ping: https

Re: [PATCH] combine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]

On Tue, Oct 13, 2020 at 11:47:10AM -0500, Segher Boessenkool wrote: > On Tue, Oct 13, 2020 at 09:44:25AM +0200, Jakub Jelinek wrote: > > The following testcases are miscompiled (the first one since my improvements > > to rotate discovery on GIMPLE, the other one for many years) because > > combiner

[PATCH] x86: Add missing intrinsics [PR95483]

Tested on x86-64. gcc/ChangeLog: * config/i386/avx2intrin.h (_mm_broadcastsi128_si256): New intrinsics. (_mm_broadcastsd_pd): Ditto. * config/i386/avx512bwintrin.h (_mm512_loadu_epi16): New intrinsics. (_mm512_storeu_epi16): Ditto. (_mm512_loadu_epi8): Ditt

[PATCH] openmp: Add support for omp_get_supported_active_levels

Hello This adds support for the omp_get_supported_active_levels OpenMP runtime routine, first introduced in the 5.0 standard. This routine returns the maximum level of nested active parallel regions supported on a particular implementation of OpenMP, and the current maximum number cannot be se

Re: [PATCH] openmp: Add support for omp_get_supported_active_levels

On Tue, Oct 13, 2020 at 07:05:10PM +0100, Kwok Cheung Yeung wrote: > --- a/libgomp/env.c > +++ b/libgomp/env.c > @@ -73,7 +73,8 @@ struct gomp_task_icv gomp_global_icv = { >.target_data = NULL > }; > > -unsigned long gomp_max_active_levels_var = INT_MAX; > +const unsigned long gomp_supported

Re: Typo in comment in stl_algo.h's any_of

On 13/10/20 19:23 +0100, Nuno Lopes via Libstdc++ wrote: Hi, There's a typo in the comment of any_of in stl_algo.h. Here's a trivial patch: --- stl_algo.h.old 2020-10-13 19:16:48.836304600 +0100 +++ stl_algo.h 2020-10-13 19:17:27.357511100 +0100 @@ -471,7 +471,7 @@ { return __last ==

Re: [PATCH] combine: Fix up simplify_shift_const_1 for nested ROTATEs [PR97386]

On Tue, Oct 13, 2020 at 07:03:15PM +0200, Jakub Jelinek wrote: > On Tue, Oct 13, 2020 at 11:47:10AM -0500, Segher Boessenkool wrote: > > On Tue, Oct 13, 2020 at 09:44:25AM +0200, Jakub Jelinek wrote: > > > The following testcases are miscompiled (the first one since my > > > improvements > > > to

[Patch] collect-utils.c, lto-wrapper + mkoffload: Improve -save-temps filename

This patch avoids putting some more files to /tmp/cc* when -save-temps has been specified. For my testcase, it now generates: a.lto_wrapper_args a.offload_args a.xnvptx-none.args a.xnvptx-none.gcc_args a.xamdgcn-amdhsa.gcc_args a.xamdgcn-amdhsa.gccnative_args a.xamdgcn-amdhsa.ld_args This patch

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

Hi! On Tue, Oct 13, 2020 at 04:40:53PM +0800, Hongtao Liu wrote: > For rtx like > (vec_select:V2SI (subreg:V4SI (inner:V2SI) 0) >(parallel [(const_int 0) (const_int 1)])) > it could be simplified as inner. You could even simplify any vec_select of a subreg of X to just a

[PATCH] PR fortran/97408 - Diagnose non-constant KIND argument to intrinsics

While looking at some other PR, I found the urgent need for a rather obvious improvement to compile-time diagnostics: The KIND argument to intrinsics must be a compile-time constant. Regtested on x86_64-pc-linux-gnu. OK for master? Thanks, Harald PR fortran/97408 - Diagnose non-constant KIND a

Re: [PATCH] openmp: Add support for omp_get_supported_active_levels

Now committed to trunk with the suggested fixes. Thanks for the quick review. Kwok On 13/10/2020 7:36 pm, Jakub Jelinek wrote: I'd suggest to #define gomp_supported_active_levels INT_MAX in libgomp.h and leave out the const variable. Another possibility is an enumerator, but we don't include

Re: [PATCH] PR fortran/97408 - Diagnose non-constant KIND argument to intrinsics

On 10/13/20 10:17 PM, Harald Anlauf wrote: The KIND argument to intrinsics must be a compile-time argument. Improve check so that the proper diagnostics is emitted. - if (!gfc_check_init_expr (k)) + if (!gfc_check_init_expr (k) || k->expr_type == EXPR_VARIABLE) I think the real question is

libgo patch committed: Ensure uniqueness of type descriptors on AIX

This libgo patch by Clément Chigot ensures the uniqueness of type descriptors on AIX. On AIX, duplication of type descriptors can occur if one is declared in the shared libgo and one in the Go program being compiled. The AIX linker isn't able to merge them together as GNU/Linux one does. One sol

[Patch] x86: Enable GCC support for Intel AVX-VNNI extension

Hi: This patch is about to support Intel AVX-VNNI instructions. AVX-VNNI is an equivalent to AVX512-VNNI with VEX encoding. The instructions are same, but with extra {vex} prefix to distinguish from AVX512-VNNI instructions in assembler. For more details, please refer to https://software.intel.c

Re: [PATCH v2] PR target/96759 - Handle global variable assignment from misaligned structure/PARALLEL return values.

Thanks for reviewing that, committed to trunk :) On Tue, Oct 13, 2020 at 5:38 PM Eric Botcazou wrote: > > > Do you mind having a review for that? > > Sorry for missing the v2 patch; yes, it looks good to me. > > -- > Eric Botcazou > >

libgo patch committed: Fix NUL terminator check in socket length

This libgo patch by Nikhil Benesch backports a fix for *BSD unix sockets from the master sources. *BSD does not include the null terminator when in its reported socketlength. Port the upstream bugfix for the issue (https://golang.org/issue/6627). This was likely missed during the usual upstream

libgo patch committed: Set signal PC on NetBSD

This libgo patch by Nikhil Benesch sets the signal PC field on NetBSD. The NetBSD libc provides an architecture-independent macro that can extract the PC from a ucontext struct. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian 7e5aeda340d71a84fbd15504e848a949b

Re: [PATCH] [PR rtl-optimization/97249]Simplify vec_select of paradoxical subreg.

On Wed, Oct 14, 2020 at 4:01 AM Segher Boessenkool wrote: > > Hi! > > On Tue, Oct 13, 2020 at 04:40:53PM +0800, Hongtao Liu wrote: > > For rtx like > > (vec_select:V2SI (subreg:V4SI (inner:V2SI) 0) > >(parallel [(const_int 0) (const_int 1)])) > > it could be simplified as

Re: [Patch] collect-utils.c, lto-wrapper + mkoffload: Improve -save-temps filename

On 10/13/20 9:37 PM, Tobias Burnus wrote: > This patch avoids putting some more files to /tmp/cc* when > -save-temps has been specified. > Very nice. > For my testcase, it now generates: > a.lto_wrapper_args > a.offload_args > a.xnvptx-none.args > a.xnvptx-none.gcc_args > a.xamdgcn-amdhsa.gcc_a

Re: [RFC][gimple] Move can_duplicate_bb_p to gimple_can_duplicate_bb_p

On Tue, 13 Oct 2020, Tom de Vries wrote: > On 10/12/20 9:15 AM, Richard Biener wrote: > > On Fri, 9 Oct 2020, Tom de Vries wrote: > > > >> Hi, > >> > >> The function gimple_can_duplicate_bb_p currently always returns true. > >> > >> The presence of can_duplicate_bb_p in tracer.c however suggests

Re: [Patch] x86: Enable support for Intel UINTR extension

On Tue, Oct 13, 2020 at 10:30 AM Hongyu Wang wrote: > > Hi: > > This patch is about to support User Interrupt (UINTR) instructions. > > This feature defines user interrupts as new events in the architecture. They > are delivered to software operating in 64-bit mode with CPL = 3 without any > ch

Re: [Patch] x86: Enable GCC support for Intel Hreset extension

On Tue, Oct 13, 2020 at 10:49 AM Hongyu Wang wrote: > > Hi: > > This patch is about to support Intel Hreset instruction. > > Hreset provides a hint to the processor to selectively reset the prediction > history of the current logical processor. > > For more details, please refer to > https://sof