Re: [committed][nvptx] Fix printing of 128-bit constant

2020-09-10 Thread Jakub Jelinek via Gcc-patches
On Thu, Sep 10, 2020 at 09:31:33PM +0200, Tom de Vries wrote: > Currently, for this code from c-c++-common/spec-barrier-1.c: > ... > __int128 g = 9; > ... > we generate: > ... > // BEGIN GLOBAL VAR DEF: g > .visible .global .align 8 .u64 g[2] = { 9, 9 }; > ... > and consequently the test-case fails

Re: [PATCH 3/4] PowerPC: Add power10 xsmaxcqp/xsmincqp support

2020-09-10 Thread Segher Boessenkool
Hi! On Wed, Aug 26, 2020 at 10:45:26PM -0400, Michael Meissner wrote: > * config/rs6000/rs6000.md (FSCALAR): New mode iterator for floating > point scalars. We have the long-established SFDF for a very similar thing. So maybe just call this SFDFTF or SDTF or something? Alternatively

[PATCH] rs6000: inefficient 64-bit constant generation for consecutive 1-bits

2020-09-10 Thread Peter Bergner via Gcc-patches
Generating arbitrary 64-bit constants on POWER can take up to 5 instructions. However, some special constants can be generated in fewer instructions. One special class of constants we don't handle, is constants that have one set of consecutive 1-bits. These can be generated with a "li rT,-1" follo

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

2020-09-10 Thread Segher Boessenkool
On Tue, Sep 08, 2020 at 09:55:19AM -0500, Qing Zhao wrote: > Downloading this paper form IEEE needs a fee. Yes, and we cannot discuss it here. > What other information you need to show the effective of mitigation ROP > attack? Anything that we *can* talk about. Stuff we cannot talk about does

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

2020-09-10 Thread Segher Boessenkool
On Tue, Sep 08, 2020 at 11:43:30AM -0500, Qing Zhao wrote: > > On Sep 7, 2020, at 10:58 AM, H.J. Lu wrote: > > On Mon, Sep 7, 2020 at 7:06 AM Segher Boessenkool > > mailto:seg...@kernel.crashing.org>> wrote: > >> On Fri, Sep 04, 2020 at 11:52:13AM -0700, H.J. Lu wrote: > >>> On Fri, Sep 4, 2020 at

[PATCH] c++: Fix P0846 (ADL and function templates) in template [PR97010]

2020-09-10 Thread Marek Polacek via Gcc-patches
To quickly recap, P0846 says that a name is also considered to refer to a template if it is an unqualified-id followed by a < and name lookup finds either one or more functions or finds nothing. In a template, when parsing a function call that has type-dependent arguments, we can't perform ADL rig

Re: [PATCH V2] libgccjit: Add new gcc_jit_context_new_blob entry point

2020-09-10 Thread David Malcolm via Gcc-patches
On Wed, 2020-08-19 at 09:17 +0200, Andrea Corallo wrote: > David Malcolm writes: > > > Thanks for the updated patch. Comments inline below. > > Hi Dave, > > sorry for the late reply. Likewise, sorry. [...] > > Why the non-void return type? Looking at libgccjit.c I see it returns > > "globa

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

2020-09-10 Thread Qing Zhao via Gcc-patches
> On Sep 10, 2020, at 2:07 PM, Kees Cook wrote: > > [tried to clean up quoting...] > > On Tue, Sep 08, 2020 at 10:00:09AM -0500, Qing Zhao wrote: >> >>> On Sep 7, 2020, at 8:06 AM, Rodriguez Bahena, Victor >>> wrote: >>> > On Thu, Sep 03, 2020 at 09:29:54AM -0500, Qing Zhao wrote: >>>

[PATCH] fortran, openmp: PR fortran/93660 Fix ICE when coarrays used with 'omp declare simd'

2020-09-10 Thread Kwok Cheung Yeung
Hello The ICE from the test case in PR93660 is due to the hidden caf_token and caf_offset parameters generated by the Fortran front end due to the use of coarrays: chain >> ... arguments type integer(kind=4)> ... readonly used unsigned DI pass

Re: PING [Patch][Middle-end]Add -fzero-call-used-regs=[skip|used-gpr|all-gpr|used|all]

2020-09-10 Thread Qing Zhao via Gcc-patches
> On Sep 10, 2020, at 5:05 PM, Segher Boessenkool > wrote: > > On Tue, Sep 08, 2020 at 11:43:30AM -0500, Qing Zhao wrote: >>> On Sep 7, 2020, at 10:58 AM, H.J. Lu wrote: >>> On Mon, Sep 7, 2020 at 7:06 AM Segher Boessenkool >>> mailto:seg...@kernel.crashing.org>> wrote: On Fri, Sep 04,

[committed] analyzer: stricter handling of non-pure builtins [PR96798]

2020-09-10 Thread David Malcolm via Gcc-patches
Amongst other things PR analyzer/96798 notes that region_model::on_call_pre treats any builtin that hasn't been coded yet as a no-op (albeit with an unknown return value), which is wrong for non-pure builtins. This patch updates that function's handling of such builtins so that it instead conserva

[PATCH] c++: Remove LOOKUP_CONSTINIT.

2020-09-10 Thread Marek Polacek via Gcc-patches
Since we now have DECL_DECLARED_CONSTINIT_P, we no longer need LOOKUP_CONSTINIT. Bootstrapped/regtested on x86_64-pc-linux-gnu, ok for trunk? gcc/cp/ChangeLog: * cp-tree.h (LOOKUP_CONSTINIT): Remove. (LOOKUP_REWRITTEN): Adjust. * decl.c (duplicate_decls): Set DECL_DECLARE

[PATCH][PR96791] disable POImode ld/st for memcpy [committed]

2020-09-10 Thread Aaron Sawdey via Gcc-patches
This is a (hopefully temporary) fix to PR96791. This will make the default be -mno-block-ops-vector-pair even on power10, so we will not hit the issue of DSE trying to truncate a POImode register. I am still concerned it will be possible to hit this because the MMA builtins will also generate POImo

[committed][nvptx] Fix printing of 128-bit constant (negative case)

2020-09-10 Thread Tom de Vries
[ was: Re: [committed][nvptx] Fix printing of 128-bit constant ] On 9/10/20 10:26 PM, Jakub Jelinek wrote: > On Thu, Sep 10, 2020 at 09:31:33PM +0200, Tom de Vries wrote: >> Currently, for this code from c-c++-common/spec-barrier-1.c: >> ... >> __int128 g = 9; >> ... >> we generate: >> ... >> // B

[committed][nvptx] Fix UB in nvptx_assemble_value

2020-09-10 Thread Tom de Vries
[ was: Re: [committed][nvptx] Fix printing of 128-bit constant ] On 9/10/20 10:26 PM, Jakub Jelinek wrote: > On Thu, Sep 10, 2020 at 09:31:33PM +0200, Tom de Vries wrote: >> Currently, for this code from c-c++-common/spec-barrier-1.c: >> ... >> __int128 g = 9; >> ... >> we generate: >> ... >> // B

Re: [PATCH] [PATCH] PR rtl-optimization/96791 Check precision of partial modes

2020-09-10 Thread Richard Biener via Gcc-patches
On Thu, Sep 10, 2020 at 5:12 PM Segher Boessenkool wrote: > > Hi! > > On Thu, Sep 10, 2020 at 04:33:30PM +0200, Richard Biener wrote: > > On Thu, Sep 10, 2020 at 4:22 PM Aaron Sawdey wrote: > > > If it feels like a hack, that would because it is a hack. > > > > > > What I’d really like to discuss

Re: [RFC] Aarch64: Replace nested FP min/max with conditionals for TX2

2020-09-10 Thread Richard Biener via Gcc-patches
On Fri, Sep 11, 2020 at 8:27 AM Anton Youdkevitch wrote: > > Richard, > > On Thu, Sep 10, 2020 at 12:03 PM Richard Biener > wrote: >> >> On Wed, Sep 9, 2020 at 5:51 PM Anton Youdkevitch >> wrote: >> > >> > ThunderxT2 chip has an odd property that nested scalar FP min and max are >> > slower tha

<    1   2