Hi Hongtao,
>> > Ok for trunk?
>>
>> ENOPATCH
> Sorry, Here is the patch.
> Changelog
>
> gcc/
> +2019-06-27 Hongtao Liu
> +
> + * doc/sourcebuild.texi (Effective-Target Keywords, Other
> + hardware attributes): Document avx512vp2intersect.
> +
>
> gcc/testsuite/
> +2019-06-27 Hongtao Liu
>
Hi Christophe,
> I've also noticed that
> FAIL: g++.dg/tree-ssa/pr90883.C scan-tree-dump dse1 "Deleted
> redundant store: .*.a = {}"
> on aarch64
it also FAILs on sparc, ia64, m68k, and mips64el.
Rainer
--
-
Hi Dennis,
On 6/27/19 4:58 PM, Dennis Zhang wrote:
Hi Kyrill,
Thanks for the review!
On 6/24/19 5:27 PM, Kyrill Tkachov wrote:
Hi Dennis,
On 6/24/19 4:13 PM, Dennis Zhang wrote:
Hi,
A number of Arm define_expand patterns have specified constraints for
their operands. But the constraint str
The affine transformations are not commutative (the two source operands
have entirely different meaning).
Also the nonimmediate_operand predicate can better be vector_operand.
gcc/
2019-06-28 Jan Beulich
* config/i386/sse.md (vgf2p8affineinvqb_,
vgf2p8affineqb_): Drop % constr
Steve Ellcey writes:
> I am testing the latest GCC with not-yet-submitted GLIBC changes that
> implement libmvec on Aarch64.
>
> While trying to run SPEC 2017 (specifically 521.wrf_r) I ran into a
> case where GCC was generating a call to _ZGVnN2vv_powf, that is a
> vectorized powf call for 2 (not
There's no need for three alternatives: "v" without TARGET_AVX512F is
the same as "x".
gcc/
2019-06-28 Jan Beulich
* config/i386/sse.md (vgf2p8affineinvqb_,
vgf2p8affineqb_): Eliminate redundant
alternative.
---
v2: New, split off from previous bigger patch.
---
In fact
On 27/06/2019 20:54, Steve Ellcey wrote:
> I am testing the latest GCC with not-yet-submitted GLIBC changes that
> implement libmvec on Aarch64.
>
> While trying to run SPEC 2017 (specifically 521.wrf_r) I ran into a
> case where GCC was generating a call to _ZGVnN2vv_powf, that is a
> vectorized
On Fri, Jun 28, 2019 at 10:56 AM Jan Beulich wrote:
>
> There's no need for three alternatives: "v" without TARGET_AVX512F is
> the same as "x".
>
> gcc/
> 2019-06-28 Jan Beulich
>
> * config/i386/sse.md (vgf2p8affineinvqb_,
> vgf2p8affineqb_): Eliminate redundant
> alte
On Jun 27, 2019, Richard Biener wrote:
> On Thu, Jun 27, 2019 at 10:18 AM Alexandre Oliva wrote:
>>
>> The only preexisting use of GIMPLE_EH_ELSE, for transactional memory
>> commits, did not allow exceptions to escape from the ELSE path. The
>> trick it uses to allow the ELSE path to see the
This patch improves the diagnostics given for unmappable C++ types in
OpenMP programs.
Here is the output *without* the patch, for the new testcase:
unmappable-1.C: In function 'int main()':
unmappable-1.C:16:24: error: 'v' does not have a mappable type in 'map'
clause
16 | #pragma om
Hi,
this reimplements the GNU threads library on native Windows (except for the
Objective-C specific subset) using direct Win32 API calls, in lieu of the
implementation based on semaphores. This base implementations requires
Windows XP/Server 2003, which is the default minimal setting of MinGW
Attached patch enables SSE instructions for MMX modes also for 32bit
x86 targets. We can't use the same approach as with 64bit targets
(disable all MMX instructions to enable autovectorization) since ABI
mandates MMX modes in MMX registers, and sometimes there is no
equivalent SSE insn on 32bit tar
Hi Mike,
On Thu, Jun 27, 2019 at 12:49:00PM -0400, Michael Meissner wrote:
> As I detail in PR 91009, I had some testsuite failures with my patches for a
> future machine. In the future patches, I added new RTL attributes to support
> the new prefixed load/store instructions (which will include p
Ping. (And thanks for the reviews of the other patches in the series.)
Richard Sandiford writes:
> add_insn_allocno_copies and its subroutines used HARD_REG_SET to
> represent a bitmask of alternatives. There's not really any connection
> between the number of registers and the maximum number o
Hi!
It is nice to be able to reload the pretty printers and convenience
functions from gdbhooks.py without exiting GDB: reloading cc1 takes
several seconds (plus, the debugging session is lost).
Previously:
(gdb) python import imp; imp.reload(gdbhooks);
RuntimeError: pretty-printer already
Hi,
this patch proceeds with further integrating
nonoverlapping_component_refs_for_decl_p and nonoverlapping_component_refs_p
however in bit more careful way then I intended previously (so we do not need
to xfail testcases and miss disambiguations we handled prevoiusly). The
problems with an attem
gcc/ChangeLog:
2019-06-28 Iain Apreotesei
* config/arm/iterators.md (VRHADD, VHADD): Add, update int_iterators.
(u) new int_attr.
* config/arm/neon.md (avg3_floor, avg3_ceil)
(neon_vhadd, neon_vrhadd): Add new patterns.
gcc/testsuite/ChangeLog:
2019-06-28 Iain Apreotesei
A recent RTX cost commit has changed the costs for ARC700 leading to
errors in slsr-13.c test. This commit fixes this issue by reverting
the cost computation for short instructions.
2019-06-28 Claudiu Zissulescu
* config/arc/arc.c (arc_rtx_costs): All short instructions are
ha
Hi Mike,
On Thu, Jun 27, 2019 at 08:12:35PM -0400, Michael Meissner wrote:
> + return (TARGET_CMODEL == CMODEL_MEDIUM && SYMBOL_REF_P (op)
> + && SYMBOL_REF_LOCAL_P (op));
Please break the line before that first && as well?
> +(define_predicate "pcrel_external_address"
> + (match_code "s
Hi,
It seems I forgot to include the email's body as well :-)
This patch adds Arm patterns for the new AVG_FLOOR/CEIL operations.
AVG_FLOOR is VHADD and AVG_CEIL is VHRADD.
I have added three DejaGnu tests in the patch to ensure that the
appropriate assembler is getting generated.
Is this okay
This is another issue found during smoke testing glibc.
When storing a TLS symbol to memory, always use an intermediate
register to load it.
Ok to apply?
Claudiu
gcc/
-xx-xx Claudiu Zissulescu
* config/arc/arc.c (prepare_move_operands): Always use an
intermediate register
When entering an interrupt, not only the call save registers needs to
be place on stack but also the call clobbers one. More over, the
ARC700 return from interrupt instruction needs to be rtie, the same
like ARCv2 CPUs. While the ARC6xx family uses j.f [ilinkX]
instruction. Additionally, we need to
On 2019-06-28 7:46 a.m., Richard Sandiford wrote:
Ping. (And thanks for the reviews of the other patches in the series.)
Sorry, I missed this patch. Yes, the patch is OK, Richard.
Richard Sandiford writes:
add_insn_allocno_copies and its subroutines used HARD_REG_SET to
represent a bitmas
On 5/28/19 10:31 AM, Martin Sebor wrote:
On 5/28/19 4:24 AM, Martin Liška wrote:
On 5/28/19 11:31 AM, David CARLIER wrote:
Hi,
Here a tiny patch to fix few build warnings.
Kind regards.
Hi.
Well, I see a lot of these struct/class discrepancies when building
GCC with LLVM.
Question is wh
On 6/28/19 8:20 AM, Segher Boessenkool wrote:
> Hi Mike,
>
> On Thu, Jun 27, 2019 at 08:12:35PM -0400, Michael Meissner wrote:
>> + return (TARGET_CMODEL == CMODEL_MEDIUM && SYMBOL_REF_P (op)
>> + && SYMBOL_REF_LOCAL_P (op));
> Please break the line before that first && as well?
>
>> +(define
On Fri, Jun 28, 2019 at 08:55:00AM -0600, Martin Sebor wrote:
> Jeff reminded me in a code review the other day that GCC does
> have a guideline for defining POD structs with the keyword
> "struct" and classes with ctors/dtors using "class":
>
> https://gcc.gnu.org/codingconventions.html#Struct_
On 6/28/19 1:55 AM, Rainer Orth wrote:
> Hi Christophe,
>
>> I've also noticed that
>> FAIL: g++.dg/tree-ssa/pr90883.C scan-tree-dump dse1 "Deleted
>> redundant store: .*.a = {}"
>> on aarch64
>
> it also FAILs on sparc, ia64, m68k, and mips64el.
sparc seems to be emitting a loop when we expect
Hi Eric,
On 6/28/19 3:42 PM, NightStrike wrote:
FYI, Eric posted this today to the GCC patches list. This may be of
great interest to many who would prefer native threads instead of the
winpthreads posix style interface.
Great work, Eric! I look forward to trying this out!
-- Forward
On 6/28/19 1:55 AM, Rainer Orth wrote:
> Hi Christophe,
>
>> I've also noticed that
>> FAIL: g++.dg/tree-ssa/pr90883.C scan-tree-dump dse1 "Deleted
>> redundant store: .*.a = {}"
>> on aarch64
>
> it also FAILs on sparc, ia64, m68k, and mips64el.
It's an interaction with CLEAR_RATIO that's caus
On 6/28/19 6:46 AM, Andrew Stubbs wrote:
This patch improves the diagnostics given for unmappable C++ types in
OpenMP programs.
Here is the output *without* the patch, for the new testcase:
unmappable-1.C: In function 'int main()':
unmappable-1.C:16:24: error: 'v' does not have a mappable
On 6/28/19 1:55 AM, Rainer Orth wrote:
> Hi Christophe,
>
>> I've also noticed that
>> FAIL: g++.dg/tree-ssa/pr90883.C scan-tree-dump dse1 "Deleted
>> redundant store: .*.a = {}"
>> on aarch64
>
> it also FAILs on sparc, ia64, m68k, and mips64el.
alpha is also affected.
Jeff
On 22/05/2019 23:21, Andrew Stubbs wrote:
Trampolines work just fine on GCN3 devices, but GCN5 devices have
execute permission hardware, and the driver sets permission off for the
private segment allocation in which the stacks are located.
It may be possible to implement indirect calls to nest
On 6/28/19 8:55 AM, Martin Sebor wrote:
> On 5/28/19 10:31 AM, Martin Sebor wrote:
>> On 5/28/19 4:24 AM, Martin Liška wrote:
>>> On 5/28/19 11:31 AM, David CARLIER wrote:
Hi,
Here a tiny patch to fix few build warnings.
Kind regards.
>>>
>>> Hi.
>>>
>>> Well, I see a
On Thu, Jun 27, 2019 at 9:55 PM Li Jia He wrote:
>
>
>
> On 2019/6/27 11:48 PM, Jeff Law wrote:
> > On 6/27/19 12:11 AM, Li Jia He wrote:
> >> Hi,
> >>
> >> According to the optimizable case described by Qi Feng on
> >> issue 88784, we can combine the cases into the following:
> >>
> >> 1. x > y
On 6/28/19 10:59 AM, Jeff Law wrote:
On 6/28/19 8:55 AM, Martin Sebor wrote:
On 5/28/19 10:31 AM, Martin Sebor wrote:
On 5/28/19 4:24 AM, Martin Liška wrote:
On 5/28/19 11:31 AM, David CARLIER wrote:
Hi,
Here a tiny patch to fix few build warnings.
Kind regards.
Hi.
Well, I see a lot of
Segher Boessenkool writes:
> On Fri, Jun 28, 2019 at 08:55:00AM -0600, Martin Sebor wrote:
>> Jeff reminded me in a code review the other day that GCC does
>> have a guideline for defining POD structs with the keyword
>> "struct" and classes with ctors/dtors using "class":
>>
>> https://gcc.gnu
At the moment, we have two functions that create and look at TOC references:
create_TOC_reference(global function)
use_toc_relative_ref(static function in rs6000.c)
Since I am adding pc-relative support that will be used instead of TOC support,
this patch renames these two
As per $SUBJECT.
tested on a number of Darwin versions
applied to mainline
Iain
2019-06-28 Iain Sandoe
* config/darwin-c.c (pop_field_alignment): Quote #pragma options.
* config/darwin-driver.c (darwin_default_min_version): Remove newline
from warning.
(darwin_
On Fri, Jun 28, 2019 at 08:20:35AM -0500, Segher Boessenkool wrote:
> Hi Mike,
>
> On Thu, Jun 27, 2019 at 08:12:35PM -0400, Michael Meissner wrote:
> > + return (TARGET_CMODEL == CMODEL_MEDIUM && SYMBOL_REF_P (op)
> > + && SYMBOL_REF_LOCAL_P (op));
>
> Please break the line before that firs
This is primarily in order to improve testsuite coverage, (it allows us to run
the compile tests for the x86 intrinisics support, for example). We might
elect to prune the list at some point.
tested on powerpc-darwin9
applied to mainline
Iain
2019-06-28 Iain Sandoe
* config.gcc (powe
On Fri, Jun 28, 2019 at 07:46:54PM +0100, Richard Sandiford wrote:
> Segher Boessenkool writes:
> > On Fri, Jun 28, 2019 at 08:55:00AM -0600, Martin Sebor wrote:
> >> Jeff reminded me in a code review the other day that GCC does
> >> have a guideline for defining POD structs with the keyword
> >>
Gaius,
I tried to apply your patch and build and got the following error:
--
/home/ed/obj_modula2/./prev-gcc/xg++ -B/home/ed/obj_modula2/./prev-gcc/
-B/home/ed/bin_modula2/x86_64-pc-linux-gnu/bin/ -nostdinc++
-B/home/ed/ob
On 6/28/19 2:10 PM, Segher Boessenkool wrote:
On Fri, Jun 28, 2019 at 07:46:54PM +0100, Richard Sandiford wrote:
Segher Boessenkool writes:
On Fri, Jun 28, 2019 at 08:55:00AM -0600, Martin Sebor wrote:
Jeff reminded me in a code review the other day that GCC does
have a guideline for defining
On 6/27/19 12:39 PM, Aaron Sawdey wrote:
> On 6/25/19 4:43 PM, Jeff Law wrote:
>> On 6/25/19 2:22 PM, acsaw...@linux.ibm.com wrote:
>>> From: Aaron Sawdey
>>>
>>> * builtins.c (get_memory_rtx): Fix comment.
>>> * optabs.def (movmem_optab): Change to cpymem_optab.
>>> * expr.c (emit_blo
On 6/28/19 7:39 AM, Claudiu Zissulescu wrote:
> This is another issue found during smoke testing glibc.
>
> When storing a TLS symbol to memory, always use an intermediate
> register to load it.
>
> Ok to apply?
> Claudiu
>
> gcc/
> -xx-xx Claudiu Zissulescu
>
> * config/arc/arc.c
> 2018-08-17 Tom de Vries
>
> * dwarf2out.c (add_scalar_info): Don't add reference to existing die
> unless the referenced die describes the added property using
> DW_AT_location or DW_AT_const_value. Fall back to exprloc case.
> Otherwise, add a DW_AT_location to the r
On Tue, 2019-06-25 at 15:22 -0500, acsaw...@linux.ibm.com wrote:
> From: Aaron Sawdey
>
> * config/sh/sh.md (movmemsi): Change name to cpymemsi.
> ---
> gcc/config/sh/sh.md | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
>
在 2019/6/29 上午12:10, Jacek Caban 写道:
>
> You don't really need to store the whole __gthr_win32_thr_desc in TLS.
> If you stored just the handle, this wouldn't need a destructor.
>
>
The handle to be stored in the TLS ('the Handle' for short hereinafter)
should be a real handle, so there are a f
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