On Wed, Sep 26, 2018 at 9:57 AM, Uros Bizjak wrote:
> I've committed a patch to update libgo to the 1.11 release. As usual
> for these updates, the patch is too large to attach to this e-mail
> message. I've attached some of the more relevant directories. This
> update required some minor patch
On Thu, 27 Sep 2018 at 21:29, Joseph Myers wrote:
>
> On Thu, 27 Sep 2018, Christophe Lyon wrote:
>
> > After this patch I've noticed regressions on
> > fp-int-convert-float16-timode.c
> > gcc.dg/torture/fp-int-convert-float16.c
> > on aarch64 and arm (at execution time)
>
> Does this patch help?
Andrew Stubbs writes:
> On 27/09/18 17:19, Richard Sandiford wrote:
>> But we wouldn't recurse for PRE_INC, MEM or ASM_OPERANDS, since they
>> have the wrong rtx class. AFAICT no current unary, binary or ternary
>> operator has that level of side-effect (and that's a good thing).
>
> OK, in that
On 27/09/2018 17:40, Richard Henderson wrote:
On 9/27/18 6:07 AM, Ramana Radhakrishnan wrote:
I do have an additional concern that I forgot to mention in Vancouver -
Thanks Wilco for reminding me that this now replaces a bunch of inline
instructions with effectively a library call therefore clo
This patch rewrites the implementation of BRANCH_COST to use a table and take
into account the couple of parameters. It also fixes out-of-range issues for
the Compare-and-Branch-on-Condition instructions on Niagara-4 and later, and
cleans up the handling of MASK_FSMULD.
Bootstrapped/regtested
This series will aim at introducing a DIE_REF tree node which we can
use to carry references to debug entities in places like
DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN. The main motivation
is to cut down the amount of trees we stream for LTO but in principle
it should also allow for more GCi
The following is step number one to make BLOCK_ABSTRACT_ORIGIN behave
similar to DECL_ABSTRACT_ORIGIN, namely point to the ultimate origin.
I've audited all uses and they all are interested in the ultimate
origin only (well, most do not bother to look at DECL_ORIGIN of the
FUNCTION_DECL they even
The following patch makes the inliner assign the decl location of the
function we inline to the inline-entry marker which is what we later
need when processing line info. This avoids the need to keep the
actual FUNCTION_DECL live until that point. It avoids streaming it
to LTO and allows us to
On Thu, 27 Sep 2018 at 20:48, Christophe Lyon
wrote:
>
> On Wed, 26 Sep 2018 at 17:26, Martin Jambor wrote:
> >
> > Hi,
> >
> > On Wed, Sep 26 2018, Christophe Lyon wrote:
> > > On Tue, 25 Sep 2018 at 17:50, Martin Jambor wrote:
> > >>
> > >> Hi,
> > >>
> > >> On Mon, Sep 24 2018, Christophe Lyo
On Tue, Sep 25, 2018 at 9:12 PM David Malcolm wrote:
>
> As noted at Cauldron, dumpfile.c currently emits "note: " for all kinds
> of dump message, so that (after filtering) there's no distinction between
> MSG_OPTIMIZED_LOCATIONS vs MSG_NOTE vs MSG_MISSED_OPTIMIZATION in the
> textual output.
>
>
On 27/09/18 18:07, Wilco Dijkstra wrote:
> The popcount expansion uses SIMD instructions acting on 64-bit values.
> As a result a popcount of a 32-bit integer requires zero-extension before
> moving the zero-extended value into an FP register. This patch adds
> support for zero-extended int->FP m
On 27/09/18 16:18, Matthew Malcomson wrote:
>
> I had a superfluous #include in the testcase and some
> spelling mistakes in documentation -- corrected patch attached.
>
>
> On 27/09/18 15:02, Matthew Malcomson wrote:
>> Hello,
>>
>> LSE instructions like casp require even-odd pairs of registers
On 26/09/18 15:44, Steve Ellcey wrote:
>
> The patch for PR rtl-optimization/85160 which allowed combine to convert
> two instructions into two different instructions if they had a lower cost
> caused a couple of regressions on aarch64. This patch fixes one of them.
>
> After the above patch, th
This completes [1/n] and uses DECL_ORIGIN when assigning a decl to
BLOCK_ABSTRACT_ORIGIN.
It also simplifies block_ultimate_origin further and puts some checking
inside it (that already passed bootstrap).
Bootstrap and regtest ongoing on x86_64-unknown-linux-gnu.
Richard.
2018-09-28 Richard
Matthew wrote:
> The canonical way to require even-odd pairs of registers to implement a TImode
> pseudo register as mentioned in the documentation is to limit *all* TImode
> registers to being even-odd by using the TARGET_HARD_REGNO_MODE_OK hook.
And that is the best approach for cases like this
On 19/09/18 14:45, Richard Biener wrote:
So I guess the current_vector_size thing isn't too hard to get rid of, what
you'd end up with would be using that size when you decide for vector
types for loads (where there are no USEs with vector types, so for example
this would not apply to gathers).
It turns out that nobody sets this anymore (dwarf2out did with the
original code of outputting abstract instances, temporarily so IIRC).
Bootstrap and regtest running on x86_64-unknown-linux-gnu.
Any objection to purge it completely like this?
DECL_ABSTRACT_P is a similar beast but I see the C
On Wed, 26 Sep 2018 14:08:37 -0700
Cesar Philippidis wrote:
> On 09/26/2018 12:50 PM, Joseph Myers wrote:
> > On Wed, 26 Sep 2018, Cesar Philippidis wrote:
> >
> >> Attached is an old patch which updated the C and C++ FEs to use
> >> %<)%> for the right ')' symbol. It's mostly a cosmetic chang
On 28/09/18 09:11, Richard Sandiford wrote:
Yes, thanks.
Committed.
Thanks for all the reviews. :-)
Andrew
This patch to the Go frontend by Than McIntosh fixes a problem when
the name of a package starts with a non-ASCII character. The function
Lex::is_exported_name (which assumes that its input is a mangled name)
was being called on non-mangled (raw utf-8) names in various places.
In https://golang.or
Hi Wilko,
On 28/09/18 13:33, Wilco Dijkstra wrote:
Matthew wrote:
The canonical way to require even-odd pairs of registers to implement a TImode
pseudo register as mentioned in the documentation is to limit *all* TImode
registers to being even-odd by using the TARGET_HARD_REGNO_MODE_OK hook.
On 17/09/18 19:55, Richard Sandiford wrote:
Which part of the backend needs this? I couldn't tell from a quick
grep where the call came from.
It wasn't called directly, but from builtins.c and df-scan.c.
I needed this for GCC7, but apparently in newer source-bases the problem
has been fixed
Hi Ian,
> I've committed a patch to update libgo to the 1.11 release. As usual
> for these updates, the patch is too large to attach to this e-mail
> message. I've attached some of the more relevant directories. This
> update required some minor patches to the gotools directory and the Go
> tes
On 28/09/18 13:33, Wilco Dijkstra wrote:
> Matthew wrote:
>
>> The canonical way to require even-odd pairs of registers to implement a
>> TImode
>> pseudo register as mentioned in the documentation is to limit *all* TImode
>> registers to being even-odd by using the TARGET_HARD_REGNO_MODE_OK hook
Hi,
this is a proof-of-concept patch for type merging during LTO streaming. It
does two things
1) replace type variant by first compatible one in TYPE_NEXT_VARIANT list
This is useful at compilation time because frontends produce more variants
than needed. The effect of this is about 2% of de
On 28/09/18 15:28, Richard Earnshaw (lists) wrote:
> On 28/09/18 13:33, Wilco Dijkstra wrote:
>> Matthew wrote:
>>
>>> The canonical way to require even-odd pairs of registers to implement a
>>> TImode
>>> pseudo register as mentioned in the documentation is to limit *all* TImode
>>> registers to
Hello!
FPSR_REG was introduced to implement reduction loop of fmod and
remainder x87 sequences. There is no point to declare it as a generic
CCmode register and also no point to mark it as clobbered in every asm
insn.
2018-09-28 Uros Bizjak
* config/i386/i386.h (CC_REGNO): Remove FPSR_REG
The check is just wrong.
The patch also makes the name visually different from SSE_REGNO_P.
2018-09-28 Uros Bizjak
* config/i386/i386.h (SSE_REGNO): Fix check for FIRST_REX_SSE_REG.
(GET_SSE_REGNO): Rename from SSE_REGNO. Update all uses for rename.
Bootstrapped and regression teste
On Fri, 28 Sep 2018, Christophe Lyon wrote:
> Yes, it works, thanks!
Thanks, committed as r264696.
--
Joseph S. Myers
jos...@codesourcery.com
On 26/09/2018 06:03, rth7...@gmail.com wrote:
From: Richard Henderson
This is the libgcc part of the interface -- providing the functions.
Rationale is provided at the top of libgcc/config/aarch64/lse.c.
* config/aarch64/lse.c: New file.
* config/aarch64/t-lse: New file.
Right, for version 2 I've updated the Changelog and added a few more tweaks
so the test works on ILP32 and we support LDP to floating pointer registers too:
The popcount expansion uses SIMD instructions acting on 64-bit values.
As a result a popcount of a 32-bit integer requires zero-extension bef
Hi All,
This is a minor update to fix stack-check-12.c for ilp32.
The datatype would be too small on ilp32 to require a probe.
gcc/testsuite/
2018-08-28 Tamar Christina
PR target/86486
* gcc.dg/pr82788.c: Skip for AArch64.
* gcc.dg/guality/vla-1.c: Turn off stack-clash
Hi Richard,
Here's the updated patch with all the feedback processed.
I have also run the compile tests through with -mabi=ilp32 as well.
Ok for trunk?
Thanks,
Tamar
The 09/27/2018 12:11, Richard Sandiford wrote:
> > It turns out the testsuite didn't have a case in it which would cause a
> > s
Hi,
the primary issue here is a rather straightforward error-recovery,
where, after a sensible (but see below) error message we ICE in
get_underlying_template - called by convert_template_argument - because
we don't handle correctly error_mark_node as TREE_TYPE, as set in
grokdeclarator. Whil
On 9/25/18 4:21 AM, Eric Botcazou wrote:
> Hi,
>
> this extends the support for thunks present in the middle-end to accomodate
> the Ada language, which can generate more diverse thunks than C++. The main
> couple of enhancements are:
> 1. Indirect offsets used to implement thunks for self-ref
On 9/28/18 9:29 AM, Wilco Dijkstra wrote:
> + [(set (match_operand:DI 0 "register_operand" "=r,r,w,w")
> +(zero_extend:DI (match_operand:SI 1 "nonimmediate_operand"
> "r,m,r,m")))]
>""
>"@
> uxtw\t%0, %w1
> - ldr\t%w0, %1"
> - [(set_attr "type" "extend,load_4")]
> + ldr\t
On 9/27/18 5:03 PM, Martin Sebor wrote:
> On 09/27/2018 12:25 PM, Jeff Law wrote:
>> On 9/26/18 5:54 PM, Martin Sebor wrote:
>>> The attached patch adds attributes nonnull and pure to
>>> tree_to_shwi() and a small number of other heavily used functions
>>> that will benefit from both.
>>>
>>> Firs
Hi,
this is a regression introduced by the canonicalization of BIT_FIELD_REF in
match.pd, which totally disregards the REF_REVERSE_STORAGE_ORDER flag, and
visible as the failure of gnat.dg/sso/q[23].adb on SPARC 64-bit. But the
underlying issue of the missing propagation of the flag during GIM
Tamar Christina writes:
> Hi Richard,
>
> Here's the updated patch with all the feedback processed.
>
> I have also run the compile tests through with -mabi=ilp32 as well.
>
> Ok for trunk?
OK. Thanks for your patience through all the reviews.
Richard
On Fri, Sep 28, 2018 at 12:42 PM, Paolo Carlini
wrote:
> Hi,
>
> the primary issue here is a rather straightforward error-recovery, where,
> after a sensible (but see below) error message we ICE in
> get_underlying_template - called by convert_template_argument - because we
> don't handle correctl
"make selftest-valgrind" shows a couple of leaks, presumably introduced
in r264052 (PR driver/83193):
440 bytes in 1 blocks are definitely lost in loss record 590 of 668
at 0x4A083AA: realloc (in
/usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x20C4AAC: xrealloc (xmalloc.c:179)
Richard Henderson wrote:
> If you're going to add moves r->w, why not also go ahead and add w->r.
> There are also HImode fmov zero-extensions, fwiw.
Well in principle it would be possible to support all 8/16/32-bit zero
extensions
for all combinations of int and fp registers. However I prefer t
This is v3 of this patch kit; previous versions were:
v2: https://gcc.gnu.org/ml/gcc-patches/2018-07/msg00446.html
v1: https://gcc.gnu.org/ml/gcc-patches/2018-06/msg01462.html
The overall goal of this patch kit is to make the output of
-fopt-info more readable for technically-advanced end-user
This patch introduces a verbosity level to dump messages:
"user-facing" vs "internals".
By default, messages at the top-level dump scope are "user-facing",
whereas those that are in nested scopes are implicitly "internals",
and are filtered out by -fopt-info unless a new "-internals" sub-option
of
Attempts to dump via -fopt-info from a plugin pass fail, due
to the dfi->alt_state for such passes never being set.
This is because the -fopt-info options were being set up per-pass
during option-parsing (via gcc::dump_manager::opt_info_enable_passes),
but this data was not retained or used it for
On Fri, Sep 28, 2018 at 10:57 AM Wilco Dijkstra wrote:
>
> Richard Henderson wrote:
>
> > If you're going to add moves r->w, why not also go ahead and add w->r.
> > There are also HImode fmov zero-extensions, fwiw.
>
> Well in principle it would be possible to support all 8/16/32-bit zero
> exten
Hi,
On 9/28/18 7:18 PM, Jason Merrill wrote:
On Fri, Sep 28, 2018 at 12:42 PM, Paolo Carlini
wrote:
Hi,
the primary issue here is a rather straightforward error-recovery, where,
after a sensible (but see below) error message we ICE in
get_underlying_template - called by convert_template_argum
Committed as trivial.
The main reason I am fixing this is that:
if (__it._M_get_sequence()->begin() == __it._M_get_sequence()->end())
is generating safe iterators to check for an empty sequence. Doing so it
locks the mutex to link the iterator so quite an expensive operation
compared to
On 09/26/2018 05:14 PM, Peter Bergner wrote:
PR86939 shows a problem where IRA (and LRA) adds an unneeded conflict between
a pseudo reg and a hard reg leading to an unnecessary copy. The definition
of conflict that most register allocators use is that two live ranges conflict
if one is "live" at
All supported assemblers know lwsync, so we never need to generate this
instruction using the .long escape hatch.
Tested on powerpc*-linux and on AIX (7.1 and 7.2). Committing.
2018-09-28 Segher Boessenkool
* config.in (HAVE_AS_LWSYNC): Delete.
* config/powerpcspe/powerpcspe
Every supported assembler supports these instructions. Committing.
2018-09-27 Segher Boessenkool
* config.in: Delete HAVE_AS_DCI.
* config/powerpcspe/powerpcspe.h: Treat HAVE_AS_DCI as always true.
* config/rs6000/rs6000.h: Ditto.
* configure.ac: Delete HAVE_A
Now that e.g. ASM_CPU_POWER5_SPEC is always "-mpower5" it is clearer and
easier to just write that directly.
Tested on powerpc64-linux {-m32,-m64}. Committing.
2018-09-28 Segher Boessenkool
* config/rs6000/driver-rs6000.c (asm_names): Adjust the entries for
power5 .. power9
This fixes the lack of symmetry in checking for function pointer
arguments in simple_comparison.
In other places, we check both operands as it is possible one is a void
pointer.
This only affects 32-bit hppa.
Tested on hppa-unknown-linux-gnu. Committed to trunk.
Dave
--
John David Anglin d
Currently, both IRA and LRA spill all pseudo regs that are live across a
setjmp call. If the target has a sane setjmp, then the compiler should not
have to treat the setjmp call any differently than is does any other normal
function call. Namely, just mark all pseudos that are live across the set
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