On Fri, 20 Jul 2018, Bernd Edlinger wrote:
> Hi!
>
> This fixes a not NUL terminated STRING_CST object.
>
> Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
> Is it OK for trunk?
OK.
Richard.
Thank you Wilco for the inputs and we agree that the fix break down
for the case.
Meanwhile ,attached patch will take care the inputs and we are testing
the patch vigorously ,would you recommended any test-suite out there
for the same ?
Thank you
~Umesh
On Fri, Jul 20, 2018 at 10:04 PM, Wilco
On Sun, Jul 22, 2018 at 04:47:45PM -0600, Martin Sebor wrote:
> > No, I mean something like:
> >
> > $ cat y.c
> > const char a[2][3] = { "1234", "xyz" };
> > char b[6];
> >
> > int main ()
> > {
> >__builtin_memcpy(b, a, 4);
> >__builtin_memset(b + 4, 'a', 2);
> >__builtin_printf("%.
On Sun, Jul 22, 2018 at 04:43:17PM -0600, Martin Sebor wrote:
> > > > OK with the nit fixed. IF you need to update the doc changes as a
> > > > result of the -faligned-* changes, those are pre-approved.
> > >
> > >
> > > I had to adjust a few more tests and make a couple of minor
> > > tweaks as
FIRST_PSEUDO_REGISTER is not a hard regno, so comparisons should use
"<" instead of "<=", and ">=" instread of ">".
2018-07-19 Ilya Leoshkevich
* config/nds32/nds32.c (nds32_hard_regno_mode_ok):
Replace > with >=.
* df-problems.c (df_remove_dead_eq_notes):
Repla
On Fri, Jul 20, 2018 at 6:27 PM David Malcolm wrote:
>
> This patch adds a Python 3 module to "contrib" for reading the output of
> -fsave-optimization-record.
>
> It can be imported from other Python code, or run standalone as a script,
> in which case it prints the saved messages in a form resem
On Sat, Jul 21, 2018 at 3:28 AM Bin.Cheng wrote:
>
> On Tue, Jul 17, 2018 at 2:08 AM, Kelvin Nilsen wrote:
> > Thanks for looking at this for me. In simplifying the test case for a bug
> > report, I've narrowed the "problem" to integer overflow considerations. My
> > len variable is declared
So why is this only changing the double-precision implementation?
Surely, a problem like this will normally be common to both SP and DP
floating-point computations.
R.
On 23/07/18 08:46, Umesh Kalappa wrote:
> Thank you Wilco for the inputs and we agree that the fix break down
> for the case.
>
On Sun, Jul 22, 2018 at 9:31 PM Jakub Jelinek wrote:
>
> Hi!
>
> As part of the PR86590 discussions that the current libstdc++
> __constant_string is extremely costly, because we don't fold the
> __builtin_constant_p in the loop early enough and because Richard doesn't
> want __builtin_early_const
On Mon, Jul 23, 2018 at 12:17:42PM +0200, Richard Biener wrote:
> > Bootstrapped/regtested on x86_64-linux.
>
> Thanks for working on this. I wonder if we can completely hide this
> from the middle-end, without requiring defining of c_dialect_cxx.
> There is the BUILT_IN_FRONTEND class so you cou
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND instruction from being
generated due to the pattern failing to be matched.
Example:
typedef char v16qi __attribute__ ((vector_size (16)));
unsigned long l
On Mon, Jul 23, 2018 at 12:28 PM Jakub Jelinek wrote:
>
> On Mon, Jul 23, 2018 at 12:17:42PM +0200, Richard Biener wrote:
> > > Bootstrapped/regtested on x86_64-linux.
> >
> > Thanks for working on this. I wonder if we can completely hide this
> > from the middle-end, without requiring defining o
An rlimi instruction is often written like "(a << 8) | (b & 255)".
If "b" now is a byte in memory, combine will combine the load with the
masking (with 255 in the example), since that is a single instruction;
and then the rl*imi isn't combined from the remaining pieces.
This patch adds a splitter
This changes vsx_init_v4si to be an expander. That way, no special
cases are needed anymore for special arguments: the normal RTL passes
can deal with it.
Tested as usual; committing.
Segher
2018-07-23 Segher Boessenkool
* config/rs6000/rs6000-p8swap.c (rtx_is_swappable_p): Adjust
Hi Richard,
We tested on the SP and yes the problem persist on the SP too and
attached patch will fix the both SP and DP issues for the denormal
resultant.
We bootstrapped the compiler ,look ok to us with minimal testing ,
Any floating point test-suite to test for the attached patch ? any
recomm
Hi!
This fixes PR c/86617, where volatile values are folded
incorrectly, because LHS and RHS of PLUS_EXPR and
MINUS_EXPR are the same pointer.
Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
Is it OK for trunk (and active branches, 8.2 in particular)?
Thanks
Bernd.gcc:
2018-07-23 Bernd Ed
Hi,
On Sun, Jul 22 2018, Bernd Edlinger wrote:
> Hi,
>
> this fixes an use of a buffer after the block scope
> in hsa-dump.c: "buf" is assigned to "name" and used after
> the scope ends in a fprintf.
>
> I have not done any real checks, except boot-strapping with
> all languages.
> Is it OK for tr
+(define_insn "*aarch64_bfxil"
+ [(set (match_operand:GPI 0 "register_operand" "=r,r")
+(ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "r,0")
+ (match_operand:GPI 3 "const_int_operand" "n, Ulc"))
+ (and:GPI (match_operand:GPI 2 "register_operand" "0,r")
On Mon, Jul 23, 2018 at 12:09 PM, Umesh Kalappa
wrote:
> Hi Richard,
>
> We tested on the SP and yes the problem persist on the SP too and
> attached patch will fix the both SP and DP issues for the denormal
> resultant.
> We bootstrapped the compiler ,look ok to us with minimal testing ,
Have y
Umesh Kalappa wrote:
> We tested on the SP and yes the problem persist on the SP too and
> attached patch will fix the both SP and DP issues for the denormal
> resultant.
The patch now looks correct to me (but I can't approve).
> We bootstrapped the compiler ,look ok to us with minimal testing
On Mon, 23 Jul 2018, Bernd Edlinger wrote:
> Hi!
>
> This fixes PR c/86617, where volatile values are folded
> incorrectly, because LHS and RHS of PLUS_EXPR and
> MINUS_EXPR are the same pointer.
>
>
> Bootstrapped and reg-tested on x86_64-pc-linux-gnu.
> Is it OK for trunk (and active branches
On 07/23/2018 12:38 PM, Renlin Li wrote:
+(define_insn "*aarch64_bfxil"
+ [(set (match_operand:GPI 0 "register_operand" "=r,r")
+ (ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "r,0")
+ (match_operand:GPI 3 "const_int_operand" "n, Ulc"))
+ (and:GPI (match_opera
Hi Jeff,
On 06/29/2018 08:34 PM, Jeff Law wrote:
On 03/22/2018 05:56 AM, Renlin Li wrote:
Hi all,
As described in PR84877. https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84877
The local copy of parameter on stack is not aligned.
For BLKmode paramters, a local copy on the stack will be saved.
Th
On 20/07/18 12:06, Martin Liška wrote:
> On 07/20/2018 12:58 PM, Richard Earnshaw (lists) wrote:
>> Modifiers are context dependent. The architecture implies which
>> modifiers can be applied (and what they mean in detail, so, for example,
>> +fp means enable the default floating point variant for
Steve Ellcey wrote:
> OK, I think I understand this a bit better now. I think my main
> problem is with the term 'writeback' which I am not used to seeing.
> But if I understand things correctly we are saving one or two registers
> and (possibly) updating the stack pointer using auto-increment/a
Ping.
This patch needs reviewing an appropriate maintainer.
I'm aware that the documentation needs extending a bit to provide some
example use cases as discussed in the follow-up to the generic
discussion, but the rest of the patch still stands.
R.
On 09/07/18 17:38, Richard Earnshaw wrote:
>
[sorry, missed this mail somehow]
On 11/07/18 22:01, Jeff Law wrote:
> On 07/09/2018 10:38 AM, Richard Earnshaw wrote:
>> This patch is the main part of the speculation tracking code. It adds
>> a new target-specific pass that is run just before the final branch
>> reorg pass (so that it can clea
On 07/23/2018 03:47 PM, Richard Earnshaw (lists) wrote:
> On 20/07/18 12:06, Martin Liška wrote:
>> On 07/20/2018 12:58 PM, Richard Earnshaw (lists) wrote:
>>> Modifiers are context dependent. The architecture implies which
>>> modifiers can be applied (and what they mean in detail, so, for exampl
Marc Glisse writes:
> On Fri, 20 Jul 2018, Richard Sandiford wrote:
>
>> --- gcc/match.pd 2018-07-18 18:44:22.565914281 +0100
>> +++ gcc/match.pd 2018-07-20 11:24:33.692045585 +0100
>> @@ -4924,3 +4924,37 @@ DEFINE_INT_AND_FLOAT_ROUND_FN (RINT)
>>(if (inverse_conditions_p (@0, @2)
>>
Ping!
On Thu, 5 Jul 2018 at 08:51, Paul Richard Thomas
wrote:
>
> The comment in the patch says it all.
>
> Bootstrapped and regtested on FC28/x86_64 - OK for trunk?
>
> Paul
>
> 2018-07-05 Paul Thomas
>
> PR fortran/66679
> * trans-intrinsic.c (gfc_conv_intrinsic_transfer): Class array
Hi Sam
On Monday 23 July 2018 11:39 AM, Sam Tebbs wrote:
Hi all,
This patch extends the aarch64_get_lane_zero_extendsi instruction
definition to
also cover DI mode. This prevents a redundant AND instruction from being
generated due to the pattern failing to be matched.
Example:
typedef cha
Hi Vlad
On Friday 20 July 2018 10:37 AM, Vlad Lazar wrote:
Hi,
The patch adds implementations for the NEON intrinsics vabsd_s64 and
vnegd_s64.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ihi0073/latest/arm-neon-intrinsics-reference-architecture-specificati
Hi All,
About 13 years ago the reg-to-reg patterns were split up, before that time
output_move_double could actually handle this case.
After the split was done most patterns were updated except for *neon_mov
which incorrectly retained reg,reg as a valid alternative.
However output_move_double ca
Hi All,
My previous patch changed arm_can_change_mode_class to allow subregs of
64bit registers on arm big-endian. However it seems that we can't do this
because a the data in 64 bit VFP registers are stored in little-endian order,
even on big-endian.
Allowing this change had a knock on effect t
On 07/23/2018 02:18 AM, Jakub Jelinek wrote:
On Sun, Jul 22, 2018 at 04:43:17PM -0600, Martin Sebor wrote:
OK with the nit fixed. IF you need to update the doc changes as a
result of the -faligned-* changes, those are pre-approved.
I had to adjust a few more tests and make a couple of minor
Hi All,
This allows copy_blkmode_to_reg to perform larger copies when it is safe to do
so by calculating
the bitsize per iteration doing the maximum copy allowed that does not read more
than the amount of bits left to copy.
Strictly speaking, this copying is only done if:
1. the target suppor
On 07/23/2018 02:05 AM, Jakub Jelinek wrote:
On Sun, Jul 22, 2018 at 04:47:45PM -0600, Martin Sebor wrote:
No, I mean something like:
$ cat y.c
const char a[2][3] = { "1234", "xyz" };
char b[6];
int main ()
{
__builtin_memcpy(b, a, 4);
__builtin_memset(b + 4, 'a', 2);
__builtin_printf
On July 23, 2018 7:01:23 PM GMT+02:00, Tamar Christina
wrote:
>Hi All,
>
>This allows copy_blkmode_to_reg to perform larger copies when it is
>safe to do so by calculating
>the bitsize per iteration doing the maximum copy allowed that does not
>read more
>than the amount of bits left to copy.
>
>
On July 23, 2018 7:46:08 PM GMT+02:00, Martin Sebor wrote:
>On 07/23/2018 02:05 AM, Jakub Jelinek wrote:
>> On Sun, Jul 22, 2018 at 04:47:45PM -0600, Martin Sebor wrote:
No, I mean something like:
$ cat y.c
const char a[2][3] = { "1234", "xyz" };
char b[6];
int m
On Mon, 2018-07-23 at 11:46 +0200, Richard Biener wrote:
> On Fri, Jul 20, 2018 at 6:27 PM David Malcolm
> wrote:
> >
> > This patch adds a Python 3 module to "contrib" for reading the
> > output of
> > -fsave-optimization-record.
> >
> > It can be imported from other Python code, or run standal
pmr::resource_adaptor can avoid allocating an oversized buffer and doing
manual alignment within that buffer when the wrapped allocator is known
to always meet the requested alignment. Specifically, if the allocator
is known to use malloc or new directly, then we can call the allocator
directly fo
Here is an updated version of my patch for the Aarch64 SIMD ABI. I
think the writeback register saves are correct now and I improved the
register allocation by defining REG_ALLOC_ORDER. I also added clobbers
to expand_call when calling a non-SIMD function from a SIMD function.
I am still testing
Hi Paul,
2018-07-23 17:51 GMT+02:00 Paul Richard Thomas :
> Ping!
> On Thu, 5 Jul 2018 at 08:51, Paul Richard Thomas
> wrote:
>>
>> The comment in the patch says it all.
>>
>> Bootstrapped and regtested on FC28/x86_64 - OK for trunk?
I don't see anything wrong with the patch, so as far as I'm co
On Tue, Jul 03, 2018 at 04:27:33PM -0400, Jason Merrill wrote:
> On Tue, Jul 3, 2018 at 3:41 PM, Jason Merrill wrote:
> > On Tue, Jul 3, 2018 at 2:58 PM, Marek Polacek wrote:
> >> On Tue, Jul 03, 2018 at 12:40:51PM -0400, Jason Merrill wrote:
> >>> On Fri, Jun 29, 2018 at 3:58 PM, Marek Polacek
AIX unistd.h defines a static function without a parameter, which
justifiably upsets C++ code when the header is included and
referenced. This patch to fixincludes adjusts the header to declare
the parameter as void.
Bootstrapped on powerpc-ibm-aix7.2.0.0 and powerpc64le-linux
Thanks, David
* in
On Mon, Jun 18, 2018 at 12:26 PM, Joseph Myers wrote:
> On Mon, 18 Jun 2018, Jason Merrill wrote:
>
>> On Mon, Jun 18, 2018 at 11:59 AM, Joseph Myers
>> wrote:
>> > On Mon, 18 Jun 2018, Jason Merrill wrote:
>> >
>> >> > + if (TREE_CODE (rhs) == COND_EXPR)
>> >> > +{
>> >> > + /* Check
Looks good to me.
On Mon, Jul 23, 2018 at 1:50 PM David Edelsohn wrote:
>
> AIX unistd.h defines a static function without a parameter, which
> justifiably upsets C++ code when the header is included and
> referenced. This patch to fixincludes adjusts the header to declare
> the parameter as void.
On 07/20/2018 09:39 AM, Tamar Christina wrote:
>>
>> On 07/20/2018 05:03 AM, Tamar Christina wrote:
Understood. Thanks for verifying. I wonder if we could just bury
this entirely in the aarch64 config files and not expose the default into
>> params.def?
>>>
>>> Burying it in config
On 07/19/2018 08:12 PM, Dimitar Dimitrov wrote:
> On събота, 23 юни 2018 г. 20:35:23 EEST Jakub Jelinek wrote:
>> On Sat, Jun 23, 2018 at 03:26:50PM +0300, Dimitar Dimitrov wrote:
>>> I took arm/ldmstm.md as an inspiration. See attached machine description
>>> for PRU that requires the increase. I
There are various ways that it's possible for a gimple statement to
have an UNKNOWN_LOCATION, and for that UNKNOWN_LOCATION to be wrapped
in an ad-hoc location to capture inlining information.
For such a location, LOCATION_FILE (loc) is NULL.
Various places in -fsave-optimization-record were chec
(David, I'm hoping your your help here. Please see the end.)
While looking into a recent -Warray-bounds instance in Glibc
involving inlining of large functions it became apparent that
GCC could do a better job of pinpointing the source of
the problem.
The attached patch makes a few adjustments
On Mon, 2018-07-23 at 17:49 -0600, Martin Sebor wrote:
> (David, I'm hoping your your help here. Please see the end.)
>
> While looking into a recent -Warray-bounds instance in Glibc
> involving inlining of large functions it became apparent that
> GCC could do a better job of pinpointing the sou
On 07/23/2018 07:20 PM, David Malcolm wrote:
On Mon, 2018-07-23 at 17:49 -0600, Martin Sebor wrote:
(David, I'm hoping your your help here. Please see the end.)
While looking into a recent -Warray-bounds instance in Glibc
involving inlining of large functions it became apparent that
GCC could
This patch series is a new port for C-SKY ABI V2 processors. It's
based on the original work by C-SKY with cleanup, modernization, and
bug-fixing by Mentor Graphics. The supported targets are csky-elf and
csky-linux-* (both glibc and uClibc). At this time we're only
supporting the C and C++ lan
2018-07-23 Jojo
Huibin Wang
Sandra Loosemore
Chung-Lin Tang
Andrew Jenner
C-SKY port: Configury
gcc/
* config.gcc (csky-*-*): New.
* configure.ac: Add csky to targets for dwarf2 debug_line support.
2018-07-23 Jojo
Huibin Wang
Sandra Loosemore
Chung-Lin Tang
C-SKY port: Backend implementation
gcc/
* config/csky/*: New.
* common/config/csky/*: New.
csky-gcc-2.patch.gz
Description: application/gzip
2018-07-23 Sandra Loosemore
C-SKY port: Documentation
gcc/
* doc/extend.texi (C-SKY Function Attributes): New section.
* doc/invoke.texi (Option Summary): Add C-SKY options.
(C-SKY Options): New section.
* doc/md.texi (Machine Constraints): Docu
2018-07-23 Sandra Loosemore
Chung-Lin Tang
C-SKY port: Testsuite
gcc/testsuite/
* g++.dg/Wno-frame-address.C: Adjust for C-SKY.
* g++.dg/torture/type-generic-1.C: Likewise.
* gcc.c-torture/compile/2804-1.c: Likewise.
* gcc.c-to
2018-07-23 Jojo
Huibin Wang
Sandra Loosemore
Chung-Lin Tang
C-SKY port: libgcc
libgcc/
* config.host: Add C-SKY support.
* config/csky/*: New.
diff --git a/libgcc/config.host b/libgcc/config.host
index 18cabaf..b2ee0c9
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