On Tue, 17 Apr 2018, Jakub Jelinek wrote:
> Hi!
>
> In the http://gcc.gnu.org/ml/gcc/2017-02/msg00041.html
> thread it has been proposed that powerpc*-*-*spe* would be obsoleted in
> GCC 7, which didn't happen and the rs6000 backend has been split into two,
> one actively maintained where the SPE
On 17/04/18 21:47, Jakub Jelinek wrote:
On Tue, Apr 17, 2018 at 04:36:54PM +0100, Kyrill Tkachov wrote:
This patch makes the arm and aarch64 testsuite safe for when a C++ compiler is
not present.
This involves moving .C files into g++.dg/other/ and guarding them with the
appropriate target ch
On Sun, Apr 15, 2018 at 12:59 PM, H.J. Lu wrote:
> These tests must be compiled with -fcf-protection=none -mno-cet.
Required for correctness or just to make the dump scannings happy?
In that case I'd prefer the more descriptive dg-skip-if
> OK for trunk?
>
> H.J.
>
> * c-c++-common/
On Mon, Apr 16, 2018 at 6:16 PM, Andreas Krebbel
wrote:
> I did run into an ICE with a single element vector triggered by
> dividing the number of elements by 2 with exact_div here:
>
> tree-vect-data-refs.c:5132
>
> else
> {
> /* If length is not equal to 3 then only power
> -Original Message-
> From: Lu, Hongjiu
> Sent: Sunday, April 15, 2018 12:59 PM
> To: gcc-patches@gcc.gnu.org; Uros Bizjak ; Tsimbalist,
> Igor V
> Subject: [PATCH] x86: Compile with -fcf-protection=none -mno-cet
>
> These tests must be compiled with -fcf-protection=none -mno-cet.
Why -
[ was: Re: [gomp4] enable GOMP_MAP_FIRSTPRIVATE_INT in OpenACC ]
On 01/27/2017 04:45 PM, Cesar Philippidis wrote:
diff --git a/libgomp/testsuite/libgomp.oacc-c++/firstprivate-int.C
b/libgomp/testsuite/libgomp.oacc-c++/firstprivate-int.C
+ assert(i8o = i8i);
+ assert(i16o = i16i);
+ asser
[ was: Re: [gomp4] fix c++ reference mappings in openacc ]
On 01/21/2016 04:47 AM, Cesar Philippidis wrote:
diff --git a/libgomp/testsuite/libgomp.oacc-c++/non-scalar-data.C
b/libgomp/testsuite/libgomp.oacc-c++/non-scalar-data.C
new file mode 100644
index 000..180e86f
--- /dev/null
+++ b/l
On Wed, 18 Apr 2018, Jakub Jelinek wrote:
> Hi!
>
> The following patch mentions the deprecation of powerpc*spe*.
> Ok for wwwdocs?
OK.
> Index: changes.html
> ===
> RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
> retrievi
Hi all:
Palmer has been added -mno-relax option before, I propose it should
also pass to linker during link phase.
ChangeLog:
2018-04-18 Kito Cheng
* config/riscv/elf.h (LINK_SPEC): Pass --no-relax if
-mno-relax is present.
* config/riscv/linux.h (LINK_SPEC): Ditto.
From 1f18c
On 04/17/2018 11:10 PM, Joshua Watt wrote:
> On Tue, 2018-04-17 at 22:50 +0100, Pedro Alves wrote:
>> On 04/17/2018 06:24 PM, Joshua Watt wrote:
>>> Ping? I'd really like to get this in binutils, which apparently
>>> requires getting it here first.
>>
>> I think it would help if you mentioned what
Hi!
The following patch mentions the deprecation of powerpc*spe*.
Ok for wwwdocs?
Index: changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
retrieving revision 1.66
diff -u -p -r1.66 changes.html
--- changes.html
Tested x86_64-linux, committed to trunk.
commit f02b9c3a2b9ffe78613ba57e61a4f48413144218
Author: Jonathan Wakely
Date: Wed Apr 18 12:15:16 2018 +0100
PR libstdc++/84442 if _Exit isn't declared then use _exit instead
PR libstdc++/84442
* testsuite/30_threads/thre
On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
> On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
>> On Tue, Apr 17, 2018 at 12:03 PM, H.J. Lu wrote:
>>> On Tue, Apr 17, 2018 at 11:55 AM, Uros Bizjak wrote:
On Tue, Apr 17, 2018 at 8:42 PM, H.J. Lu wrote:
> -fcf-protection -mcet can'
On Wed, Apr 18, 2018 at 1:59 AM, Tsimbalist, Igor V
wrote:
>> -Original Message-
>> From: Lu, Hongjiu
>> Sent: Sunday, April 15, 2018 12:59 PM
>> To: gcc-patches@gcc.gnu.org; Uros Bizjak ; Tsimbalist,
>> Igor V
>> Subject: [PATCH] x86: Compile with -fcf-protection=none -mno-cet
>>
>> Thes
Hi Kyrill,
On 11/04/18 10:02, Kyrill Tkachov wrote:
Hi Thomas,
On 09/04/18 15:29, Thomas Preudhomme wrote:
Hi Ramana,
On 06/04/18 17:17, Thomas Preudhomme wrote:
>
>
> On 06/04/18 17:08, Ramana Radhakrishnan wrote:
>> On 06/04/2018 16:54, Thomas Preudhomme wrote:
>>> Instruction pattern for s
Hi,
this patch fixes misplaced conditional on TYPE_CANONICAL that makes
odr_type_hash incomplete
and thus we may miss some ODR warnings and/or diverge in devirtualization
decisions.
Bootstrapped/regtested x86_64-linux, also tested on libreoffice and firefox.
Honza
PR lto/85391
Hi Thomas,
On 18/04/18 12:31, Thomas Preudhomme wrote:
Hi Kyrill,
On 11/04/18 10:02, Kyrill Tkachov wrote:
Hi Thomas,
On 09/04/18 15:29, Thomas Preudhomme wrote:
Hi Ramana,
On 06/04/18 17:17, Thomas Preudhomme wrote:
>
>
> On 06/04/18 17:08, Ramana Radhakrishnan wrote:
>> On 06/04/2018 16:5
On Wed, Apr 18, 2018 at 1:24 PM, H.J. Lu wrote:
> On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
>> On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
>>> On Tue, Apr 17, 2018 at 12:03 PM, H.J. Lu wrote:
On Tue, Apr 17, 2018 at 11:55 AM, Uros Bizjak wrote:
> On Tue, Apr 17, 2018 at 8:
On Wed, Apr 18, 2018 at 4:35 AM, Richard Biener
wrote:
> On Wed, Apr 18, 2018 at 1:24 PM, H.J. Lu wrote:
>> On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
>>> On Tue, Apr 17, 2018 at 12:25 PM, H.J. Lu wrote:
On Tue, Apr 17, 2018 at 12:03 PM, H.J. Lu wrote:
> On Tue, Apr 17, 2018 at
On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
>>> Here is a patch to add -mnop and use it with -fcf-protection.
>>
>> +mnop
>> +Target Report Var(flag_nop) Init(0)
>> +Support multi-byte NOP code generation.
>>
>> the option name is incredibly bad and the documentation doesn't make it
>> better
On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
> On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
>
Here is a patch to add -mnop and use it with -fcf-protection.
>>>
>>> +mnop
>>> +Target Report Var(flag_nop) Init(0)
>>> +Support multi-byte NOP code generation.
>>>
>>> the option name is
Hi all:
I've hit a bug when running gcc testsuite with gc trunk on our
internal simulator, C extension may generate non-aligned
stack in some program point.
Verified with gcc testsuite on rv32imac/rv32ima elf.
Fail case:
riscv32-elf-gcc -march=rv32imac gcc/testsuite/gcc.dg/graph
ite/interchange-
On Wed, Apr 18, 2018 at 1:57 PM, H.J. Lu wrote:
> On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
>> On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
>>
> Here is a patch to add -mnop and use it with -fcf-protection.
+mnop
+Target Report Var(flag_nop) Init(0)
+Support
On Wed, Apr 18, 2018 at 02:04:50PM +0200, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 04:57:41AM -0700, H.J. Lu wrote:
> > On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
> > > On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
> > >
> > Here is a patch to add -mnop and use it with -fcf-
On Wed, Apr 18, 2018 at 5:08 AM, Uros Bizjak wrote:
> On Wed, Apr 18, 2018 at 1:57 PM, H.J. Lu wrote:
>> On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
>>> On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
>>>
>> Here is a patch to add -mnop and use it with -fcf-protection.
>
> +
The fix for PR 85222 ends up generating duplicate debuginfo sections,
because we compile the .cc file and then compile the .s file. This
adds -g0 to the second step so we don't generate debuginfo again.
I've verified that we still have debuginfo for the file and can step
through the code when usin
I would like to mention the attribute in GCC 8 changes.
Martin
Index: htdocs/gcc-8/changes.html
===
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-8/changes.html,v
retrieving revision 1.67
diff -r1.67 changes.html
255a256,266
>
> New no
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of H.J. Lu
> Sent: Wednesday, April 18, 2018 1:39 PM
> To: Richard Biener
> Cc: Uros Bizjak ; gcc-patches@gcc.gnu.org; Tsimbalist,
> Igor V
> Subject: Re: [PATCH] x86: Allow -fcf
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jakub Jelinek
> Sent: Wednesday, April 18, 2018 2:10 PM
> To: H.J. Lu
> Cc: Uros Bizjak ; Richard Biener
> ; gcc-patches@gcc.gnu.org; Tsimbalist, Igor
> V
> Subject: Re: [PATC
On Wed, Apr 18, 2018 at 2:09 PM, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 02:04:50PM +0200, Jakub Jelinek wrote:
>> On Wed, Apr 18, 2018 at 04:57:41AM -0700, H.J. Lu wrote:
>> > On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
>> > > On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
>> >
Hello Michael,
I have attached the patch as well,
(the same as in :
https://github.com/andrewsadek/microblaze-pic-data-text-rel/blob/pic_data_text_rel/PATCH_BUNDLE/gcc.patch)
On Thu, Mar 22, 2018 at 8:37 PM, Andrew Sadek wrote:
> Hello Michael,
>
> I have adapted the test cases.
>
> Please find
Hi,
This patch enables new instructions - MOVDIRI and MOVDIR64B.
Is it ok for trunk?
2018-04-18 Sebastian Peryt
gcc/
* common/config/i386/i386-common.c
(OPTION_MASK_ISA_MOVDIRI_SET, OPTION_MASK_ISA_MOVDIR64B_SET,
OPTION_MASK_ISA_MOVDIRI_UNSET,
OPTION_MASK_I
On Thu, Apr 12, 2018 at 12:43 PM, H.J. Lu wrote:
> On Wed, Apr 11, 2018 at 3:37 AM, H.J. Lu wrote:
>> When -fcf-protection -mcet is used, I got
>>
>> FAIL: g++.dg/eh/sighandle.C
>>
>> (gdb) bt
>> #0 _Unwind_RaiseException (exc=exc@entry=0x416ed0)
>> at /export/gnu/import/git/sources/gcc/lib
On Thu, Apr 12, 2018 at 6:21 AM, H.J. Lu wrote:
> Program received signal SIGSEGV, Segmentation fault.
> __stack_split_initialize ()
> at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751
> 751 leaq-16000(%rsp),%rax # We should have at least 16K.
> Mis
On Fri, Apr 13, 2018 at 5:56 AM, H.J. Lu wrote:
> Since __morestack will jump back to its callee via indirect call, we
> need to insert ENDBR after calling __morestack.
>
> OK for trunk?
>
> H.J.
>
> gcc/
>
> PR target/85388
> * config/i386/i386.c (ix86_expand_split_stack_prol
On Mon, Apr 16, 2018 at 3:08 PM, Alexandre Oliva wrote:
> On Apr 3, 2018, "H.J. Lu" wrote:
>
>> On Mon, Mar 26, 2018 at 4:10 AM, H.J. Lu wrote:
>>> On Wed, Mar 14, 2018 at 4:41 AM, H.J. Lu wrote:
On Wed, Feb 21, 2018 at 3:02 AM, H.J. Lu wrote:
> On Wed, Oct 18, 2017 at 5:25 PM, H.J.
On Wed, Apr 18, 2018 at 05:07:33AM +, Jason Merrill wrote:
> I wonder if it would work to use CONVERT_EXPR for reinterpret_cast.
I have tried following (still need Alex' expr.c changes, otherwise it ICEs),
on the bright side it fixes the new pr85437-4.C testcase,
but it causes Excess errors:
/
On Wed, Apr 18, 2018 at 04:57:41AM -0700, H.J. Lu wrote:
> On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
> > On Wed, Apr 18, 2018 at 1:39 PM, H.J. Lu wrote:
> >
> Here is a patch to add -mnop and use it with -fcf-protection.
> >>>
> >>> +mnop
> >>> +Target Report Var(flag_nop) Init(0)
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of H.J. Lu
> Sent: Wednesday, April 18, 2018 3:25 PM
> To: GCC Patches ; Tsimbalist, Igor V
>
> Cc: Uros Bizjak
> Subject: PING: [PATCH] i386: Insert ENDBR after __morestack call
On Wed, Apr 18, 2018 at 02:59:34PM +0200, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 05:07:33AM +, Jason Merrill wrote:
> > I wonder if it would work to use CONVERT_EXPR for reinterpret_cast.
As for reinterpret_cast, we e.g. accept
constexpr int a = reinterpret_cast (1);
which clang++ reje
Maciej Rozycki writes:
> Given that the SVR4 vs PLT code model consideration is irrelevant for
> this test case rather than rewriting the regular expression to match
> this variant of code just enforce the PLT model by using the `-mplt'
> option. It is safe to use this option unconditionally as i
Maciej Rozycki writes:
> (we have no support for hard-float n64 MIPS16 code generation), which
> means that the test case will fail, as the regular expression pattern
> expects `lw' and `.word' rather than `ld' and `.dword' respectively to
> appear in assembly code generation. Correct the pattern
On 04/17/2018 02:57 PM, Jakub Jelinek wrote:
> Hi!
>
> As mentioned, for BLKmode stores with MEM_SIZE of 0 we invoke UB,
> lowpart_bitmask (0) is called and that shifts an UHWI by 64.
> Zero size MEMs should only appear in inline asm and shouldn't be interesting
> to DSE at all, they can't make ot
On 04/18/2018 01:51 AM, Richard Biener wrote:
> On Tue, 17 Apr 2018, Jakub Jelinek wrote:
>
>> Hi!
>>
>> In the http://gcc.gnu.org/ml/gcc/2017-02/msg00041.html
>> thread it has been proposed that powerpc*-*-*spe* would be obsoleted in
>> GCC 7, which didn't happen and the rs6000 backend has been s
On Wed, Apr 18, 2018 at 7:00 AM, Tsimbalist, Igor V
wrote:
>> -Original Message-
>> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
>> ow...@gcc.gnu.org] On Behalf Of H.J. Lu
>> Sent: Wednesday, April 18, 2018 3:25 PM
>> To: GCC Patches ; Tsimbalist, Igor V
>>
>> Cc: Uros Bizjak
ping x1
Trunk doesn't build for msp430 due to an ICE whilst building libstdc++.
The following patch proposed a while ago fixes the issue, but hasn't been
applied: https://gcc.gnu.org/ml/gcc-patches/2017-08/msg01433.html
I don't have write access, so if the patch is acceptable I would
appreciat
On 04/18/2018 05:44 AM, Andrew Sadek wrote:
Hello Michael,
I have attached the patch as well,
(the same as in :
https://github.com/andrewsadek/microblaze-pic-data-text-rel/blob/pic_data_text_rel/PATCH_BUNDLE/gcc.patch)
On Thu, Mar 22, 2018 at 8:37 PM, Andrew Sadek wrote:
Hello Michael,
I h
On 04/17/2018 02:54 PM, Jakub Jelinek wrote:
> Hi!
>
> The first hunk is I think rather obvious, -2147483648 should be printed
> as -2147483648 and doesn't need to introduce UB in the compiler while doing
> so. The changes to stabstr_D are analogous, but in addition to that I don't
> see why we s
GCC Maintainers:
I have addressed Segher's concerns regarding the range checking of the
argument. The following is the updated patch.
The regression testing for the patch was done on GCC mainline on
powerpc64le-unknown-linux-gnu (Power 8 LE)
with no regressions. Additional hand testing
* Claudiu Zissulescu [2018-04-06 11:00:10
+0200]:
> From: claziss
>
> gcc/
> 2017-05-09 Claudiu Zissulescu
>
> * config/arc/arc-protos.h (check_if_valid_sleep_operand): Remove.
> * config/arc/arc.c (arc_expand_builtin): Sleep accepts registers
> and short u6 immediate.
>
The testsuite parts are OK with me, but the tree.c change needs
separate approval...
* Claudiu Zissulescu [2018-04-06 11:00:11
+0200]:
> From: claziss
>
> Claudiu Zissulescu
>
> * config/arc/arc.md ("vunspec"): Delete it, unify all the unspec
> enums into a single definition.
> (fls): Fix predicates and printing.
> (seti): Likewise.
Looks good,
Tha
Hello!
Attached patch conditionally emits inter-unit moves using
preferred_for_speed_infrastructure. Current approach, where registers
are enabled only for TARGET_INTER_UNIT_MOVES_{FROM,TO}_VEC is not
optimal, since for non-performance critical parts of the binary, we
can still emit inter-unit mov
On Wed, Apr 18, 2018 at 2:56 PM, Peryt, Sebastian
wrote:
> Hi,
>
> This patch enables new instructions - MOVDIRI and MOVDIR64B.
>
> Is it ok for trunk?
Is there a reason that one flag goes to ix86_isa_flags and the other
to ix86_isa_flags2?
Uros.
> 2018-04-18 Sebastian Peryt
>
> gcc/
>
>
On Wed, Apr 18, 2018 at 8:55 AM, H.J. Lu wrote:
> On Wed, Apr 18, 2018 at 7:00 AM, Tsimbalist, Igor V
> wrote:
>>> -Original Message-
>>> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
>>> ow...@gcc.gnu.org] On Behalf Of H.J. Lu
>>> Sent: Wednesday, April 18, 2018 3:25 PM
>>> To
On Wed, Apr 18, 2018 at 5:32 AM, Uros Bizjak wrote:
> On Wed, Apr 18, 2018 at 2:09 PM, Jakub Jelinek wrote:
>> On Wed, Apr 18, 2018 at 02:04:50PM +0200, Jakub Jelinek wrote:
>>> On Wed, Apr 18, 2018 at 04:57:41AM -0700, H.J. Lu wrote:
>>> > On Wed, Apr 18, 2018 at 4:55 AM, Uros Bizjak wrote:
>>>
On Wed, Apr 18, 2018 at 03:14:19PM +0200, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 02:59:34PM +0200, Jakub Jelinek wrote:
> > On Wed, Apr 18, 2018 at 05:07:33AM +, Jason Merrill wrote:
> > > I wonder if it would work to use CONVERT_EXPR for reinterpret_cast.
>
> As for reinterpret_cast,
Hi.
This is small series that fixes 2 Wodr warnings issue that we have in bugzilla.
It should make in stable across targets, I've tested x86_64, ppc64le and
aarch64.
Patch can bootstrap on x86_64-linux-gnu and ppc64le-linux-gnu. It's pre-approved
by Honza who worked on that with me. I'm going t
Hi,
On 17 April 2018 at 10:19, Jan Hubicka wrote:
>> On 04/17/2018 08:58 AM, Jakub Jelinek wrote:
>> > On Tue, Apr 17, 2018 at 07:39:20AM +0200, Martin Liška wrote:
>> >> + if (DECL_BIT_FIELD (f1) != DECL_BIT_FIELD (f2))
>> >> +{
>> >> + warn_odr (t1, t2, f1, f2
Hello everyone!
First, let me ask for your patience -- this is the first patch I am
submitting to gcc. I tried very hard to follow the proper procedure,
but I am sure that I've missed something.
According to https://gcc.gnu.org/onlinedocs/gcc/Asm-Labels.html#Asm-Labels
asm labels have no effect o
2018-04-18 Paul A. Clarke
* MAINTAINERS (write after approval): Add myself.
Index: MAINTAINERS
===
--- MAINTAINERS (revision 259480)
+++ MAINTAINERS (working copy)
@@ -347,6 +347,7 @@ Bin Cheng
Hi!
As mentioned in the PR, this optimization can't work if @0's precision
is higher than @1's precision, because originally it compares just some set
of lower bits, but in the new comparison compares all bits.
If @0's precision is smaller than @1's precision (in this case @0 can't be
a pointer, a
On Wed, Apr 18, 2018 at 12:24:15PM -0700, H.J. Lu wrote:
> >> So untested patch would be something like:
> >
> > Yes, this is what I think should be the most appropriate approach.
Here is the patch with slightly tweaked install.texi and the all the
regenerated bits too.
Bootstrapped/regtested on
On Wed, Apr 18, 2018 at 3:31 PM, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 12:24:15PM -0700, H.J. Lu wrote:
>> >> So untested patch would be something like:
>> >
>> > Yes, this is what I think should be the most appropriate approach.
>
> Here is the patch with slightly tweaked install.texi an
On Thu, 19 Apr 2018, Jakub Jelinek wrote:
As mentioned in the PR, this optimization can't work if @0's precision
is higher than @1's precision, because originally it compares just some set
of lower bits, but in the new comparison compares all bits.
If @0's precision is smaller than @1's precisio
On Wed, Apr 18, 2018 at 4:59 AM, Kito Cheng wrote:
+ HOST_WIDE_INT min_first_step =
+RISCV_STACK_ALIGN (frame->total_size - frame->fp_sp_offset);
+ HOST_WIDE_INT max_first_step =
+ROUND_DOWN (IMM_REACH / 2 - PREFERRED_STACK_BOUNDARY / 8,
+ PREFERRED_STACK_BOUNDARY / 8);
+
On Wed, Apr 18, 2018 at 3:10 AM, Kito Cheng wrote:
> * config/riscv/elf.h (LINK_SPEC): Pass --no-relax if
> -mno-relax is present.
> * config/riscv/linux.h (LINK_SPEC): Ditto.
It is easy enough to use -Wl,--no-relax and there are other linker
options that require -Wl so I don't th
Hi Jim:
Turned off both the assembler and the linker sounds good idea to me,
but it's not support on current assembler now, and gcc might release in
next few month, so I afraid we'll have a short time gap that is
-mno-relax is broken due to assembler not support that command
line option in the lat
This patch adds __powikf2 to libgcc, and makes GCC use it for __builtin_powil
when long double is IEEE 128-bit (-mabi=ieeelongdouble).
I tested it on a little endian power8 system with a bootstrap compiler. There
were no regresion failures. Can I check this into GCC 8? This does not need
to be
[adding list back]
On Apr 18, 2018, Jakub Jelinek wrote:
> On Wed, Apr 18, 2018 at 12:29:03AM -0300, Alexandre Oliva wrote:
>> + static void free(tinst_level *obj);
> ^
>+ missing space
Thanks, fixed with this patch:
diff --git a/gcc/cp/ChangeLog b/gcc
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