On 10/30/2017 06:02 AM, Richard Biener wrote:
On Sun, Oct 29, 2017 at 5:15 PM, Martin Sebor wrote:
Ping -- please see my reply below.
On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_offset will return NULL if there's any
variable
component in 'ref'. So as written i
On 11/06/2017 11:41 AM, Jeff Law wrote:
On 10/29/2017 10:15 AM, Martin Sebor wrote:
Ping -- please see my reply below.
On 10/20/2017 09:57 AM, Richard Biener wrote:
get_addr_base_and_unit_offset will return NULL if there's any
variable
component in 'ref'. So as written it seems to be dead c
On 11/06/2017 09:50 AM, Tamar Christina wrote:
Hi All,
This patch adds support for the setting the architecture and extensions
using the target GCC pragma.
#pragma GCC target ("arch=armv8-a+crc")
It also supports a short hand where an extension is just added to the
current architecture without
We want to actually use isel, so we shouldn't disable it. It is
already not set by default on CPUs that don't have it, or where we
do not want to use it.
Tested on powerpc64-linux {-m32,-m64}; committing to trunk.
Segher
2017-11-06 Segher Boessenkool
* config/rs6000/rs6000.c (rs60
Hi,
Attached patch implements the vld1_*_x2 intrinsics as defined by the
neon document.
Bootstrap for the latest patch is ongoing on aarch64-linux-gnu. Is
this OK for trunk if no regressions?
Thanks,
Kugan
gcc/ChangeLog:
2017-11-06 Kugan Vivekanandarajah
* config/aarch64/aarch64-simd.
I've been looking at fixing readelf and other parts of binutils that
output incorrectly pluralized messages. For example, readelf will
display information about a section that "contains 1 entries" or
"There are 1 section headers". Fixing this properly requires us to
use ngettext, and I see that g
Hi,
The attached patch implements an RTL pass which splits generated FMA
instruction into MUL/ADD sequence.
The pass is enabled for Zen and done when we find it is profitable to split the
FMA.
On Zen, we found that for a tight loop with FMA (reduction) operation as show
below, generating
On 2017.11.07 at 00:12 +0100, Jan Hubicka wrote:
> > On 2017.11.05 at 11:55 +0100, Jan Hubicka wrote:
> > > > On 2017.11.03 at 16:48 +0100, Jan Hubicka wrote:
> > > > > this is updated patch which I have comitted after
> > > > > profiledbootstrapping x86-64
> > > >
> > > > Unfortunately, compiling
On Mon, Nov 06, 2017 at 06:39:20PM -0800, Palmer Dabbelt wrote:
> Jim has recently started working at SiFive, where he'll be contributing
> to our GCC port. Andrew, Kito and I would like him to be a mainatiner.
> My understand is that this is the right place to ask.
It is the steering committee t
On Tue, 7 Nov 2017, Kumar, Venkataramanan wrote:
The attached patch implements an RTL pass which splits generated FMA
instruction into MUL/ADD sequence.
That seems wrong if the user explicitly asked for FMA in his program,
unless you have a way to recognize which FMA instructions come from u
On Mon, Nov 06, 2017 at 11:27:27PM +0100, Uros Bizjak wrote:
> On Mon, Nov 6, 2017 at 10:18 PM, Jakub Jelinek wrote:
> > Hi!
> >
> > As this patch shows, we have tons of ix86_binary_operator_ok calls
> > in sse.md patterns, but I believe those are inappropriate in all these
> > spots, the function
Hi Maarc,
> -Original Message-
> From: Marc Glisse [mailto:marc.gli...@inria.fr]
> Sent: Tuesday, November 7, 2017 12:52 PM
> To: Kumar, Venkataramanan
> Cc: gcc-patches@gcc.gnu.org; Dharmakan, Rohit arul raj
> ; Jan Hubicka (hubi...@ucw.cz)
> ; Uros Bizjak
> Subject: Re: [RFC] [Patch X8
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