istreambuf_iterator should not forget about attached
streambuf when it reach EOF.
Checks in debug mode has no infuence more on character
extraction in istreambuf_iterator increment operators.
In this aspect behaviour in debug and non-debug mode
is similar now.
Test for detached srteambuf in istre
This patch adds helper functions for generating constant and
non-constant vector duplicates. These routines help with SVE because
it is then easier to use:
(const:M (vec_duplicate:M X))
for a broadcast of X, even if the number of elements in M isn't known
at compile time. It also makes it ea
This patch adds a vec_duplicate_p helper that tests for constant
or non-constant vector duplicates. Together with the existing
const_vec_duplicate_p, this complements the gen_vec_duplicate
and gen_const_vec_duplicate added by a previous patch.
The patch uses the new routines to add more rtx simpl
On 09/22/2017 05:33 AM, Jakub Jelinek wrote:
> On Fri, Sep 22, 2017 at 05:28:00AM -0500, Daniel Santos wrote:
>> +/* If the assembler doesn't support AVX then directly emit machine code
>> + for the instructions above directly. */
> Just a nit: too many "directly" words.
>
> Jakub
Well I
On 09/22/2017 06:50 AM, Uros Bizjak wrote:
> On Fri, Sep 22, 2017 at 1:27 PM, Uros Bizjak wrote:
>> On Fri, Sep 22, 2017 at 12:28 PM, Daniel Santos
>> wrote:
>>> On 09/22/2017 03:28 AM, Rainer Orth wrote:
Hi Daniel,
> On 09/22/2017 02:18 AM, Rainer Orth wrote:
>> Hi Daniel,
>>>
This patch allows (const ...) wrappers to be used for rtx vector
constants, as an alternative to const_vector. This is useful
for SVE, where the number of elements isn't known until runtime.
It could also be useful in future for fixed-length vectors, to
reduce the amount of memory needed to repres
On Sat, Sep 23, 2017 at 11:03 AM, Daniel Santos wrote:
> On 09/22/2017 06:50 AM, Uros Bizjak wrote:
>> On Fri, Sep 22, 2017 at 1:27 PM, Uros Bizjak wrote:
>>> On Fri, Sep 22, 2017 at 12:28 PM, Daniel Santos
>>> wrote:
On 09/22/2017 03:28 AM, Rainer Orth wrote:
> Hi Daniel,
>
>>
OK, hopefully I've gotten everything cleaned up. I should note that
because I'm now including both auto-target.h from libgcc (for
HAVE_AS_AVX) and auto-host.h from gcc (HAVE_GAS_HIDDEN) that there are
several warnings for redefined macros, but I plan on fixing that once
this is resolved. Thanks f
Hello world,
here is an update and a ping for my patch at
https://gcc.gnu.org/ml/gcc-patches/2017-09/msg01104.html
This patch warns unconditionally for
REAL A(3)
DO I=1,4
A(I) = 42.
END DO
while only warning conditionally, dependent on a new flag,
for when the statement containing
2017-09-22 21:32 GMT+02:00 Janus Weil :
> 2017-09-22 11:44 GMT+02:00 Janus Weil :
>> 2017-09-22 9:11 GMT+02:00 Janne Blomqvist :
>>> And since the standard requires that double precision variables are
>>> twice as big as reals, in the absence of an explicit -fdefault-double=
>>> flag, would it make
On 21 September 2017 at 16:48, Tamar Christina wrote:
> Hi All,
>
> Commit r244796 changed vect_hw_misalign for arm to check against
> arm_vect_no_misalign. However vect_hw_misalign is supposed to check if
> a target supports misalign access, while arm_vect_no_misalign checks that
> a target only
Hello!
We are out of target flags, so use additional (existing)
ix86_target_flags variable.
2017-09-23 Uros Bizjak
PR bootstrap/82306
* config/i386/i386.opt (mprefer-avx256): Use
ix86_target_flags variable.
* config/i386/i386.c (ix86_target_string): Move
-mprefer-avx256 to
On Fri, Sep 22, 2017 at 11:37:53AM +, Bin Cheng wrote:
> diff --git a/gcc/tree-ssa-loop-manip.c b/gcc/tree-ssa-loop-manip.c
> index d6ba305..6ad0b75 100644
> --- a/gcc/tree-ssa-loop-manip.c
> +++ b/gcc/tree-ssa-loop-manip.c
> @@ -690,48 +690,62 @@ rewrite_virtuals_into_loop_closed_ssa (struct
On 23 September 2017 at 16:12, Christophe Lyon
wrote:
> On 21 September 2017 at 16:48, Tamar Christina
> wrote:
>> Hi All,
>>
>> Commit r244796 changed vect_hw_misalign for arm to check against
>> arm_vect_no_misalign. However vect_hw_misalign is supposed to check if
>> a target supports misalig
Since the upper 32 bits of stack register are always zero for x32, we
can encode %esp as %rsp to avoid 0x67 prefix in address if there is no
index or base register.
Tested on x86-64. OK for trunk?
H.J.
gcc/
PR target/82267
* config/i386/i386.c (ix86_print_operand_address_as
15 matches
Mail list logo