On Tue, Jul 25, 2017 at 11:25:25AM +0200, Robin Dapp wrote:
> Some questions/remarks, comments welcome:
> - ifcvt performs creates things that it expects other passes to clean
> up afterwards. In the case of the superfluous compares this might be
> possible but the code is actually wrong and we c
On Tue, 25 Jul 2017, Kyrill Tkachov wrote:
> For the uses of this function the order when the bitpos is the same
> does not matter, I just wanted to avoid returning zero to avoid perturbations
> due to qsort.
But you can't stabilize qsort in that manner, in fact by making the comparator
invalid yo
On 07/24/2017 02:25 AM, Jakub Jelinek wrote:
Seems TYPE_METHODS have been left in a couple of spots. For winnt-cxx.c
it apparently causes bootstrap failure (I have no way to test it for that
target, but given that the bootstrap is certainly broken right now, it
can't make things worse) and docum
On 07/24/2017 02:25 AM, Jakub Jelinek wrote:
Seems TYPE_METHODS have been left in a couple of spots. For winnt-cxx.c
it apparently causes bootstrap failure (I have no way to test it for that
target, but given that the bootstrap is certainly broken right now, it
can't make things worse) and docum
On Tue, Jul 25, 2017 at 08:50:24AM -0600, Martin Sebor wrote:
> How hard would it be to also suppress the warning for benign
> comparisons like C++ manages to do? E.g., C warns on this
> code even though there's no problem with it:
>
> int foo (unsigned int b)
> {
> const int a = 1;
>
On Tue, 2017-07-25 at 06:19 -0500, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Jul 24, 2017 at 01:51:20PM -0700, Carl Love wrote:
> > On Fri, 2017-07-14 at 15:58 -0500, Segher Boessenkool wrote:
> > > On Fri, Jul 14, 2017 at 01:20:32PM -0700, Carl Love wrote:
> > > > --- /dev/null
> > > > +++ b/gc
Aldy Hernandez writes:
> + /* Implicit conversion to `unsigned int' returns the number of pairs. */
> + operator unsigned () const { return num_pairs (); }
Yeah, I know I've said it before, but it's a bit of a hobby horse, so...
please, please don't do this! I think it would be far clearer if
On 7/25/17 11:53 AM, Carl Love wrote:
> /* { dg-do run { target { powerpc*-*-* && { p9vector_hw } } } } */
> /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
> "-mcpu=power9" } } */
> /* { dg-options "-mcpu=power9 -O2 " } */
>
> With the same results as above. Note, I am
On 25/07/17 18:33 +0100, Jonathan Wakely wrote:
On 25/07/17 18:31 +0100, Jonathan Wakely wrote:
On 18/07/17 05:53 +, Michael Collison wrote:
This is the second version of a patch for Aarc64 to add a vectorized mersenne twister to
libstdc++. The first version used intrinsics and included "a
On Tue, 25 Jul 2017, Richard Biener wrote:
I think we need Richard to say what the intent is for the valueization
function. It is used both to stop looking at defining stmt if the return is
NULL, and to replace/optimize one SSA_NAME with another, but currently it
seems hard to prevent looking at
These historical members were finally removed from C++17, so they are
no longer reserved names and should not be declared by the library in
C++17 mode.
* include/bits/ios_base.h (ios_base::io_state, ios_base::open_mode)
(ios_base::seek_dir): Remove for C++17.
* include/std
I took his "okay" as an approval since he is listed as a maintainer.
-Original Message-
From: Jonathan Wakely [mailto:jwak...@redhat.com]
Sent: Tuesday, July 25, 2017 10:37 AM
To: Michael Collison
Cc: gcc-patches@gcc.gnu.org; libstd...@gcc.gnu.org; nd
Subject: Re: [PATCH v2][Aarch64] Ad
On 25 Jul, Marek Polacek wrote:
> On Sun, Jul 23, 2017 at 11:22:14PM +0200, Volker Reichelt wrote:
> [...]
>
> Not sure if the warning is too useful, but in any case...
>
>> + /* Emit warning. */
>> + gcc_rich_location richloc (token->location);
>> + richloc.add_fixit_remove ();
>> + if (col
> > 4) tree.c:
> >
> > 13535if (RECORD_OR_UNION_TYPE_P (t) && TYPE_BINFO (t) && TYPE_BINFO
> > (tv)
> > 13536&& TYPE_BINFO (t) != TYPE_BINFO (tv)
> > 13537/* FIXME: Java sometimes keep dump TYPE_BINFOs on variant
> > types.
> > 13538 Since there is no cheap way to
On 23 Jul, Martin Sebor wrote:
> On 07/23/2017 02:42 PM, Volker Reichelt wrote:
>> On 21 Jul, Martin Sebor wrote:
>>> On 07/20/2017 10:35 AM, Volker Reichelt wrote:
Hi,
the following patch introduces a new C++ warning option
-Wduplicated-access-specifiers that warns about redund
Richard Biener schrieb:
On Mon, Jul 24, 2017 at 10:19 AM, Georg-Johann Lay wrote:
Hi, as proposed in
https://gcc.gnu.org/ml/gcc-patches/2017-07/msg01294.html
this patch does more asprintf -> xasprintf replacements.
Bootstrapped + reg-tested on x86_64-linux.
Ok for trunk?
Ok.
Thanks,
Rich
On 07/25/2017 08:10 AM, Richard Biener wrote:
> On Mon, Jul 17, 2017 at 9:29 AM, Yuri Gribov wrote:
>> Hi all,
>>
>> This is an updated version of patch in
>> https://gcc.gnu.org/ml/gcc-patches/2017-07/msg00409.html . It prevents
>> optimization in presense of sNaNs (and qNaNs when comparison oper
On 07/20/2017 08:49 AM, Wilco Dijkstra wrote:
> Block auto increment on frame pointer references. This is never
> beneficial since the SFP expands into SP+C or FP+C during register
> allocation. The generated code for the testcase is now as expected:
>
> str x30, [sp, -32]!
> str
The standard says that formatted/unformatted input operations should
catch any exceptions, set iostate bits in the istream, and rethrow if
the exception mask says to do so.
We're failing to do that when the exception happens in the
istream::sentry constructor, while it extracts characters to skip
Hi Jakub,
On Tue, Jul 25, 2017 at 11:14:32AM +0200, Jakub Jelinek wrote:
> The following patch adjusts the vec_init and vec_extract optabs, so that
> they don't have in the expander names just the vector mode, but also another
> mode, for vec_extract the mode of the result and for vec_init the mod
Jeff Law wrote:
> My only concern here would be cases where we don't end up eliminating FP
> to SP. But I'd think it's unlikely that we'd have enough auto-inc
> opportunities on the frame pointer for it to matter much anyway.
What kind of case are you thinking of? Whether it is SP or FP doesn't
Jakub Jelinek writes:
> Bootstrapped/regtested on x86_64-linux and i686-linux, where it improves
> e.g. the code generation for slp-43.c and slp-45.c testcases.
> make cc1 tested in cross-compilers to the remaining targets.
No objections for the MIPS part. I've pointed out this change to Sameera
On Tue, Jul 25, 2017 at 12:30:13PM +0100, Kyrill Tkachov wrote:
> We sometimes use the __mode__ attribute to force certain sizes in C types.
> For example: typedef int ditype __attribute__ ((mode (DI)));
> Maybe you can do this to force the right sizes. I don't know if there are
> any targets
> th
On Tue, Jul 25, 2017 at 09:08:23AM -0400, Michael Meissner wrote:
> > After this all is done you can probably simplify the constraints a bit.
> > Looking forward to it :-)
>
> No, we can never remove constraints, since otherwise it would break user
> written asm statements.
As we discussed offlin
On 07/25/2017 03:25 PM, Wilco Dijkstra wrote:
> Jeff Law wrote:
>
>> My only concern here would be cases where we don't end up eliminating FP
>> to SP. But I'd think it's unlikely that we'd have enough auto-inc
>> opportunities on the frame pointer for it to matter much anyway.
>
> What kind of
Hi Mike,
On Tue, Jul 25, 2017 at 09:17:25AM -0400, Michael Meissner wrote:
> This patch eliminates TARGET_UPPER_REGS_DI. I deleted the poison attribute in
> patch #1. I will combine the ChangeLog and submit this patch and the previous
> patch together if approved.
Committing the patches separat
On Tue, Jul 25, 2017 at 09:53:21AM -0700, Carl Love wrote:
> /* { dg-do run { target { powerpc*-*-* && { p9vector_hw } } } } */
> /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
> "-mcpu=power9" } } */
> /* { dg-options "-mcpu=power9 -O2 -mupper-regs-di" } */
>
> m64 2 t
This patch to the Go frontend by Than McIntosh adds a new helper
routine Type::finish_pointer_types that walks through the pointer type
cache and looks for placeholder types that may have been created at
some point before conversion of named types, and invokes
Type::finish_backend() on said placeho
Next up, the elimination of the -mvsx-small-integer option. This patch is a
little more complex than the previous patches. The -mvsx-small-integer was set
with -mpower8-vector or -mcpu=power8, and it would enable SImode to go into
vector registers. While power7 had the instructions to support 32
I forgot to include the patch for these changes:
[gcc]
2017-07-25 Michael Meissner
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
-mvsx-small-integer option.
(ISA_3_0_MASKS_IEEE): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs600
And not only the patches to the compiler, I forgot to include the testsuite
patches:
[gcc/testsuite]
2017-07-25 Michael Meissner
* gcc.target/powerpc/vsx-himode.c: Delete -mvsx-small-integer
option.
* gcc.target/powerpc/vsx-himode2.c: Likewise.
* gcc.target/powe
Hello, gentle maintainer.
This is a message from the Translation Project robot.
A revised PO file for textual domain 'gcc' has been submitted
by the Spanish team of translators. The file is available at:
http://translationproject.org/latest/gcc/es.po
(This file, 'gcc-7.1.0.es.po', has just
All TARGET_DEFAULT defines set MASK_FPU. There is no need to set it in
some CPU target flags enable.
gcc/
config/sparc/sparc.c (sparc_option_override): Remove MASK_FPU
from all CPU target flags enable members.
---
gcc/config/sparc/sparc.c | 10 +-
1 file changed, 5 insert
Add the -mfsmuld option to control the generation of the FsMULd
instruction. In general, this instruction is available in architecture
version V8 and V9 CPUs with FPU. Some CPUs of this category do not
support this instruction properly, e.g. AT697E, AT697F and UT699. Some
CPUs of this category d
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