Hi,
diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
index ecfab1f..23c12b5 100644
--- a/gcc/tree-vrp.c
+++ b/gcc/tree-vrp.c
@@ -3759,8 +3759,10 @@ extract_range_basic (value_range *vr, gimple *stmt)
&& SSA_NAME_IS_DEFAULT_DEF (arg)
&& TREE_CODE (SSA_NAME_VAR (arg)) == PA
On Thu, Nov 12, 2015 at 8:52 AM, Michael Matz wrote:
> Hello,
>
> this new pass implements loop iteration space splitting for loops that
> contain a conditional that's always true for one part of the iteration
> space and false for the other, i.e. such situations:
>
> for (i = beg; i < end; i++)
On Fri, Jul 22, 2016 at 4:11 PM, Jakub Jelinek wrote:
> On Fri, Jul 22, 2016 at 10:33:50AM -0400, David Malcolm wrote:
>> gcc/cp/ChangeLog:
>> * parser.h (struct cp_token): Add a STATIC_ASSERT on the
>> size of the struct.
>> ---
>> gcc/cp/parser.h | 9 +
>> 1 file changed, 9
On Sat, Jul 23, 2016 at 2:40 PM, Patrick Palka wrote:
> 1. When dumping assert details, print loc->expr instead of the bare SSA
> name. loc->expr is not always equal to the SSA name. For example we
> sometimes insert an ASSERT_EXPR like
>
> x_7 = ASSERT_EXPR 8>;
>
> The diff of the new dump o
On Sun, Jul 24, 2016 at 1:44 PM, wrote:
> From: Trevor Saunders
>
> gcc/ChangeLog:
Ok.
Richard.
> 2016-07-24 Trevor Saunders
>
> * tree-outof-ssa.c (struct elim_graph): Change type of members
> to auto_vec and auto_sbitmap.
> (elim_graph::elim_graph): New constructo
On Sun, Jul 24, 2016 at 1:44 PM, wrote:
> From: Trevor Saunders
>
> gcc/ChangeLog:
Ok.
Richard.
> 2016-07-24 Trevor Saunders
>
> * tree-outof-ssa.c (struct elim_graph): Remove typedef.
> (new_elim_graph): Adjust.
> (clear_elim_graph): Likewise.
> (delete_eli
On 07/22/2016 03:20 PM, Jakub Jelinek wrote:
> On Fri, Jul 22, 2016 at 01:46:44PM +0200, Martin Liška wrote:
>> As described in the PR, current numbering scheme in gcov-io.h would overflow
>> in couple of years.
>> Thus, I'm suggesting to switch from:
>>
>> [major][minor/10][minor%10][release_stat
On Sun, Jul 24, 2016 at 1:44 PM, wrote:
> From: Trevor Saunders
>
> gcc/ChangeLog:
>
> 2016-07-24 Trevor Saunders
>
> * tree-ssa-structalias.c (struct topo_info): Add constructor,
> and change types of members to auto_vec and auto_sbitmap.
> (init_topo_info): Remove.
>
Hi.
As discussed with Honza, we should sum all edge frequencies when a loop
has multiple latches.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
Ready to be installed?
Martin
>From 07dc9092511aedfe2786630d72419b16ef660d0c Mon Sep 17 00:00:00 2001
From: marxin
Date: F
Hi.
As other calls of get_ops is guarded with TREE_CODE (x) == SSA_NAME, I guess the
same should be done for the call that causes the ICE.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
Ready to be installed?
Martin
>From 9dd5cc00eb3c271fad91fede6a9b06df356e001f Mon S
Hi.
This is quite obvious change.
I've been waiting for bootstrap and regression tests on ppc64le-redhat-linux.
Ready after it finishes?
Martin
>From 2f416d7feca35d9075124f4dc74f3560a18beefb Mon Sep 17 00:00:00 2001
From: marxin
Date: Fri, 22 Jul 2016 12:46:08 +0200
Subject: [PATCH] Fix memory
On Mon, 25 Jul 2016, Prathamesh Kulkarni wrote:
> Hi Richard,
> The attached patch tries to fix PR70920.
> It adds your pattern from comment 1 in the PR
> (with additional gating on INTEGRAL_TYPE_P to avoid regressing
> finalize_18.f90)
> and second pattern, which is reverse of the first transfor
On 21/07/16 11:08, Richard Earnshaw (lists) wrote:
On 20/07/16 16:02, Jiong Wang wrote:
Richard,
Thanks for the review, yes, I believe using aarch64_add_constant is
unconditionally
safe here. Because we have generated a stack tie to clobber the whole
memory thus
prevent any instruction which
Hi Martin,
On 25/07/16 18:56, Martin Liška wrote:
Hi.
As other calls of get_ops is guarded with TREE_CODE (x) == SSA_NAME, I guess the
same should be done for the call that causes the ICE.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
Ready to be installed?
Marti
On 07/25/2016 11:51 AM, kugan wrote:
> Sorry about the breakage. Since final_range_test_p allows either lhs or rhs
> to be SSA_NAME (for the different cases it accepts), we should indeed check
> for TREE_CODE being SSA_NAME. Unfortunately it didn't trigger in my testing.
> Lets wait for the main
On Mon, Jul 25, 2016 at 5:38 AM, Patrick Palka wrote:
> On Fri, 22 Jul 2016, Patrick Palka wrote:
>
>> On Fri, 22 Jul 2016, Patrick Palka wrote:
>>
>> > On Fri, 22 Jul 2016, Patrick Palka wrote:
>> >
>> > > This patch teaches VRP to register along a default switch label
>> > > assertions that corr
On Mon, Jul 25, 2016 at 8:59 AM, kugan
wrote:
> Hi,
>
>>> diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
>>> index ecfab1f..23c12b5 100644
>>> --- a/gcc/tree-vrp.c
>>> +++ b/gcc/tree-vrp.c
>>> @@ -3759,8 +3759,10 @@ extract_range_basic (value_range *vr, gimple
>>> *stmt)
>>> && SSA_NAM
On Mon, Jul 25, 2016 at 10:55 AM, Martin Liška wrote:
> Hi.
>
> As discussed with Honza, we should sum all edge frequencies when a loop
> has multiple latches.
>
> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
>
> Ready to be installed?
- if (e->src == loop->lat
On Mon, Jul 25, 2016 at 10:58 AM, Martin Liška wrote:
> Hi.
>
> This is quite obvious change.
>
> I've been waiting for bootstrap and regression tests on ppc64le-redhat-linux.
> Ready after it finishes?
Ok.
Richard.
> Martin
On Mon, Jul 25, 2016 at 10:56 AM, Martin Liška wrote:
> Hi.
>
> As other calls of get_ops is guarded with TREE_CODE (x) == SSA_NAME, I guess
> the
> same should be done for the call that causes the ICE.
>
> Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
>
> Ready to be
These tests that hammer shared_ptr and weak_ptr to test the
thread-safety of the reference counting were originally written for
the TR1 smart pointers, and so pre-date std::thread etc.
This refactors them to use C++11 std::thread and std::atomic (with
relaxed memory ordering, since we don't need
On Wed, Jul 20, 2016 at 03:07:45PM +0530, Virendra Pathak wrote:
> Hi gcc-patches group,
>
> Please find the patch for adding the basic scheduler for vulcan
> in the aarch64 port.
>
> Tested the patch with compiling cross aarch64-linux-gcc,
> bootstrapped native aarch64-unknown-linux-gnu and
> ru
On 11/07/16 17:56, Andre Vieira (lists) wrote:
> On 07/07/16 13:30, mickael guene wrote:
>> Hi Andre,
>>
>> Another feedback on your purecode patch.
>> You have to disable casesi pattern since then it will
>> generate wrong code with -mpure-code option.
>> Indeed it will generate an 'adr rx, .Lx
Hi all,
the attached patch fixes the ICE when the options in the title are
used. Two issues caused this ICE:
1. the error-printing routines relied on the locus.nextc which was not
set by the gfc_set_backend_locus() and is now set by the patch
(locally, not in gfc_set_backend_locus()).
2. the loc
On Wed, Jul 20, 2016 at 06:00:34PM +0100, Jiong Wang wrote:
> On 07/07/16 17:14, Jiong Wang wrote:
> >This patch add ARMv8.2-A FP16 one operand vector intrinsics.
> >
> >We introduced new mode iterators to cover HF modes, qualified patterns
> >which was using old mode iterators are switched to new
On Wed, Jul 20, 2016 at 06:00:46PM +0100, Jiong Wang wrote:
> On 07/07/16 17:15, Jiong Wang wrote:
> >This patch add ARMv8.2-A FP16 two operands vector intrinsics.
>
> The updated patch resolve the conflict with
>
>https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00309.html
>
> The change is to
Hi Martin,
I observed the following error:
ERROR: gcc.dg/atomic/pr71675.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects : syntax error in target selector "target c11" for
" dg-do 3 compile { target c11 } "
It seems we don't have a c11 effective target check available
in dejagnu target
On Thu, Jul 07, 2016 at 05:16:01PM +0100, Jiong Wang wrote:
> This patch add ARMv8.2-A FP16 three operands vector intrinsics.
>
> Three operands intrinsics only contain fma and fms.
OK.
Thanks,
James
>
> 2016-07-07 Jiong Wang
>
> gcc/
> * config/aarch64/aarch64-simd-builtins.def: Re
Hi.
Currently, call to get_working_sets is only called from tree_profiling
(called from 'pass_ipa_tree_profile' and is guarded in gate with
!flag_auto_profile).
I would like to apply the same logic in lto-cgraph.c.
Patch can bootstrap on ppc64le-redhat-linux and survives regression tests.
Ready
On Thu, Jul 07, 2016 at 05:16:28PM +0100, Jiong Wang wrote:
> This patch add ARMv8.2-A FP16 lane vector intrinsics.
>
> Lane intrinsics are generally derivatives of multiply intrinsics,
> including multiply accumulate. All necessary backend support for them
> are there already except fmulx, the i
On Thu, Jul 07, 2016 at 05:16:58PM +0100, Jiong Wang wrote:
> This patch add ARMv8.2-A FP16 reduction vector intrinsics.
OK.
Thanks,
James
> gcc/
> 2016-07-07 Jiong Wang
>
> * config/aarch64/arm_neon.h (vmaxv_f16): New.
> (vmaxvq_f16): Likewise.
> (vminv_f16): Likewise
On 07/15/2016 10:37 AM, Bin.Cheng wrote:
> On Thu, Jul 14, 2016 at 11:33 PM, Andi Kleen wrote:
> I haven't seen that. Unstable in what way?
For GCC doesn't support FDO, it run below tests as you said:
PASS: gcc.dg/tree-prof/20041218-1.c compilation, -g
UNSUPPORTED: gcc.dg/
On Wed, Jul 20, 2016 at 06:00:53PM +0100, Jiong Wang wrote:
> On 07/07/16 17:17, Jiong Wang wrote:
> >This patch add ARMv8.2-A FP16 one operand scalar intrinsics
> >
> >Scalar intrinsics are kept in arm_fp16.h instead of arm_neon.h.
>
> The updated patch resolve the conflict with
>
>https://g
On Wed, Jul 20, 2016 at 06:00:58PM +0100, Jiong Wang wrote:
> On 07/07/16 17:17, Jiong Wang wrote:
> >This patch add ARMv8.2-A FP16 two operands scalar intrinsics.
>
> The updated patch resolve the conflict with
>
>https://gcc.gnu.org/ml/gcc-patches/2016-06/msg00309.html
>
> The change is to
Hi Jason,
On 22/07/16 04:01, Jason Merrill wrote:
71913 is a case where unsafe_copy_elision_p was being too
conservative. We can allow copy elision in a new expression; the only
way we could end up initializing a base subobject without knowing it
would be through a placement new, in which case w
On Thu, Jul 07, 2016 at 05:18:15PM +0100, Jiong Wang wrote:
> This patch add ARMv8.2-A FP16 three operands scalar intrinsics.
OK.
Thanks,
James
> gcc/
> 2016-07-07 Jiong Wang
>
> * config/aarch64/aarch64-simd-builtins.def: Register new builtins.
> * config/aarch64/aarch64.md (
On Thu, Jul 07, 2016 at 05:18:29PM +0100, Jiong Wang wrote:
> This patch adds ARMv8.2-A FP16 lane scalar intrinsics.
OK.
Thanks,
James
>
> gcc/
> 2016-07-07 Jiong Wang
>
> * config/aarch64/arm_neon.h (vfmah_lane_f16): New.
> (vfmah_laneq_f16): Likewise.
> (vfmsh_lane_
On Fri, Jul 22, 2016 at 2:10 PM, kugan
wrote:
> Hi Richard,
>
> Thanks for the review.
>
> On 18/07/16 21:51, Richard Biener wrote:
>>
>> On Fri, Jul 15, 2016 at 9:33 AM, kugan
>> wrote:
>>>
>>> Hi Andrew,
>>>
>>> On 15/07/16 17:28, Andrew Pinski wrote:
On Fri, Jul 15, 2016 at 12:0
On Mon, Jul 25, 2016 at 1:05 PM, Martin Liška wrote:
> Hi.
>
> Currently, call to get_working_sets is only called from tree_profiling
> (called from 'pass_ipa_tree_profile' and is guarded in gate with
> !flag_auto_profile).
> I would like to apply the same logic in lto-cgraph.c.
>
> Patch can boo
On Thu, Jul 07, 2016 at 05:12:48PM +0100, Jiong Wang wrote:
> Hello,
>
> As a follow up of
>
> https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01240.html,
>
> This patch set adds ARMv8.2-A FP16 scalar and vector intrinsics support,
> gcc middle-end will also be aware of some standard operations th
So I needed to fix that builtins appearing in BLOCK_VARs and the solution
I came up with accidentially disabled streaming via the special path.
Thus the following patch removes the special-casing completely and makes
the BLOCK_VARs handling work the same way as for regular externs (by
streaming a
On 07/22/16 11:19, Alexander Monakov wrote:
I hope I've satisfactorily explained the failures you've pointed out (thanks for
the data). I think I should leave the choice of what to do next (revert the
patch or leave it in and install fixups where appropriate) up to you?
Please revert the nvpt
Hi,
The below patch fixes tests that fail for the avr target, because they
assume ints are atleast 32 bits wide and pointers and longs have the
same size.
I've required int32plus support for one test, and for the other two,
I've introduced a cast to intptr_t to avoid the pointer <-> int
On 07/25/16 04:42, Martin Liška wrote:
I like the change suggested by Jakub, I've updated the numbering scheme, as well
as comments in gcov-io.h.
ok. I'm not too fussed about a problem that is 25 years away and would result
in contusion of code (then) instrumented 30 years ago.
nathan
Hello, maintainers.
Recently, I tried to figure out how the rope container works by
dumping the content. I found that the implementation of rope::dump()
has a misspell bug which use a static member function as a enum value.
It seems that the original SGI STL implementation doesn't have this bug.
On Mon, 25 Jul 2016, Nathan Sidwell wrote:
> On 07/22/16 11:19, Alexander Monakov wrote:
>
> > I hope I've satisfactorily explained the failures you've pointed out (thanks
> > for the data). I think I should leave the choice of what to do next (revert
> > the patch or leave it in and install fixu
> Should UNITS_PER_WORD here be POINTER_SIZE/BITS_PER_UNIT right?
Hmm, yes, presumably, it's the size of the static chain and so a pointer.
> Another UNITS_PER_WORD that I think ought to be
> POINTER_SIZE/BITS_PER_UNIT. Probably worth a pass over the patch to
> look for this throughout.
Yes, it
On 25/07/16 20:26 +0800, Georeth Chow wrote:
Hello, maintainers.
Recently, I tried to figure out how the rope container works by
dumping the content. I found that the implementation of rope::dump()
has a misspell bug which use a static member function as a enum value.
It seems that the original
On 29/06/16 23:08, Eric Botcazou wrote:
> Index: config/aarch64/aarch64.h
> ===
> --- config/aarch64/aarch64.h (revision 237789)
> +++ config/aarch64/aarch64.h (working copy)
> @@ -779,6 +779,9 @@ typedef struct
> correctly. */
On 25/07/16 10:34, Jiong Wang wrote:
> On 21/07/16 11:08, Richard Earnshaw (lists) wrote:
>> On 20/07/16 16:02, Jiong Wang wrote:
>>> Richard,
>>>Thanks for the review, yes, I believe using aarch64_add_constant is
>>> unconditionally
>>> safe here. Because we have generated a stack tie to clob
[PATCH 0/7, GCC, V8M] ARMv8-M Security Extensions
Hello,
This is a respin of a previous patch series for ARMv8-M Security
Extensions. In this version I have removed one patch, rebased the rest
and changed some of them.
This patch series aims at implementing support for ARMv8-M's Security
Extensi
This patch adds the support of the '-mcmse' option to enable ARMv8-M's
Security Extensions and supports the following intrinsics:
cmse_TT
cmse_TT_fptr
cmse_TTT
cmse_TTT_fptr
cmse_TTA
cmse_TTA_fptr
cmse_TTAT
cmse_TTAT_fptr
cmse_check_address_range
cmse_check_pointed_object
cmse_is_nsfptr
cmse_nsfptr
This patch adds support for the ARMv8-M Security Extensions
'cmse_nonsecure_entry' attribute. In this patch we implement the
attribute handling and diagnosis around the attribute. See Section 5.4
of ARM®v8-M Security Extensions
(http://infocenter.arm.com/help/topic/com.arm.doc.ecm0359818/index.html
The following should fix PR71984 which stems from a bogus (but harmless
for CONCAT) use of GET_MODE_UNIT_SIZE vs. GET_MODE_SIZE (where the
former is really really badly named...). In the process of fixing it
I also hardened it against VOIDmode which might have occured for
CONCAT as well given we
This patch extends support for the ARMv8-M Security Extensions
'cmse_nonsecure_entry' attribute in two ways:
1) Generate two labels for the function, the regular function name and
one with the function's name appended to '__acle_se_', this will trigger
the linker to create a secure gateway veneer
This patch extends support for the ARMv8-M Security Extensions
'cmse_nonsecure_entry' attribute to safeguard against leak of
information through unbanked registers.
When returning from a nonsecure entry function we clear all caller-saved
registers that are not used to pass return values, by writin
This patch adds support for the ARMv8-M Security Extensions
'cmse_nonsecure_call' attribute. This attribute may only be used for
function types and when used in combination with the '-mcmse'
compilation flag. See Section 5.5 of ARM®v8-M Security Extensions
(http://infocenter.arm.com/help/topic/com.
This patch extends support for the ARMv8-M Security Extensions
'cmse_nonsecure_call' to use a new library function
'__gnu_cmse_nonsecure_call'. This library function is responsible for
(without using r0-r3 or d0-d7):
1) saving and clearing all callee-saved registers using the secure stack
2) cleari
> If I understand how this is supposed to work then this is not
> future-proof against changes to the architecture. The bottom two bits
> in both AArch32 (arm) and AArch64 are reserved for future use by the
> architecture; they must not be used by software for tricks like this.
I see, thanks for
This patch adds support ARMv8-M's Security Extension's
cmse_nonsecure_caller intrinsic. This intrinsic is used to check whether
an entry function was called from a non-secure state.
See Section 5.4.3 of ARM®v8-M Security Extensions: Requirements on
Development Tools
(http://infocenter.arm.com/help/
On 25/07/16 14:25, Eric Botcazou wrote:
>> If I understand how this is supposed to work then this is not
>> future-proof against changes to the architecture. The bottom two bits
>> in both AArch32 (arm) and AArch64 are reserved for future use by the
>> architecture; they must not be used by softwa
_Unwind_Find_FDE calls _Unwind_Find_registered_FDE and it takes lock even
when there is no registered objects. As far as I see only statically
linked applications call __register_frame_info* functions, so for
dynamically linked executables taking the lock to check unseen_objects
and seen_objects is
> So does this require that every function have an 8-byte alignment
> boundary? or just those that appear in nested functions? If the
> former, how do you get routines written in assembler, or produced by
> third-party compilers, to comply?
The former. You need to be able to control what happen
Hi,
The attached patch tries to fix PR71078.
I am not sure if I have got the converts right.
I put (convert? @0) and (convert1? (abs @1))
to match for cases when operands's types may
be different from outermost type like in pr71078-3.c
test-case (included in patch).
Bootstrap+test in progress on x8
Hi,
On Sun, 24 Jul 2016, Andrew Pinski wrote:
> What ever happened to this patch?
It got accepted but I deferred inclusion in GCC 6 because it
was late in the cycle then and performance results didn't show super
improvements (only looked at cpu2006). No regressions, but no nice
speedups eith
Hi Ian,
> I have committed a patch to update libgo to the 1.7rc3 release
> candidate. This is very close to the upcoming 1.7 release. As usual
> with libgo updates, the patch is too large to include in this e-mail
> message. I've appended the changes to the gccgo-specific directories.
this bro
On 07/24/2016 10:28 AM, Richard Biener wrote:
On July 24, 2016 1:44:44 PM GMT+02:00, tbsaunde+...@tbsaunde.org wrote:
From: Trevor Saunders
gcc/ChangeLog:
2016-07-24 Trevor Saunders
* sbitmap.h (auto_sbitmap): New class.
OK.
Do we need a private move constructor and assignment
On 07/25/2016 06:56 AM, Eric Botcazou wrote:
Another UNITS_PER_WORD that I think ought to be
POINTER_SIZE/BITS_PER_UNIT. Probably worth a pass over the patch to
look for this throughout.
Yes, it was very likely enabled only on platforms with word-sized pointers.
That's what I suspected. Tha
On 07/24/2016 11:56 AM, Andrew Pinski wrote:
On Sun, Jul 24, 2016 at 9:49 AM, Patrick Palka wrote:
On Sat, Jul 23, 2016 at 9:13 PM, kugan
wrote:
On 23/07/16 05:26, Patrick Palka wrote:
This patch teaches VRP to register along a default switch label
assertions that corresponds to the anti
On 07/25/2016 12:36 AM, Kito Cheng wrote:
Hi all:
Some target(for example i386, sh and h8300) use find_regno_note in
split pattern but df infrastructure seem not initialize at split pass,
so it may got wrong note since it's out-of-date.
ChangeLog
2016-07-25 Kito Cheng
* gcc/recog.c (
libgo version bump to indicate the change in Go version?
On 07/22/2016 01:15 PM, Ian Lance Taylor wrote:
I have committed a patch to update libgo to the 1.7rc3 release
candidate. This is very close to the upcoming 1.7 release. As usual
with libgo updates, the patch is too large to include in
Hi,
I've applied the following patch as obvious to mark two more tests as taking
addresses of labels (this cannot work on nvptx). The issue on pr16973.c was
uncovered in the fallout of my (now reverted) toplevel-reorder patch; the other
test, pr71494.c, fails regardless of that.
2016-07-25 Alex
On Fri, 15 Jul 2016, Thomas Schwinge wrote:
> > No, we want to have as little churn as possible in existing tests, the
> > general policy is to add new tests (not just for OpenACC/OpenMP, but for
> > all functionality).
>
> Hmm, that's something I had not been aware of, and I can't find this
> co
On 25 July 2016 at 14:32, Richard Biener wrote:
> On Mon, 25 Jul 2016, Prathamesh Kulkarni wrote:
>
>> Hi Richard,
>> The attached patch tries to fix PR70920.
>> It adds your pattern from comment 1 in the PR
>> (with additional gating on INTEGRAL_TYPE_P to avoid regressing
>> finalize_18.f90)
>>
On Jul 25, 2016, at 5:00 AM, Senthil Kumar Selvaraj
wrote:
>
> The below patch fixes tests that fail for the avr target, because they
> assume ints are atleast 32 bits wide and pointers and longs have the
> same size.
>
> I've required int32plus support for one test, and for the other two,
On 07/24/2016 05:44 AM, tbsaunde+...@tbsaunde.org wrote:
From: Trevor Saunders
gcc/ChangeLog:
2016-07-24 Trevor Saunders
* bt-load.c (compute_out): Use auto_sbitmap class.
(link_btr_uses): Likewise.
* cfganal.c (mark_dfs_back_edges): Likewise.
(post_order_co
On top of the previously filed patch for importing gnulib (the link
isn’t available on the archive yet, however this contains some of the
information:
http://gcc.1065356.n5.nabble.com/Importing-gnulib-into-the-gcc-tree-td1275807.html#a1279573)
now I have replaced another function from libiberty wi
On 07/23/2016 12:32 PM, John David Anglin wrote:
The attached patch fixes PR middle-end/71712. We need to invalidate the
argument slots in
const/pure calls as they are owned by the callee. The caller can't assume they
are preserved
across the call. Fix is similar to that for PR71532.
Tested
On top of the previously filed patch for importing gnulib (the link
isn’t available on the archive yet, however this contains some of the
information:
http://gcc.1065356.n5.nabble.com/Importing-gnulib-into-the-gcc-tree-td1275807.html#a1279573)
now I have replaced another function from libiberty wi
On 07/23/2016 10:38 AM, Richard Biener wrote:
On July 22, 2016 5:09:07 PM GMT+02:00, Jakub Jelinek wrote:
Hi!
As Richard reported on IRC, we are marking C99 inline (without extern)
functions as effectively always_inline, even when the intent has been
to do
this only for the GNU extern inline f
The link for that patch importing gnulib inside gcc’s tree:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01302.html
Apologies for the confusion.
On 25 July 2016 at 10:48:20 PM, ayush goel (ayushgoel1...@gmail.com) wrote:
>
> On top of the previously filed patch for importing gnulib (the link isn
Link for the patch importing gnulib inside gcc’s tree:
https://gcc.gnu.org/ml/gcc-patches/2016-07/msg01302.html
Apologies for the confusion
-Ayush
On 25 July 2016 at 10:52:00 PM, ayush goel (ayushgoel1...@gmail.com) wrote:
> On top of the previously filed patch for importing gnulib (the link isn
On 07/22/2016 05:38 AM, Martin Liška wrote:
On 07/22/2016 12:53 PM, Segher Boessenkool wrote:
Hi Martin,
On Fri, Jul 22, 2016 at 10:17:51AM +0200, Martin Liška wrote:
/* We can not predict the probabilities of outgoing edges of bb. Set them
- evenly and hope for the best. */
+ evenly an
On 07/25/2016 05:03 AM, Renlin Li wrote:
Hi Martin,
I observed the following error:
ERROR: gcc.dg/atomic/pr71675.c -O2 -flto -fuse-linker-plugin
-fno-fat-lto-objects : syntax error in target selector "target c11" for
" dg-do 3 compile { target c11 } "
It seems we don't have a c11 effective t
On 07/22/2016 05:36 AM, Richard Biener wrote:
The thing that needs work I think is re-running of if-conversion.
I wonder if we could revamp if-conversion to work on a subset of the
CFG? I can see that potentially being useful in other contexts. Would
that work for you Richi?
We've already
On Mon, Jul 25, 2016 at 1:56 PM, Jeff Law wrote:
> On 07/25/2016 05:03 AM, Renlin Li wrote:
>>
>> Hi Martin,
>>
>> I observed the following error:
>>
>> ERROR: gcc.dg/atomic/pr71675.c -O2 -flto -fuse-linker-plugin
>> -fno-fat-lto-objects : syntax error in target selector "target c11" for
>> " dg
On Mon, Jul 25, 2016 at 7:15 AM, Renlin Li wrote:
> Hi Jason,
>
> On 22/07/16 04:01, Jason Merrill wrote:
>>
>> 71913 is a case where unsafe_copy_elision_p was being too
>> conservative. We can allow copy elision in a new expression; the only
>> way we could end up initializing a base subobject wi
On Jul 25, 2016, at 9:37 AM, Joseph Myers wrote:
>
> On Fri, 15 Jul 2016, Thomas Schwinge wrote:
>
>>> No, we want to have as little churn as possible in existing tests, the
>>> general policy is to add new tests (not just for OpenACC/OpenMP, but for
>>> all functionality).
>>
>> Hmm, that's so
Here, when we start to modify an array element, we add a
constructor_elt for it to the CONSTRUCTOR. When calculating the value
to store there we found this empty element and tried to use it,
leading to an ICE because it was NULL.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit b472cebfc4ce1
An infinite loop in a constexpr function led to a compiler hang.
Fixed by putting an upper bound on loop iterations in constexpr
evaluation.
Tested x86_64-pc-linux-gnu, applying to trunk.
commit 6c93c22a799e5ea5e1cdfe661476cf123ed1a4e8
Author: Jason Merrill
Date: Mon Jul 25 10:31:10 2016 -0400
On July 25, 2016 8:01:17 PM GMT+02:00, Jeff Law wrote:
>On 07/22/2016 05:36 AM, Richard Biener wrote:
>> The thing that needs work I think is re-running of if-conversion.
>I wonder if we could revamp if-conversion to work on a subset of the
>CFG? I can see that potentially being useful in other
On July 25, 2016 5:56:29 PM GMT+02:00, Jeff Law wrote:
>On 07/25/2016 12:36 AM, Kito Cheng wrote:
>> Hi all:
>>
>> Some target(for example i386, sh and h8300) use find_regno_note in
>> split pattern but df infrastructure seem not initialize at split
>pass,
>> so it may got wrong note since it's ou
My patch for 54440 coerce_template_parameter_pack mysteriously assumed
that the index of the first argument we want to pack into the trailing
pack somehow matched the index of the parameter pack in the parameter
list. I don't know what I was thinking.
Tested x86_64-pc-linux-gnu, applying to trunk
This useless testcase uses a pack expansion as the parenthesized
initializer for an init-capture, which is only valid when the
parameter pack has a single argument. This patch avoids an ICE by
leaving the TREE_LIST around the pack expansion and dealing with it at
substitution time.
Tested x86_64-
Temporary source files created by the selftests weren't generated
correctly if they contained a "%" character (seen whilst writing
selftests for the locations-within-string-literals patch I'm
working on).
Root cause was a buggy fprintf in the selftest::temp_source_file ctor.
Fixed thusly.
Succes
On 07/25/2016 12:35 PM, Richard Biener wrote:
On July 25, 2016 5:56:29 PM GMT+02:00, Jeff Law wrote:
On 07/25/2016 12:36 AM, Kito Cheng wrote:
Hi all:
Some target(for example i386, sh and h8300) use find_regno_note in
split pattern but df infrastructure seem not initialize at split
pass,
so
Hi,
As reported on the gcc mailing list, slsr_process_phi contains a dead call
to gimple_bb. I looked into why this wasn't noticed before, and concluded
that we don't actually need the call. To reach this point, the phi argument
must not correspond to a strength-reduction candidate in the table
Hi,
The subject test case uses the -mprofile-kernel option, which is not
permitted in 32-bit mode. It currently restricts the effective target
to powerpc64, which is not sufficient when using -m32 on 64-bit hardware.
This patch changes the effective target restriction to lp64 to correct
this.
Te
On Wed, Dec 2, 2015 at 5:23 AM, Michael Matz wrote:
> Hi,
>
> On Tue, 1 Dec 2015, Jeff Law wrote:
>
>> > So, okay for trunk?
>> -ENOPATCH
>
> Sigh :)
> Here it is.
I found one problem with it.
Take:
void f(int *a, int M, int *b)
{
for(int i = 0; i <= M; i++)
{
if (i < M)
a[i
On 07/25/2016 12:32 PM, Richard Biener wrote:
On July 25, 2016 8:01:17 PM GMT+02:00, Jeff Law wrote:
On 07/22/2016 05:36 AM, Richard Biener wrote:
The thing that needs work I think is re-running of if-conversion.
I wonder if we could revamp if-conversion to work on a subset of the
CFG? I ca
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