On Fri, 20 May 2016, Marc Glisse wrote:
Hello,
this was bootstrapped and regtested on powerpc64le-unknown-linux-gnu.
2016-05-20 Marc Glisse
PR tree-optimization/71079
PR tree-optimization/71206
gcc/
* match.pd ((X ^ Y) ^ (X ^ Z)): Convert the arguments.
gcc/test
> Effectively, the patch prevents late-SRA from doing anything for both
> testcases (PR 70884 and PR 70919). I have started a bootstrap and
> testing on x86_64 and i686 only a few moments ago but it would be
> great if someone also tried on an architecture for which the
> constant-pool SRA enhance
Ping!
Note: Removed the garbled characters and added ChangeLog
--
avr-gcc crashes for following test as it couldn't recognize the
instruction pattern.
struct st {
unsigned char uc1;
unsigned int *ui1;
};
unsigned int ui1;
struct st foo
On Thu, 19 May 2016, Eric Botcazou wrote:
> > Index: trunk/gcc/tree.def
> > ===
> > *** trunk.orig/gcc/tree.def 2016-05-17 17:19:41.783958489 +0200
> > --- trunk/gcc/tree.def 2016-05-19 10:23:35.779141973 +0200
> > **
On 17/05/16 12:04, James Greenhalgh wrote:
On Tue, May 17, 2016 at 11:37:57AM +0100, Kyrill Tkachov wrote:
Hi all,
The aarch64_vmls pattern claims to perform a normal vector
floating-point multiply-subtract but in fact performs a fused
multiply-subtract. This is fine when -ffp-contract=fast, b
prefetching was prefetching for register operations like
BIT_FIELD_REF . That's obviously just stupid.
Bootstrapped and tested on x86_64-unknown-linux-gnu, applied.
Richard.
2016-05-20 Richard Biener
PR tree-optimization/71185
* tree-ssa-loop-prefetch.c (gather_memory_refer
Hi,
this enhances VRP, more precisely compare_values_warnv, so as not to give up
for the NAME + CST1 vs CST2 comparison if type overflow is undefined and the
difference CST2 - CST1 overflows or underflows. This makes it possible to
optimize out a class of overflow checks in Ada, typically:
fu
On Thu, May 19, 2016 at 9:40 PM, Ilya Enkovich wrote:
> Hi,
>
> This patch extends vectorizer cost model to include masking cost by
> adding new cost model locations and new target hook to compute
> masking cost.
Can you explain a bit why you add separate overall
masking_prologue/body_cost rather
On Thu, May 19, 2016 at 9:36 PM, Ilya Enkovich wrote:
> Hi,
>
> This patch introduces new options used for loop epilogues vectorization.
Why's that? This is a bit too much for the casual user and if it is
really necessary
to control this via options then it is not fine-grained enough.
Why doesn
Hi!
> > > * function.c (make_epilogue_seq): Remove epilogue_end parameter.
> > > (thread_prologue_and_epilogue_insns): Remove bb_flags. Restructure
> > > code. Ignore sibcalls on EDGE_IGNORE edges.
> > > * shrink-wrap.c (handle_simple_exit): New function. Set EDGE_IGNORE
> > > on edge
On Fri, May 20, 2016 at 4:13 AM, Kugan Vivekanandarajah
wrote:
> Hi,
>
> We don’t allow vector type for integer. Likewise I am also disallowing
> the floating point vector type in transforming repeated addition to
> multiplication.
>
> This can be relaxed. I will send a separate patch to allow int
On Fri, May 20, 2016 at 9:12 AM, Marc Glisse wrote:
> On Fri, 20 May 2016, Marc Glisse wrote:
>
>> Hello,
>>
>> this was bootstrapped and regtested on powerpc64le-unknown-linux-gnu.
>>
>> 2016-05-20 Marc Glisse
>
>
> PR tree-optimization/71079
> PR tree-optimization/71206
Ok.
On Fri, May 20, 2016 at 9:34 AM, Eric Botcazou wrote:
>> Effectively, the patch prevents late-SRA from doing anything for both
>> testcases (PR 70884 and PR 70919). I have started a bootstrap and
>> testing on x86_64 and i686 only a few moments ago but it would be
>> great if someone also tried o
On Fri, May 20, 2016 at 11:20 AM, Eric Botcazou wrote:
> Hi,
>
> this enhances VRP, more precisely compare_values_warnv, so as not to give up
> for the NAME + CST1 vs CST2 comparison if type overflow is undefined and the
> difference CST2 - CST1 overflows or underflows. This makes it possible to
On Thu, 19 May 2016, Jan Hubicka wrote:
> Hi,
> this patch makes doloop_optimize to use the
> get_estimated_loop_iterations_int/get_max_loop_iterations_int instead of
> weakter
> check for const_iter. Bootstrapped/regtested x86_64-linux, OK?
Ok.
Thanks,
Richard.
> Honza
>
> * loop-dolo
On 19 May 2016 at 13:19, Richard Biener wrote:
> On Thu, 19 May 2016, Prathamesh Kulkarni wrote:
>
>> On 18 May 2016 at 19:38, Richard Biener wrote:
>> > On Wed, 18 May 2016, Prathamesh Kulkarni wrote:
>> >
>> >> On 17 May 2016 at 18:36, Richard Biener wrote:
>> >> > On Wed, 11 May 2016, Pratham
On Tue, May 10, 2016 at 01:29:50PM -0700, Cesar Philippidis wrote:
> @@ -12542,7 +12543,7 @@ c_finish_omp_clauses (tree clauses, enum
> c_omp_region_type ort)
> t = OMP_CLAUSE_DECL (c);
> if (TREE_CODE (t) == TREE_LIST)
> {
> - if (handle_omp_array_sections (c,
2016-05-20 12:24 GMT+03:00 Richard Biener :
> On Thu, May 19, 2016 at 9:40 PM, Ilya Enkovich wrote:
>> Hi,
>>
>> This patch extends vectorizer cost model to include masking cost by
>> adding new cost model locations and new target hook to compute
>> masking cost.
>
> Can you explain a bit why you
2016-05-20 12:26 GMT+03:00 Richard Biener :
> On Thu, May 19, 2016 at 9:36 PM, Ilya Enkovich wrote:
>> Hi,
>>
>> This patch introduces new options used for loop epilogues vectorization.
>
> Why's that? This is a bit too much for the casual user and if it is
> really necessary
> to control this vi
Hi all,
The recent -frename-registers change exposed a deficiency in the way we fuse
AESE/AESMC instruction
pairs in arm.
Basically we want to enforce:
AESE Vn, _
AESMC Vn, Vn
to enable the fusion, but regrename comes along and renames the output Vn
register in AESMC to something
else
Hi all,
The recent -frename-registers change exposed a deficiency in the way we fuse
AESE/AESMC instruction
pairs in aarch64.
Basically we want to enforce:
AESE Vn, _
AESMC Vn, Vn
to enable the fusion, but regrename comes along and renames the output Vn
register in AESMC to something
On Thu, May 19, 2016 at 11:28 AM, Martin Liška wrote:
> On 05/17/2016 12:27 AM, Bin.Cheng wrote:
>>> As profile-guided optimization can provide very useful information
>>> about basic block frequencies within a loop, following patch set leverages
>>> that information. It speeds up a single benchma
On Thu, May 19, 2016 at 8:17 PM, Jeff Law wrote:
> On 05/15/2016 06:45 PM, Kugan Vivekanandarajah wrote:
>>
>> Hi Richard,
>>
>> Now that stage1 is open, I would like to get the type promotion passes
>> reviewed again. I have tested the patches on aarch64, x86-64, and
>> ppc64le without any new ex
On Fri, May 20, 2016 at 1:51 AM, Kugan Vivekanandarajah
wrote:
> Hi Richard,
>
>> I think it should have the same rank as op or op + 1 which is the current
>> behavior. Sth else doesn't work correctly here I think, like inserting the
>> multiplication not near the definition of op.
>>
>> Well, th
On Tue, May 10, 2016 at 11:03:57AM +0200, Andreas Krebbel wrote:
> Although the scalar variants of the vector instructions aren't
> actually vector instructions they are still executed in the vector
> facility and therefore need to be disabled when disabling the facility
> with -mno-vx.
OT, I see
Hi Thomas,
On 19/05/16 17:11, Thomas Preudhomme wrote:
On Wednesday 18 May 2016 12:30:41 Kyrill Tkachov wrote:
Hi Thomas,
This looks mostly good with a few nits inline.
Please repost with the comments addressed.
Updated ChangeLog entries:
*** gcc/ChangeLog ***
2016-05-18 Thomas Preud'homme
On Fri, May 20, 2016 at 11:44 AM, Ilya Enkovich wrote:
> 2016-05-20 12:24 GMT+03:00 Richard Biener :
>> On Thu, May 19, 2016 at 9:40 PM, Ilya Enkovich
>> wrote:
>>> Hi,
>>>
>>> This patch extends vectorizer cost model to include masking cost by
>>> adding new cost model locations and new target
On Fri, May 20, 2016 at 11:50 AM, Ilya Enkovich wrote:
> 2016-05-20 12:26 GMT+03:00 Richard Biener :
>> On Thu, May 19, 2016 at 9:36 PM, Ilya Enkovich
>> wrote:
>>> Hi,
>>>
>>> This patch introduces new options used for loop epilogues vectorization.
>>
>> Why's that? This is a bit too much for
Hi,
On 19/05/2016 15:58, Jason Merrill wrote:
On 05/18/2016 07:13 PM, Paolo Carlini wrote:
+ error ("cannot declare variable %q+D with function type", decl);
I think the error message would be more helpful if it mentioned
decltype(auto), maybe
"initializer for % has function type, did
On Fri, May 20, 2016 at 10:59:18AM +0200, Richard Biener wrote:
> Sounds good. I will commit later with your wording.
Unfortunately, the new testcase fails e.g. on i?86-*-* or on powerpc*.
On i?86-*-* (without -msse) I actually see 2 different issues, one is
extra -Wpsabi warnings, and another is
Hi!
This is another case in the never ending story of dropping lhs of noreturn
calls when we shouldn't.
Though, in this case, while we can optimize a call to a direct call to
normal [[noreturn]] method, we can also optimize into __cxa_pure_virtual
or __builtin_unreachable. And in those cases IMH
2016-05-20 14:15 GMT+03:00 Richard Biener :
> On Fri, May 20, 2016 at 11:44 AM, Ilya Enkovich
> wrote:
>> 2016-05-20 12:24 GMT+03:00 Richard Biener :
>>> On Thu, May 19, 2016 at 9:40 PM, Ilya Enkovich
>>> wrote:
Hi,
This patch extends vectorizer cost model to include masking cost
Hi!
We ICE at -O0 while compiling the testcase below, because we don't reset
two vars that are reset in all other places in frontend-passes.c when
starting to process an unrelated statement. Without this,
we can emit some statement into a preexisting block that can be elsewhere
in the current pro
On Fri, May 20, 2016 at 01:31:22PM +0200, Jakub Jelinek wrote:
> Hi!
>
> This is another case in the never ending story of dropping lhs of noreturn
> calls when we shouldn't.
>
> Though, in this case, while we can optimize a call to a direct call to
> normal [[noreturn]] method, we can also optim
On Fri, 20 May 2016, Jakub Jelinek wrote:
> On Fri, May 20, 2016 at 10:59:18AM +0200, Richard Biener wrote:
> > Sounds good. I will commit later with your wording.
>
> Unfortunately, the new testcase fails e.g. on i?86-*-* or on powerpc*.
> On i?86-*-* (without -msse) I actually see 2 different
2016-05-20 14:17 GMT+03:00 Richard Biener :
> On Fri, May 20, 2016 at 11:50 AM, Ilya Enkovich
> wrote:
>> 2016-05-20 12:26 GMT+03:00 Richard Biener :
>>> On Thu, May 19, 2016 at 9:36 PM, Ilya Enkovich
>>> wrote:
Hi,
This patch introduces new options used for loop epilogues vector
On Fri, 20 May 2016, Jakub Jelinek wrote:
> Hi!
>
> This is another case in the never ending story of dropping lhs of noreturn
> calls when we shouldn't.
>
> Though, in this case, while we can optimize a call to a direct call to
> normal [[noreturn]] method, we can also optimize into __cxa_pure_
On Fri, May 20, 2016 at 01:41:01PM +0200, Richard Biener wrote:
> I'd say ppc and aarch64 are fine. Thanks for noticing.
So like this then?
2016-05-20 Jakub Jelinek
PR tree-optimization/29756
gcc.dg/tree-ssa/vector-6.c: Add -Wno-psabi -w to dg-options.
Add -msse2 for
On Fri, 20 May 2016, Jakub Jelinek wrote:
> On Fri, May 20, 2016 at 01:41:01PM +0200, Richard Biener wrote:
> > I'd say ppc and aarch64 are fine. Thanks for noticing.
>
> So like this then?
Yes.
Thanks,
Richard.
> 2016-05-20 Jakub Jelinek
>
> PR tree-optimization/29756
> gcc.d
Hi Vineet,
> gcc/
> 2016-05-20 Vineet Gupta
>
> * config.gcc: Remove uclibc from arc target spec
>
> -arc*-*-linux-uclibc*)
> +arc*-*-linux*)
Actually may make sense to have something like arc*-*-*linux-glibc* here (or
something of a sort) as we can properly select gcc driver configurati
On Fri, May 20, 2016 at 01:40:01PM +0200, Marek Polacek wrote:
> > + if (lhs
> > + && (gimple_call_flags (stmt) & ECF_NORETURN)
> > + && (VOID_TYPE_P (TREE_TYPE (gimple_call_fntype (stmt)))
> > + || ((TREE_CODE (TYPE_SIZE_UNIT (TREE_TY
On Fri, 20 May 2016, Jakub Jelinek wrote:
> On Fri, May 20, 2016 at 01:40:01PM +0200, Marek Polacek wrote:
> > > + if (lhs
> > > + && (gimple_call_flags (stmt) & ECF_NORETURN)
> > > + && (VOID_TYPE_P (TREE_TYPE (gimple_call_fntype (stmt)))
> > > +
On Fri, May 20, 2016 at 01:59:48PM +0200, Jakub Jelinek wrote:
> On Fri, May 20, 2016 at 01:40:01PM +0200, Marek Polacek wrote:
> > > + if (lhs
> > > + && (gimple_call_flags (stmt) & ECF_NORETURN)
> > > + && (VOID_TYPE_P (TREE_TYPE (gimple_call_fntype (stmt)))
Hi Thomas,
On 19/05/16 17:10, Thomas Preudhomme wrote:
On Wednesday 18 May 2016 11:47:47 Kyrill Tkachov wrote:
Hi Thomas,
Hi Kyrill,
Please find below the updated patch and associated ChangeLog entry.
*** gcc/ChangeLog ***
2016-05-18 Thomas Preud'homme
* config/arm/arm.h (TARGE
On Friday 20 May 2016 05:28 PM, Claudiu Zissulescu wrote:
> Hi Vineet,
>
>> gcc/
>> 2016-05-20 Vineet Gupta
>>
>> * config.gcc: Remove uclibc from arc target spec
>>
>> -arc*-*-linux-uclibc*)
>> +arc*-*-linux*)
> Actually may make sense to have something like arc*-*-*linux-glibc* here (or
>
Hi,
this patch re-applies the idx_infer_loop_bounds. With fix to the
tree-vect-loop.c
change there should be no performance regressions. Prefetch-5.c testcase still
changes
and I will send patch adding likely upper bounds shortly to handle this one.
Bootstrapped/regtested x86_64-linux, comitted.
Hi,
this patch makes array_at_struct_end_p to not give up at MEM_REF as discussed
on IRC few weeks back. This happens a lot for Fortran testcases.
I am bootstrapping/regtesteing x86_64-linux and intend to commit it as obvoius.
We sill miss a lot of upper bound for fortran code because we can not l
Hi,
this patch makes expected_loop_iterations to be bit saner in coner cases.
First expected_loop_iterations currently return 0 when
-fguess-branch-probabiliteis is off and also in case the frequencies are
downscaled to 0.
Originally the function was intended to be used only for loops with profile
Hi!
The nvptx maintainer Bernd, Nathan: can you take it from here, or should
I continue to figure it out?
On Fri, 20 May 2016 11:28:25 +0200, I wrote:
> > > > * function.c (make_epilogue_seq): Remove epilogue_end parameter.
> > > > (thread_prologue_and_epilogue_insns): Remove bb_flags. Restructu
Hi Thomas,
On 17/05/16 11:14, Thomas Preudhomme wrote:
Ping?
*** gcc/ChangeLog ***
2015-11-13 Thomas Preud'homme
* config/arm/arm.c (arm_print_operand_punct_valid_p): Make %? valid
for Thumb-1.
* config/arm/arm.h (TARGET_HAVE_CBZ): Define.
(TARGET_IDIV):
On Fri, 20 May 2016, Jan Hubicka wrote:
> Hi,
> this patch makes array_at_struct_end_p to not give up at MEM_REF as discussed
> on IRC few weeks back. This happens a lot for Fortran testcases.
> I am bootstrapping/regtesteing x86_64-linux and intend to commit it as
> obvoius.
>
> We sill miss a
Hi,
The below patch adds support for MIPS P6600 CPU.
This patch will go in after the approval of the Binutils patch.
Tested with mips-img-linux-gnu.
Regards,
Robert
2016-05-20 Matthew Fortune
Prachi Godbole
* config/mips/mips-cpus.def: Add definition for p6600.
Hi Christophe,
On 19/05/16 12:54, Christophe Lyon wrote:
On 13 May 2016 at 16:47, James Greenhalgh wrote:
On Fri, May 13, 2016 at 04:41:33PM +0200, Christophe Lyon wrote:
On 13 May 2016 at 16:37, James Greenhalgh wrote:
On Wed, May 11, 2016 at 03:23:56PM +0200, Christophe Lyon wrote:
2016-
Hi Eric,
On 16/05/16 09:40, Eric Botcazou wrote:
Hi,
-fstack-usage issues the "not supported by this target" warning on naked
functions because the prologue routines do an early return for them.
Tested on arm-eabi, may I apply it on all active branches?
2016-05-16 Eric Botcazou
*
Richard Biener writes:
> The following patch adds BIT_FIELD_INSERT, an operation to
> facilitate doing bitfield inserts on registers (as opposed
> to currently where we'd have a BIT_FIELD_REF store).
I wonder if these patches would make it easier to use the Haswell
bit manipulations instructions
Hi,
The patch fixes an ICE when the compiler tries to split an instruction.
Test attached.
No regression. Ok to apply?
Regards,
Robert
gcc/
2016-05-20 Andrew Bennett
* config/mips/mips.c (mips_constant_pool_symbol_in_sdata_p): New
function.
(mips_output_move): Copy
On 05/20/16 09:21, Thomas Schwinge wrote:
Hi!
The nvptx maintainer Bernd, Nathan: can you take it from here, or should
I continue to figure it out?
What is the defect?
Hi,
The patch changes the default behaviour of the direction in which
the local frame grows for MIPS16.
The code size reduces by about 0.5% in average case for -Os, hence,
it is good to turn the option on by default.
Ok to apply?
Regards,
Robert
gcc/
2016-05-20 Matthew Fortune
* c
On Fri, May 13, 2016 at 8:00 AM, H.J. Lu wrote:
> On Thu, May 12, 2016 at 10:54 AM, H.J. Lu wrote:
Here is a patch to add
-mgeneral-regs-only option to x86 backend. We can update
spec for interrupt handle to recommend compiling interrupt handler
with -mgeneral-regs-only opti
On Mon, May 9, 2016 at 5:52 AM, H.J. Lu wrote:
> On Mon, May 2, 2016 at 6:46 AM, H.J. Lu wrote:
>> On Mon, Apr 25, 2016 at 1:36 PM, H.J. Lu wrote:
>>> If x86 libgomp isn't compiled with -march=i486 or better, append
>>> -march=i486 XCFLAGS for x86 libgomp build.
>>>
>>> Tested on i686 with and w
Hi,
If -mdsp option is used then adding -mno-imadd has no effect on the code
generation. This appears to be slightly inconsistent to the -m[no-]imadd option
we have.
Any potential problems/comments? Ok to commit?
Regards,
Robert
gcc/
* config/mips/mips.c (mips_option_override): Move DS
On Thu, 21 Apr 2016, Nathan Sidwell wrote:
> On 04/20/16 12:59, Alexander Monakov wrote:
> > This patch implements per-warp compiler-defined stacks under -msoft-stack
> > option, and implements alloca on top of that. In a few obvious places,
> > changes from -muniform-simt patch are present in the
On Fri, 20 May 2016, Andi Kleen wrote:
Richard Biener writes:
The following patch adds BIT_FIELD_INSERT, an operation to
facilitate doing bitfield inserts on registers (as opposed
to currently where we'd have a BIT_FIELD_REF store).
I wonder if these patches would make it easier to use the
On 05/20/2016 07:17 AM, Paolo Carlini wrote:
The below passes testing. There are a few minor changes wrt your
suggestions (I think we want & as hint;
I disagree; if what the user wanted was a function pointer, there's no
reason to use decltype(auto) over plain auto. Much more likely that
the
vectorizable_load had a curious "force_peeling" variable, with no
comment explaining why we need it for single-element interleaving
but not for other cases. I think it's simply because we weren't
initialising the GROUP_GAP correctly for single loads.
Tested on aarch64-linux-gnu and x86_64-linux-g
vectorizable_load forces peeling for gaps if the vectorisation factor
is not a multiple of the group size, since in that case we'd normally load
beyond the original scalar accesses but drop the excess elements as part
of a following permute:
if (loop_vinfo
&& ! STMT_VINFO_STRIDED_P
The vectorizable_* routines had many instances of:
slp_node || PURE_SLP_STMT (stmt_info)
which gives the misleading impression that we can have
!slp_node && PURE_SLP_STMT (stmt_info). In this context
it's really enough to test slp_node on its own.
There are three cases:
loop vectorisatio
On Fri, May 20, 2016 at 10:47:19AM -0400, Nathan Sidwell wrote:
> On 05/20/16 09:21, Thomas Schwinge wrote:
> >Hi!
> >
> >The nvptx maintainer Bernd, Nathan: can you take it from here, or should
> >I continue to figure it out?
>
> What is the defect?
I have a fix, testing now.
Segher
Hi,
On 20/05/2016 17:24, Jason Merrill wrote:
On 05/20/2016 07:17 AM, Paolo Carlini wrote:
The below passes testing. There are a few minor changes wrt your
suggestions (I think we want & as hint;
I disagree; if what the user wanted was a function pointer, there's no
reason to use decltype(au
On Fri, May 13, 2016 at 5:00 PM, H.J. Lu wrote:
> On Thu, May 12, 2016 at 10:54 AM, H.J. Lu wrote:
Here is a patch to add
-mgeneral-regs-only option to x86 backend. We can update
spec for interrupt handle to recommend compiling interrupt handler
with -mgeneral-regs-only opti
On Fri, May 20, 2016 at 05:11:59PM +0200, Marc Glisse wrote:
> On Fri, 20 May 2016, Andi Kleen wrote:
>
> >Richard Biener writes:
> >
> >>The following patch adds BIT_FIELD_INSERT, an operation to
> >>facilitate doing bitfield inserts on registers (as opposed
> >>to currently where we'd have a BI
On Fri, May 20, 2016 at 08:54:39AM -0700, Andi Kleen wrote:
> I thought I had filed a bugzilla at some point, but can't
> find it right now. If you compare bitfield code
> compiled for Haswell on LLVM and GCC it is very visible
> how much worse gcc is.
We really need to lower bitfield operations (
Hi!
This patch turns on implicit firstprivate for scalars (unless
defaultmap(tofrom: scalar) is present) for !$omp target, and assorted fixes
so that the testsuite passes again.
Tested on x86_64-linux, committed to branch.
2016-05-20 Jakub Jelinek
gcc/
* langhooks.h (struct lang_hook
Hi!
While working on this patch, I've noticed the need to do:
On Fri, May 20, 2016 at 06:12:44PM +0200, Jakub Jelinek wrote:
> * varpool.c (varpool_node::get_create): Set node->offloading
> even for DECL_EXTERNAL decls.
...
> --- gcc/varpool.c.jj 2016-05-04 18:43:25.0 +0200
>
On 05/13/2016 09:00 AM, H.J. Lu wrote:
I changed it to
---
@item -mgeneral-regs-only
@opindex mgeneral-regs-only
Generate code that uses only the general-purpose registers. This
prevents the compiler from using floating-point, vector, mask and bound
registers.
---
Here is the updated patch.
On 05/20/2016 09:09 AM, Alexander Monakov wrote:
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d281975..f0331e2 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -19341,6 +19341,18 @@ offloading execution.
Apply partitioned execution optimizations. This is the defau
On Thu, May 19, 2016 at 11:53:52AM -0400, Jason Merrill wrote:
> Why implement this in the front end rather than at the gimple level?
I was afraid that I wouldn't have as good a location info as in the FE and
I wasn't sure if I'd be able to handle declarations well.
Now that I've rewritten this t
On 05/20/2016 12:36 PM, Marek Polacek wrote:
PR c/49859
* c.opt (Wswitch-unreachable): New option.
This should go in common.opt, since the flag variable is used in
language-independent code. OK with that change.
Jason
Hi David,
On 17/05/16 23:01, David Malcolm wrote:
This patch moves part of the logic for determining if tail
call optimizations are possible to a new helper function.
There are no functional changes.
expand_call is 1300 lines long, so there's arguably a
case for doing this on its own, but this
On Fri, 20 May 2016, Andi Kleen wrote:
On Fri, May 20, 2016 at 05:11:59PM +0200, Marc Glisse wrote:
On Fri, 20 May 2016, Andi Kleen wrote:
Richard Biener writes:
The following patch adds BIT_FIELD_INSERT, an operation to
facilitate doing bitfield inserts on registers (as opposed
to current
"H.J. Lu" writes:
> On Thu, May 12, 2016 at 10:54 AM, H.J. Lu wrote:
Here is a patch to add
-mgeneral-regs-only option to x86 backend. We can update
spec for interrupt handle to recommend compiling interrupt handler
with -mgeneral-regs-only option and add a note for compile
2016-05-20 Uros Bizjak
* gcc/config/i386/i386.c (ix86_rtx_costs) :
Use IS_STACK_MODE when calculating cost of standard 80387 constants.
Fallthru to CONST_VECTOR case to calculate cost of standard SSE
constants.
: Calculate cost of (MEM (SYMBOL_REF)).
(ix86_legitimate_con
On Fri, May 20, 2016 at 10:15 AM, Rainer Orth
wrote:
> "H.J. Lu" writes:
>
>> On Thu, May 12, 2016 at 10:54 AM, H.J. Lu wrote:
> Here is a patch to add
> -mgeneral-regs-only option to x86 backend. We can update
> spec for interrupt handle to recommend compiling interrupt handler
>>
Hi Jakub,
We ICE at -O0 while compiling the testcase below, because we don't reset
two vars that are reset in all other places in frontend-passes.c when
starting to process an unrelated statement. Without this,
we can emit some statement into a preexisting block that can be elsewhere
in the cu
Hi!
In some cases the i387 version of a math function may be inlined from math.h,
and the testcase (like gcc.target/i386/sse4_1-ceil-vec.c) will actually test
inlined asm instead of vectorized builtin. To fix this I've created a new file
gcc.dg/mathfunc.h (similar to gcc.dg/strlenopt.h) and chang
On 2016-05-18 2:20 AM, Jakub Jelinek wrote:
On Tue, May 17, 2016 at 08:31:00PM -0400, John David Anglin wrote:
>r235550 introduced the use of long long, and the macros LLONG_MIN and
LLONG_MAX. These macros
>are not defined by default and we need to include when compiling
with c++ to define t
On May 20, 2016 4:58:47 PM GMT+02:00, Robert Suchanek
wrote:
s/splots/slots/
thanks,
This patch changes some of the dejagnu options to better restrict
where the test cases run so that they will no longer cause failures on
power7 machines.
Based on a subsequent patch I also updated the code formatting (indentation,
etc.) for the code from the original patch (r235577) in both the te
While analysing this bug we arrived to the following code at
tree.c:145 (lvalue_kind):
case VAR_DECL:
if (TREE_READONLY (ref) && ! TREE_STATIC (ref)
&& DECL_LANG_SPECIFIC (ref)
&& DECL_IN_AGGR_P (ref))
return clk_none;
That condition fails so a fall-through to the next c
On Fri, 2016-05-20 at 18:03 +0100, Kyrill Tkachov wrote:
[...snip...]
> REG_PARM_STACK_SPACE is not defined on arm, which makes
> reg_parm_stack_space
> unused in this function and so breaks bootstrap on arm.
> Can you please add an ATTRIBUTE_UNUSED to reg_parm_stack_space?
>
> Thanks,
> Kyrill
[.
On Fri, May 20, 2016 at 01:35:15PM -0500, Bill Seurer wrote:
> This patch changes some of the dejagnu options to better restrict
> where the test cases run so that they will no longer cause failures on
> power7 machines.
>
> Based on a subsequent patch I also updated the code formatting (indentati
On Tue, 2016-05-17 at 18:49 -0400, Trevor Saunders wrote:
> On Tue, May 17, 2016 at 06:01:32PM -0400, David Malcolm wrote:
> > This implements the libgccjit support for must-tail-call via
> > a new:
> > gcc_jit_rvalue_set_bool_require_tail_call
> > API entrypoint.
>
> It seems to me like that's
(reposting in gcc@ and adding more information)
On Fri, May 20, 2016 at 3:43 PM, Andres Tiraboschi
wrote:
> While analysing this bug we arrived to the following code at
> tree.c:145 (lvalue_kind):
>
> case VAR_DECL:
> if (TREE_READONLY (ref) && ! TREE_STATIC (ref)
> && DECL_LANG_S
On May 20, 2016 6:08:34 PM GMT+02:00, Jakub Jelinek wrote:
>On Fri, May 20, 2016 at 08:54:39AM -0700, Andi Kleen wrote:
>> I thought I had filed a bugzilla at some point, but can't
>> find it right now. If you compare bitfield code
>> compiled for Haswell on LLVM and GCC it is very visible
>> how
On 05/20/16 11:09, Alexander Monakov wrote:
This patch implements '-msoft-stack' code generation variant for NVPTX. The
goal is to avoid relying on '.local' memory space for placement of automatic
data, and instead have an explicitely-maintained stack pointer (which can be
set up to point to pr
This patch stops us unconditionally setting the toplevel-reorder flag. It's
mostly needed but a couple of testcase rely on it being unset. Those now pass.
Also force -fno-common, unless explicitly specified. As the comment says, we
fudge common by using .weak, and that's not quite the right
On 05/20/2016 04:36 AM, Jakub Jelinek wrote:
> Hi!
>
> We ICE at -O0 while compiling the testcase below, because we don't reset
> two vars that are reset in all other places in frontend-passes.c when
> starting to process an unrelated statement. Without this,
> we can emit some statement into a p
On 05/20/2016 01:18 PM, Daniel Gutson wrote:
(reposting in gcc@ and adding more information)
On Fri, May 20, 2016 at 3:43 PM, Andres Tiraboschi
wrote:
While analysing this bug we arrived to the following code at
tree.c:145 (lvalue_kind):
case VAR_DECL:
if (TREE_READONLY (ref) && ! T
When working on the constexpr machinery for gcc 6, I noticed a couple of cleanup
opportunities.
1) cxx_bind_parameters_in_call contains 'if (cond) goto x; ... x:;', which can
easily be rewritten to 'if (!cond) { ...}'
2) a which vs that grammar error.
applied to trunk.
nathan
2016-05-20 Na
On 05/19/2016 05:11 PM, Jeff Law wrote:
[ ... ]
This is a bit of a mess and I think the code
needs some TLC before we start hacking it up further.
Let's start with clean up of dead code:
/* We will need to ensure that the address we return is aligned to
REQUIRED_ALIGN. If STACK_DYNAMIC_O
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