Re: Fix regrename compare-debug issue

> When scanning addresses inside a debug insn, we shouldn't use normal > base/index classes. This shows as a compare-debug issue on Alpha, where > INDEX_REG_CLASS is NO_REGS, and this prevented a chain from being > renamed with debugging turned on. > > Uros has reported that this patch resolves th

Re: Enabling -frename-registers?

On Wed, May 4, 2016 at 4:20 PM, Wilco Dijkstra wrote: > Bernd Schmidt wrote: >> On 05/04/2016 03:25 PM, Ramana Radhakrishnan wrote: >>> On ARM / AArch32 I haven't seen any performance data yet - the one place we >>> are concerned >>> about the impact is on Thumb2 code size as regrename may end up

Re: [Patch AArch64] Fix PR target/63874

On Thu, Mar 31, 2016 at 2:11 PM, Ramana Radhakrishnan wrote: > Hi, > > In this PR we have a situation where we aren't really detecting > weak references vs weak definitions. If one has a weak definition > that binds locally there's no reason not to put out PC relative > relocations. > > Ho

Re: [PATCH] Handle also switch for -Wdangling-else

On Wed, May 04, 2016 at 09:54:29PM +0200, Jakub Jelinek wrote: > Hi! > > This patch let us warn about danling else even if there is a switch > without {}s around the body. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-04 Jakub Jelinek > > * c-pars

[PATCH] MIPS: In mips_print_address_operand pass the mode argument to mips_classify_address

Hi, Currently the mips_print_operand_address function ignores its mode argument, and when it calls mips_classify_address it forces the mode argument to be the machine's word mode. This patch makes mips_print_operand_address pass the mode argument provided to it to mips_classify_address, so tha

RE: [PATCH] MIPS: Ensure that lo_sums do not contain an unaligned symbol

Hi Andrew, Thanks for working on this it is a painful area. There's a bit more to do but this is cleaning up some sneaky bugs. Can you create a GCC bugzilla entry if you haven't already as we should record where these bugs exist and when they are fixed? See my comments but I think that you are

Re: [PATCH] Some further XMM16+ improvements

Hi Jakub, On 03 May 20:57, Jakub Jelinek wrote: > Hi! > > This patch improves code generation e.g. on the first attached testcase > and allows accepting the second one. > > I've noticed we don't allow TFmode or V1TImode in xmm16+ regs at all, > while they are allowed in xmm0-xmm15, so IMHO should

Re: [PATCH] Some further XMM16+ improvements

On Thu, May 05, 2016 at 12:49:57PM +0300, Kirill Yukhin wrote: > Hi Jakub, > On 03 May 20:57, Jakub Jelinek wrote: > > This patch improves code generation e.g. on the first attached testcase > > and allows accepting the second one. > > > > I've noticed we don't allow TFmode or V1TImode in xmm16+ r

Re: [PATCH] Improve _fmadd__mask3

Hello Jakub, On 04 May 21:31, Jakub Jelinek wrote: > Hi! > > As the testcase can show, we should be using v constraint and generate > better code that way. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-05-04 Jakub Jelinek > > * config/i386/sse.md (_f

Re: [patch] libstdc++/69703 ignore endianness in codecvt_utf8

On 04/05/16 17:19 +0100, Andre Vieira (lists) wrote: On 20/04/16 18:40, Jonathan Wakely wrote: On 19/04/16 19:07 +0100, Jonathan Wakely wrote: This was reported as a bug in the Filesystem library, but it's actually a problem in the codecvt_utf8 facet that it uses. The fix had a silly typo mea

Re: [PATCH] Some further XMM16+ improvements

On 05 May 11:56, Jakub Jelinek wrote: > On Thu, May 05, 2016 at 12:49:57PM +0300, Kirill Yukhin wrote: > > Hi Jakub, > > On 03 May 20:57, Jakub Jelinek wrote: > > > This patch improves code generation e.g. on the first attached testcase > > > and allows accepting the second one. > > > > > > I've n

Re: [C++ PATCH] PR c++/69855

.. minor nit: the new testcase has a number of trailing blank lines. Paolo.

Re: [PATCH] Some further XMM16+ improvements

On Thu, May 05, 2016 at 01:34:07PM +0300, Kirill Yukhin wrote: > > So, is the patch ok for trunk with the two testcases turned into > > dg-do assemble tests, or do you want me to repost with that, or add the > > Yv constraint right away, something else? > Nope. Patch is pre-OK. Thanks! Actually, i

Re: [PATCH] Improve _fmadd__mask3

On Thu, May 05, 2016 at 01:01:39PM +0300, Kirill Yukhin wrote: > Hello Jakub, > On 04 May 21:31, Jakub Jelinek wrote: > > Hi! > > > > As the testcase can show, we should be using v constraint and generate > > better code that way. > > > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok

[PATCH][ARM] PR target/70830: Avoid POP-{reglist}^ when returning from interrupt handlers

Hi all, In this PR we deal with some fallout from the conversion to unified assembly. We now end up emitting instructions like: pop {r0,r1,r2,r3,pc}^ which is not legal. We have to use an LDM form. There are bugs in two arm.c functions: output_return_instruction and arm_output_multireg_pop.

RE: [PATCH] MIPS: In mips_print_address_operand pass the mode argument to mips_classify_address

Andrew Bennett writes: > gcc/ > * config/mips/mips.c (mips_print_operand_address): Pass the mode > argument to > mips_classify_address. Changelog content should wrap at 74 chars. > I have tested the patch on the mips-mti-elf toolchain and there have > been no regressions. OK, if a l

Re: [PATCH] Improve _fmadd__mask3

On 05 May 13:33, Jakub Jelinek wrote: > On Thu, May 05, 2016 at 01:01:39PM +0300, Kirill Yukhin wrote: > > Hello Jakub, > > On 04 May 21:31, Jakub Jelinek wrote: > > > Hi! > > > > > > As the testcase can show, we should be using v constraint and generate > > > better code that way. > > > > > > B

[PATCH, i386, AVX-512] Fix sse-14.c (Intel assembly)

Hello, The attached patch fixes sse-14.c to compile with -masm=intel. Bootstrapped. No regressions detected. Please have a look. Is it ok for trunk? 2016-05-05 Petr Murzin gcc/ * config/i386/sse.md: Use proper operand modifiers. * config/i386/i386.c (ix86_print_operand): Expa

Re: Enabling -frename-registers?

Ramana Radhakrishnan wrote: > > Can you file a bugzilla entry with a testcase that folks can look at please ? I created https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70961. Unfortunately I don't have a simple testcase that I can share. Wilco

Re: [C++ PATCH] PR c++/69855

On 5 May 2016 at 13:36, Paolo Carlini wrote: > .. minor nit: the new testcase has a number of trailing blank lines. New patch attached. :) 69855.diff5 Description: Binary data

Re: [PING][PATCH] New plugin event when evaluating a constexpr call

Hi, thanks for the feedback, I'll do the changes. 2016-05-04 13:16 GMT-03:00 Jason Merrill : > On 05/02/2016 03:28 PM, Andres Tiraboschi wrote: >> >> + constexpr_call_info call_info; >> + call_info.function = t; >> + call_info.call_stack = call_stack; >> + call_info.ctx = ctx; >> + call_info.

Re: [PATCH #3], Fix _Complex when there are multiple FP types the same size

On Mon, May 02, 2016 at 05:10:24PM -0400, Michael Meissner wrote: > [gcc/fortran] > 2016-05-02 Michael Meissner > > * trans-types.c (gfc_build_complex_type): Something missing above... Jakub

[committed] Improve gfc_match_omp_clauses

Hi! Before trying to add another 11 new clauses (for OpenMP 4.5), I've realized that we already have way too many to try to match all of them each time; while the matchers are guarded with mask & something, for >= 58 clauses even that is just not too effective and hardly readable as well. So, thi

Re: Improve pure/const propagation across interposable function with non-interposable aliases

Hi Jan, > * gcc.dg/ipa/pure-const-3.c: New testcase. the testcase FAILs: UNRESOLVED: gcc.dg/ipa/pure-const-3.c scan-ipa-dump pure-const "found to be const" The log shows gcc.dg/ipa/pure-const-3.c: dump file does not exist The following patch fixes this. Tested with the appropriate run

Missing pointer dereference in tree-affine.c

wide_int_constant_multiple_p used: if (*mult_set && mult != 0) return false; to check whether we had previously seen a nonzero multiple, but "mult" is a pointer to the previous value rather than the previous value itself. Noticed by inspection while working on another patch, so I d

Fix handling of negative bitpos in expand_debug_expr

expand_debug_expr handled negative bit positions using: else if (bitpos < 0) { HOST_WIDE_INT units = (-bitpos + BITS_PER_UNIT - 1) / BITS_PER_UNIT; op0 = adjust_address_nv (op0, mode1, units); bitpos += uni

Re: [PATCH] Better location info for "incomplete type" error msg (PR c/70756)

On Wed, May 04, 2016 at 11:52:39AM -0400, Jason Merrill wrote: > On Wed, May 4, 2016 at 9:00 AM, Marek Polacek wrote: > > On Tue, May 03, 2016 at 08:05:47PM -0400, Jason Merrill wrote: > >> Looks good. > >> > >> But I don't see a C++ testcase; can the test go into c-c++-common? > > > > Sadly, no.

Re: Inline across -ffast-math boundary

Richard Biener writes: >> >> This new testcase does not pass on bare-metal configs (using newlib), >> >> because: >> >> warning: implicit declaration of function 'isnanf' >> >> [-Wimplicit-function-declaration] >> >> warning: incompatible implicit declaration of built-in function 'isnanf' >> >> >

[v3] Enable dg-reqire-sharedlib on Solaris

I happened to notice that dg-require-sharedlib hardcodes the targets that shared library, and Solaris is missing. Fixed with the following patch. Bootstrapped on i386-pc-solaris2.12, the affected testcases now PASS. Ok for mainline? Rainer 2016-05-04 Rainer Orth * testsuite

[patch] Coalesce in more cases

Hi, gimple_can_coalesce_p is rather picky about the conditions under which SSA names can be coalesced. In particular, when it comes to the type, it's: /* Now check the types. If the types are the same, then we should try to coalesce V1 and V2. */ tree t1 = TREE_TYPE (name1); tree t

RE: [PATCH 1/4] [MIPS] Add support for MIPS SIMD Architecture (MSA)

Hi Matthew, Revised patch attached. Tested with mips-img-linux-gnu and bootstrapped x86_64-unknown-linux-gnu. > > mips_gen_const_int_vector > This should use gen_int_for_mode instead of GEN_INT to avoid the issues that > msa_ldi is > trying to handle. gen_int_mode cannot be used to generate a v

[PATCH PR70935, Regression 6,7]

Hi All, Here is a simple patch which cures the problem with nonlegal transformation of endless loop. THe fix is simply check that guard edge destination is not loop latch block. Bootstrapping and regression testing did not show any new failures. Is it OK for trunk? ChangeLog: 2016-05-05 Yuri Ru

[PATCH PR57206]Add test since the PR is fixed by patch to PR48052

Hi, This patch adds a test for PR57206. The issue itself is long fixed by patch to PR48052. Test on x86_64. It's an obvious change, applied on trunk. Thanks bin gcc/testsuite/ChangeLog 2016-05-04 Bin Cheng PR tree-optimization/57206 * gcc.dg/vect/pr57206.c: New test.diff -

Re: Enabling -frename-registers?

On May 5, 2016, at 6:00 AM, Wilco Dijkstra wrote: > > Ramana Radhakrishnan wrote: >> >> Can you file a bugzilla entry with a testcase that folks can look at please ? > > I created https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70961. Unfortunately > I don't have a simple testcase that I can share

[PATCH,rs6000] Add built-in support for new Power9 darn (deliver a random number) instruction

This patch adds built-in function support for the Power9 darn instruction. I have bootstrapped and tested on both powerpc64le-unknown-linux-gnu and powerpc64-unknown-linux-gnu with no regressions. Is this ok for trunk and for backpatching to ???. Thanks, Kelvin gcc/testsuite/ChangeLog: 2016-

Re: [v3] Enable dg-reqire-sharedlib on Solaris

On 05/05/16 16:36 +0200, Rainer Orth wrote: I happened to notice that dg-require-sharedlib hardcodes the targets that shared library, and Solaris is missing. Fixed with the following patch. Bootstrapped on i386-pc-solaris2.12, the affected testcases now PASS. Ok for mainline? Looks good - OK,

[PATCH] Make basic asm implicitly clobber memory

Hi! this patch is inspired by recent discussion about basic asm: Currently a basic asm is an instruction scheduling barrier, but not a memory barrier, and most surprising, basic asm does _not_ implicitly clobber CC on targets where extended asm always implicitly clobbers CC, even if nothing is in

Re: [PATCH], Add PowerPC ISA 3.0 vector d-form addressing

On Wed, May 04, 2016 at 11:16:52AM -0500, Segher Boessenkool wrote: > Hi Mike, > > On Tue, May 03, 2016 at 06:39:55PM -0400, Michael Meissner wrote: > > With this patch, I enable -mlra if the user did not specify either -mlra or > > -mno-lra on the command line, and -mcpu=power9 or -mpower9-dform-

[PATCH], Add PowerPC ISA 3.0 min/max support

This patch was originally meant for GCC 6.x, but the stage3 submission window closed before I could submit this patch. This patch adds support for the new ISA 3.0 instructions for doing min, max, and comparison. Unlike the existing XSMINDP and XSMAXDP instructions, the new XSMINCDP and XSMAXCDP i

[PATCH, i386]: Change true_regnum to REGNO in peephole2 and post-reload splitters

Hello! There is no point to determine regno of register operand using true_regnum in peephole2s and post-reload splitters. REGNO can be used instead. 2016-05-05 Uros Bizjak * config/i386/i386.md (peehole2 patterns): Change true_regnum to REGNO in all peephole2 patterns. (post-relo

Re: [PATCH,rs6000] Add built-in support for new Power9 darn (deliver a random number) instruction

On May 5, 2016 6:26:01 PM GMT+02:00, Kelvin Nilsen wrote: >+ /* Handle simple no-argument operations. */ >+ d = bdesc_0arg; >+ for (i = 0; i < ARRAY_SIZE (bdesc_0arg); i++, d++) >+if (d->code == fcode) >+ return rs6000_expand_zeroop_builtin (d->icode, target); >+ >+ gcc_assert (fals

[PATCHv2,rs6000] Add built-in support for new Power9 darn (deliver a random number) instruction

This patch adds built-in function support for the Power9 darn instruction. This patch and ChangeLog is identical to one I sent earlier today. I have now completed additional testing and made a few changes to my description. I have bootstrapped and tested this patch against the trunk and agains

[PATCH, ARM] use vmov.i64 to load 0 into FP reg if neon enabled

For this simple testcase double sub (void) { return 0.0; } Without the attached patch, an ARM compiler with neon support enabled, gives vldr.64 d0, .L2 With the attached patch, an ARM compiler with neon enabled, gives vmov.i64 d0, #0@ float which is faster and smaller, as there is no

[PATCH, i386]: Fix too broad (mem,reg)->(const,reg) splitters

Hello! This patch fixes a bunch of too broad (mem,reg)->(const,reg) splitters, that block other similar splitters. The solution is to check, if the splitter will transform the insn in the splitter condition, instead of using FAIL in the splitter preparation statements. 2016-05-06 Uros Bizjak

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

Hi, I've worked on applying the changes that have been commented in several messages from this thread. Find the patch and changelog attached. On 16-04-29 09:17:44, Jakub Jelinek wrote: > First of all, using error instead of fatal_error achieves just that too, > except that it allows also detecti

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

On 16-04-29 09:17:44, Jakub Jelinek wrote: > > Bernd: I'll see if I can prepare a testcase; first I need to get > > familiar with the testing framework and learn how to set environment > > variables in tests. Any tips on that will be really welcome! > > grep for dg-set-target-env-var in various t

Fix for PR68159 in Libiberty Demangler (6)

Hi, This patches fixes * the stack overflow reported in PR68159 in cplus_demangle_print_callback, * a potential stack overflow in d_demangle_callback * a potential stack overflow in is_ctor_or_dtor, and * six potential buffer overflows (initialise less memory than needed due to integer overflow)

[RS6000] complex long double ABI_V4 fix

Revision 235792 regressed compat/scalar-by-value-6 for powerpc-linux -m32 due to accidentally changing the ABI. By another historical accident, complex long double is stupidly passed in gprs for -m32. Bootstrapped and regression tested powerpc64-linux. Also fixes gfortran.dg/{large_real_kind_2.F

Re: Allow embedded timestamps by C/C++ macros to be set externally (3)

Eduard Sanou writes: > diff --git a/gcc/c-family/c-common.h b/gcc/c-family/c-common.h > index 1714284..dea2900 100644 > --- a/gcc/c-family/c-common.h > +++ b/gcc/c-family/c-common.h > @@ -1086,6 +1086,16 @@ extern vec *make_tree_vector_copy (const > vec *); > c_register_builtin_type. */ >

Re: [RS6000] complex long double ABI_V4 fix

On Fri, May 06, 2016 at 03:54:43PM +0930, Alan Modra wrote: > Revision 235792 regressed compat/scalar-by-value-6 for powerpc-linux Sorry, typo in the revision. Should be 235794, git 3c62cae0. -- Alan Modra Australia Development Lab, IBM

Re: [PATCH] Make basic asm implicitly clobber memory

On 5/5/2016 10:29 AM, Bernd Edlinger wrote: Hi! this patch is inspired by recent discussion about basic asm: Currently a basic asm is an instruction scheduling barrier, but not a memory barrier, and most surprising, basic asm does _not_ implicitly clobber CC on targets where extended asm always