[PATCH] [AArch64] support -mfentry feature for arm64

From: Jiangjiji * gcc/config/aarch64/aarch64.opt: Add a new option. * gcc/config/aarch64/aarch64.c: Add some new functions and Macros. * gcc/config/aarch64/aarch64.h: Modify PROFILE_HOOK and FUNCTION_PROFILER. Signed-off-by: Jiangjiji Signed-off-by: Li Bin --- gcc/config/aarch64/aarch64.c |

[PATCH] [AArch64] support -mfentry feature for arm64

As ARM64 is entering enterprise world, machines can not be stopped for some critical enterprise production environment, that is, live patch as one of the RAS features is increasing more important for ARM64 arch now. Now, the mainstream live patch implementation which has been merged in Linux kerne

Re: [PATCH][GCC 7] Fix PR70171

On Fri, 11 Mar 2016, Eric Botcazou wrote: > > The following teaches phiprop to handle the case of aggregate copies > > where the aggregate has non-BLKmode which means it is very likely > > expanded as reg-reg moves (any better test for that apart from > > checking for non-BLKmode?). > > !aggreg

Re: [PATCH, PR70045] Unshare create_empty_if_region_on_edge argument

On Fri, 11 Mar 2016, Sebastian Pop wrote: > On Fri, Mar 11, 2016 at 9:14 AM, Tom de Vries > wrote: > > > Hi, > > > > this patch fixes PR70045, a graphite 6 regression. > > > > The problem is as follows: in graphite_create_new_loop_guard, a condition > > cond_expr is constructed using an upper bo

Various selective scheduling fixes

Hello, In this thread I will be posting the patches for the fixed selective scheduling PRs (except the one that was already kindly checked in by Jeff). The patches were tested both on x86-64 and ia64 with the following combination: 1) the usual bootstrap/regtest, which only utilizes sel-sched

[01/05] Fix PR 64411

Hello, In this case, we get an inconsistency between the sched-deps interface, saying we can't move an insn writing the si register through a vector insn, and the liveness analysis, saying we can. The latter doesn't take into account implicit_reg_pending_clobbers set calculated in sched-deps

[02/05] Fix PR 63384

Hello, Here we're looping because we decrease the counter of the insns we still can issue on a DEBUG_INSN thus rendering the counter negative. The fix is to not count debug insns in the corresponding code. The selective scheduling is known to spoil the result of var tracking, but still it is

[03/05] Fix PR 66660

Hello, We speculate an insn in the PR but we do not make a check for it though we should. The thing that broke this was the fix for PR 45472. In that pr, we have moved a volatile insn too far up because we failed to merge the bits describing its volatility when we have processed a control fl

[04/05] Fix PR 69032

Hello, We fail to find the proper seqno for the fresh bookkeeping copy in this PR. The problem is that in get_seqno_by_preds we are iterating over bb from the given insn backwards up to the first bb insn. We skip the initial insn when iterating over bb, yet we should take seqno from it. Th

[05/05] Fix PR 69102

Hello, The problem here is readonly dependence contexts in selective scheduler. We're trying to cache the effect of initializing a dependence context with remembering that context and setting a readonly bit on it. When first moving the insn 43 with REG_ARGS_SIZE note through the insn 3 (a sim

Re: [PATCH] PR69195, Reload confused by invalid reg equivs

On Sat, Mar 12, 2016 at 6:07 PM, Jeff Law wrote: > On 03/12/2016 04:10 AM, Richard Biener wrote: >> >> On March 12, 2016 10:29:40 AM GMT+01:00, Jakub Jelinek >> wrote: >>> >>> On Sat, Mar 12, 2016 at 07:37:25PM +1030, Alan Modra wrote: > > I believe Alan's point is DSE deleted the assignm

Re: [PATCH][PR rtl-optimization/69307] Handle hard registers in modes that span more than one register properly

Hello Jeff, On 12.03.2016 20:13, Jeff Law wrote: As Andrey outlined in the PR, selective-scheduling was missing a check & handling of hard registers in modes that span more than one hard reg. This caused an incorrect register selection during renaming. I verified removing the printf call from

[wwwdocs] Fix broken link for Blackfin toolchain

Committed to CVS. Index: htdocs/readings.html === RCS file: /cvs/gcc/wwwdocs/htdocs/readings.html,v retrieving revision 1.245 diff -u -r1.245 readings.html --- htdocs/readings.html 28 Feb 2016 20:42:31 - 1.245 +++ htdocs/reading

Re: [C PATCH] Prevent -Wunused-value warning with __atomic_fetch_* (PR c/69407)

Ping. On Fri, Mar 04, 2016 at 07:03:09PM +0100, Marek Polacek wrote: > On Fri, Mar 04, 2016 at 06:41:26PM +0100, Jakub Jelinek wrote: > > I'm ok with it for gcc6. > > Cool. > > > But IMHO you should add dg-bogus directives here. > > Ok, version with dg-bogus: > > Bootstrapped/regtested on x86_

[PATCH] Fix PR56365

I am testing the following patch to fix the regression in min/max detection introduced by comparison canonicalization like a < 267 to a <= 266. The patch allows us to identify all four min/max cases in the testcase below. Bootstrap and regtest running on x86_64-unknown-linux-gnu. Richard. 2016

Re: [PATCH][ARM] PR driver/70132: Avoid double fclose in driver-arm.c

On 03/11/2016 04:32 PM, Kyrill Tkachov wrote: PR driver/70132 * config/arm/driver-arm.c (host_detect_local_cpu): Set file pointer to NULL after closing file. Doesn't match the patch. Either variant is fine but please use the right combination :) Bernd

Re: [PATCH, 4/16] Implement -foffload-alias

On 02/12/15 10:58, Jakub Jelinek wrote: On Fri, Nov 27, 2015 at 01:03:52PM +0100, Tom de Vries wrote: Handle non-declared variables in kernels alias analysis 2015-11-27 Tom de Vries * gimplify.c (gimplify_scan_omp_clauses): Initialize OMP_CLAUSE_ORIG_DECL. * omp-low.

Re: Fix 69650, bogus line numbers from libcpp

On 03/11/2016 11:09 PM, David Malcolm wrote: + cpp_error (pfile, CPP_DL_ERROR, +"file \"%s\" left but not entered", new_file); Although it looks like you're preserving the existing behavior from when t

Re: patch for PR69614

On 12 March 2016 at 18:17, Jeff Law wrote: > On 03/12/2016 07:56 AM, Vladimir Makarov wrote: >> >>The following patch should solve the PR which is discussed on >> >> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69614 >> >>The patch was bootstrapped and tested on x86/x86-64. >> >>Commit

Re: [PATCH, match] Fix pr68714

On Fri, 11 Mar 2016, Richard Henderson wrote: > On 03/02/2016 01:31 AM, Richard Biener wrote: > > As a general remark I think handling of this simplification is > > better done in the reassoc pass (see Jakubs comment #4) given > > || and && associate. So I'd rather go down that route if possible.

Re: Wonly-top-basic-asm

On 03/11/2016 01:55 AM, David Wohlferd wrote: So, we have been discussing this issue for 4 months now. Over that time, I have tried to incorporate everyone's feedback. As a result we have gone from a tiny doc patch (just describe the current semantics), to a big doc patch (completely deprecate

[PATCH, PR70161] Fix fdump-ipa-all-graph

Hi, this patch fixes PR70161, a 4.9/5/6 regression. Currently when using -fdump-ipa-all-graph, the compiler ICEs in execute_function_dump when testing for pass->graph_dump_initialized, because pass == NULL. The patch fixes: - the ICE by setting the pass argument in the call to execute_func

Re: [AArch64] Disable pcrelative_literal_loads with fix-cortex-a53-843419

On 10 March 2016 at 14:24, James Greenhalgh wrote: > On Thu, Mar 10, 2016 at 01:37:50PM +0100, Christophe Lyon wrote: >> On 10 March 2016 at 12:43, James Greenhalgh wrote: >> > On Tue, Jan 26, 2016 at 03:43:36PM +0100, Christophe Lyon wrote: >> >> With the attachment >> >> >> >> >> >> On 26 J

[PATCH] genrecog: Fix crash on invalid input

If your machine description refers to a non-existent predicate genrecog crashes. This fixes it. Is this okay for trunk? Segher 2016-03-14 Segher Boeesenkool * genrecog.c (safe_predicate_mode): If PRED is NULL, return false. --- gcc/genrecog.c | 3 +++ 1 file changed, 3 insertion

Re: [01/05] Fix PR 64411

On Mon, 14 Mar 2016, Andrey Belevantsev wrote: > In this case, we get an inconsistency between the sched-deps interface, saying > we can't move an insn writing the si register through a vector insn, and the > liveness analysis, saying we can. The latter doesn't take into account > implicit_reg_pen

Re: [AArch64] Emit square root using the Newton series

On 03/10/16 19:06, Wilco Dijkstra wrote: Evandro Menezes wrote: That's what I had in mind too, but around the approximation for x^-1/2 and using masks for vector cases thusly: fcmne v3.4s, v0.4s, #0.0 frsqrte v1.4s, v0.4s fmulv2.4s, v1.4s, v1.4s frsqrts

Re: [01/05] Fix PR 64411

On 03/14/2016 05:23 PM, Alexander Monakov wrote: On Mon, 14 Mar 2016, Andrey Belevantsev wrote: In this case, we get an inconsistency between the sched-deps interface, saying we can't move an insn writing the si register through a vector insn, and the liveness analysis, saying we can. The latte

Re: [02/05] Fix PR 63384

On Mon, 14 Mar 2016, Andrey Belevantsev wrote: > Here we're looping because we decrease the counter of the insns we still can > issue on a DEBUG_INSN thus rendering the counter negative. The fix is to not > count debug insns in the corresponding code. The selective scheduling is > known to spoil

Re: [03/05] Fix PR 66660

On Mon, 14 Mar 2016, Andrey Belevantsev wrote: > We speculate an insn in the PR but we do not make a check for it though we > should. The thing that broke this was the fix for PR 45472. In that pr, we > have moved a volatile insn too far up because we failed to merge the bits > describing its vol

Re: [PATCH] genrecog: Fix crash on invalid input

On 03/14/2016 04:38 PM, Segher Boessenkool wrote: If your machine description refers to a non-existent predicate genrecog crashes. This fixes it. Might be better to fix the caller? Bernd

Re: [04/05] Fix PR 69032

On Mon, 14 Mar 2016, Andrey Belevantsev wrote: > We fail to find the proper seqno for the fresh bookkeeping copy in this PR. > The problem is that in get_seqno_by_preds we are iterating over bb from the > given insn backwards up to the first bb insn. We skip the initial insn when > iterating over

Re: [PATCH] Fix PR56365

On March 14, 2016 12:58:20 PM GMT+01:00, Richard Biener wrote: > >I am testing the following patch to fix the regression in min/max >detection introduced by comparison canonicalization like a < 267 >to a <= 266. The patch allows us to identify all four min/max >cases in the testcase below. > >Bo

Re: [PATCH][PR rtl-optimization/69307] Handle hard registers in modes that span more than one register properly

On 03/14/2016 03:56 AM, Andrey Belevantsev wrote: Thank you for checking this in. I've also tested this patch in the similar way (forcing selective scheduling for 2nd and both schedulers) both on x86-64 and ia64. I've posted the patches for remaining sel-sched PRs just now -- it took some time

[PATCH] extend.texi: Expand on the perils of using the 'leaf' attribute.

Using the 'leaf' attribute is difficult in certain use cases, and the documentation rightly points out that signals is one such problem. We should additionally document the following caveats: * Indirect function resolvers (thanks to Florian Weimer for catching this). * Indirect function implement

Re: [PATCH] genrecog: Fix crash on invalid input

On Mon, Mar 14, 2016 at 06:39:12PM +0100, Bernd Schmidt wrote: > On 03/14/2016 04:38 PM, Segher Boessenkool wrote: > >If your machine description refers to a non-existent predicate genrecog > >crashes. This fixes it. > > Might be better to fix the caller? Yeah maybe. The next function that take

Re: [PATCH] PR69195, Reload confused by invalid reg equivs

On 03/14/2016 03:56 AM, Richard Biener wrote: Undefined? Most likely. But we still have to do something sensible. As Jakub noted, a user could create the problematic code just as easily as DCE/DSE, so IRA probably needs to be tolerant of this situation. So it seems like you're suggesting we l

Re: [AArch64] Emit square root using the Newton series

Evandro Menezes wrote: > > I got the scalar version going, but I'm stuck with the vector version. > As you can see above, I need to use the complement of the mask produced > by FCMEQ to squelch the offending vector element. However, the way in > which FCMEQ is defined in GCC, it produces an intege

C++ PATCH for range-for tweak

A proposal accepted at the last meeting allows the deduced iterator and end variables in range-based for to have different types, as long as they can be compared. This is a very simple change, limited to C++1z mode, and desired by some of the heaviest users of concepts, so I'm going to go ahea

Re: [PATCH] genrecog: Fix crash on invalid input

On Mon, Mar 14, 2016 at 01:41:38PM -0500, Segher Boessenkool wrote: > On Mon, Mar 14, 2016 at 06:39:12PM +0100, Bernd Schmidt wrote: > > On 03/14/2016 04:38 PM, Segher Boessenkool wrote: > > >If your machine description refers to a non-existent predicate genrecog > > >crashes. This fixes it. > >

Re: [PATCH] Fix PR56365

On March 14, 2016 7:25:31 PM GMT+01:00, Bernhard Reutner-Fischer wrote: >On March 14, 2016 12:58:20 PM GMT+01:00, Richard Biener > wrote: >> >>I am testing the following patch to fix the regression in min/max >>detection introduced by comparison canonicalization like a < 267 >>to a <= 266. The p

[PATCH, testsuite] Fix ifcvt-4.c for PowerPC

As stated in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68232, this test needs -misel on powerpc to pass. Verified the following fixes the test on both powerpc64/powerpc64le. Ok for trunk? -Pat testsuite/ChangeLog: 2016-03-14 Pat Haugen * gcc.dg/ifcvt-4.c: Add -misel for powerpc*

[PATCH] c++/67376 Comparison with pointer to past-the-end, of array fails inside constant expression

The attached patch fixes the outstanding cases mentioned in comment 10 on bug c++/67376. While testing the fix I uncovered a number of other related problems without which the test would have been incomplete. They include: PR c++/70170 - [6 regression] bogus not a constant expression error

Re: [PATCH] 69517 - [5/6 regression] SEGV on a VLA with excess initializer elements

Ping: https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00441.html On 03/06/2016 06:38 PM, Martin Sebor wrote: GCC 4.9 had added support for C++ VLAs as specified in WG21 document N3639 expected to be included in C++ 14. However, WG21 ultimately decided not to include N3639 in C++ 14 and the G++

Re: C++ PATCH for range-for tweak

* Jason Merrill: > P08184R0: Generalizing the Range-Based For Loop How can one resolve this reference? It's obviously not a PR number in GCC Bugzilla. I found this after some searching: But it lacks the additional “8

[PATCH] Fix LRA ICE (PR middle-end/70219)

Hi! The newly added assert in delete_move_and_clobber requires dregno > 0, but dregno == 0 is also normal (e.g. in the testcase below we get dregno == 0, because it uses %rax). Only dregno < 0 is special and we shouldn't see it here. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for

[C++ PATCH] Fix -fsanitize=vptr (PR c++/70147)

Hi! My recent patch for PR70035 broke -fsanitize=vptr, the early clearing of _vptr.* pointers in the objects can crash in constructors with _vtt_parm parameter. This patch arranges to use in them *_vtt_parm instead the base vptr (which we clear, instead of initialize). The first testcase is just

Re: [PATCH] Fix LRA ICE (PR middle-end/70219)

On 03/14/2016 03:32 PM, Jakub Jelinek wrote: Hi! The newly added assert in delete_move_and_clobber requires dregno > 0, but dregno == 0 is also normal (e.g. in the testcase below we get dregno == 0, because it uses %rax). Only dregno < 0 is special and we shouldn't see it here. Bootstrapped/re

Re: [PATCH] c++/67376 Comparison with pointer to past-the-end, of array fails inside constant expression

On Mon, Mar 14, 2016 at 03:25:07PM -0600, Martin Sebor wrote: > PR c++/67376 - [5/6 regression] Comparison with pointer to past-the-end > of array fails inside constant expression > PR c++/70170 - [6 regression] bogus not a constant expression error comparing > pointer to array to null

Re: [PATCH] extend.texi: Expand on the perils of using the 'leaf' attribute.

On 03/14/2016 12:40 PM, Carlos O'Donell wrote: Using the 'leaf' attribute is difficult in certain use cases, and the documentation rightly points out that signals is one such problem. We should additionally document the following caveats: * Indirect function resolvers (thanks to Florian Weimer

Re: [RFA][PATCH][PR tree-optimization/64058] Improve and stabilize sorting of coalesce pairs

On 03/11/2016 03:02 AM, Richard Biener wrote: For the other part I noticed a few things 1) having a bitmap_count_ior_bits () would be an improvement Yea, I almost built one. That's easy enough to add. 2) you might end up with redundant work(?) as you are iterating over SSA name coales

Re: [PATCH] Fix PR56365

On March 14, 2016 9:21:25 PM GMT+01:00, Richard Biener wrote: >On March 14, 2016 7:25:31 PM GMT+01:00, Bernhard Reutner-Fischer > wrote: >>On March 14, 2016 12:58:20 PM GMT+01:00, Richard Biener >> wrote: >>>+ >>>+ int test_01 (int a) >>>+ { >>>+ if (127 <= a) >> >>Shouldn't this be >= ? > >N

Re: [PATCH, 4/16] Implement -foffload-alias

On 14/03/16 14:16, Tom de Vries wrote: On 02/12/15 10:58, Jakub Jelinek wrote: On Fri, Nov 27, 2015 at 01:03:52PM +0100, Tom de Vries wrote: Handle non-declared variables in kernels alias analysis 2015-11-27 Tom de Vries * gimplify.c (gimplify_scan_omp_clauses): Initialize OMP_CLAU

Re: [PATCH, testsuite] Fix ifcvt-4.c for PowerPC

On 03/14/2016 02:23 PM, Pat Haugen wrote: As stated in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68232, this test needs -misel on powerpc to pass. Verified the following fixes the test on both powerpc64/powerpc64le. Ok for trunk? -Pat testsuite/ChangeLog: 2016-03-14 Pat Haugen *

Re: [PATCH, testsuite] Fix ifcvt-4.c for PowerPC

On Mon, Mar 14, 2016 at 7:35 PM, Jeff Law wrote: > On 03/14/2016 02:23 PM, Pat Haugen wrote: >> >> As stated in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68232, this >> test needs -misel on powerpc to pass. Verified the following fixes the >> test on both powerpc64/powerpc64le. Ok for trunk? >>

Re: [PATCH] genrecog: Fix crash on invalid input

On 03/14/2016 09:00 PM, Segher Boessenkool wrote: There is just the single caller, and pred is set right before the call there. How about this patch, then? Looks alright. Bernd

Re: [RFA][PATCH][PR tree-optimization/64058] Improve and stabilize sorting of coalesce pairs

On Mon, Mar 14, 2016 at 04:32:06PM -0600, Jeff Law wrote: > On 03/11/2016 03:02 AM, Richard Biener wrote: > > > > > >For the other part I noticed a few things > > 1) having a bitmap_count_ior_bits () would be an improvement > Yea, I almost built one. That's easy enough to add. > > > 2) you migh

Re: [PATCH] PR69195, Reload confused by invalid reg equivs

On Mon, Mar 14, 2016 at 01:00:39PM -0600, Jeff Law wrote: > Right. Tolerant as in not crash. So can someone please approve my ira.c:indirect_jump_optimize patch? I'm not quite audacious enough to claim it is obvious. The original is at https://gcc.gnu.org/ml/gcc-patches/2016-03/msg00720.html, re

Re: C++ PATCH for range-for tweak

On 03/14/2016 05:30 PM, Florian Weimer wrote: * Jason Merrill: P08184R0: Generalizing the Range-Based For Loop How can one resolve this reference? It's obviously not a PR number in GCC Bugzilla. I found this after some searching:

[PATCH] Fix 70199

The problem here is that void* labels[] = { &&l0, &&l1, &&l2 }; gets gimplified to labels = *.LC0; but .LC0 is not in the set of local decls, so that when copy_forbidden is called during sra versioning we fail to forbid the copy. We could set a different flag, but I think it's eas

Re: [PING 4, PATCH] PR/68089: C++-11: Ingore "alignas(0)".

On Mon, Jan 04, 2016 at 12:33:21PM +0100, Dominik Vogt wrote: > On Fri, Jan 01, 2016 at 05:53:08PM -0700, Martin Sebor wrote: > > On 12/31/2015 04:50 AM, Dominik Vogt wrote: > > >The attached patch fixes C++-11 handling of "alignas(0)" which > > >should be ignored but currently generates an error m