[PATCH] Fix PRs 66502 and 67167

Given there is now PR67167 I am going forward with the earlier posted patch to switch SCCVN to PHI elimination in favor of another PHI (to remove IVs) rather than in favor of its only executable edge value. I still see no way to capture both cases without detecting the choice and re-numbering the

RE: [PATCH, MIPS] Enable load/store bonding for I6400

Ping. > -Original Message- > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-ow...@gcc.gnu.org] On > Behalf Of Robert Suchanek > Sent: 05 August 2015 09:31 > To: catherine_mo...@mentor.com; Matthew Fortune; gcc-patches@gcc.gnu.org > Subject: [PATCH, MIPS] Enable load/store bonding

RE: [PATCH, MIPS] Remove W32 and W64 pseudo-processors

Hi, > > gcc/ > > * config/mips/mips.c (mips_rtx_cost_data): Remove costs for W32 and > W64 > > pseudo-processors. > > * config/mips/mips.md (processor): Remove w32 and w64. > > OK, thanks. > > Matthew Committed as r226851. Regards, Robert

Re: [PATCH GCC]Improve bound information in loop niter analysis

Ping. Thanks, bin On Tue, Jul 28, 2015 at 5:36 PM, Bin Cheng wrote: > Hi, > Loop niter computes inaccurate bound information for different loops. This > patch is to improve it by using loop initial condition in > determine_value_range. Generally, loop niter is computed by subtracting > start v

Re: [PATCH GCC]Improve loop bound info by simplifying conversions in iv base

Ping. Thanks, bin On Tue, Jul 28, 2015 at 5:38 PM, Bin Cheng wrote: > Hi, > For now, SCEV may compute iv base in the form of "(signed T)((unsigned > T)base + step))". This complicates other optimizations/analysis depending > on SCEV because it's hard to dive into type conversions. For many cas

[wwwdocs] Re: C++ Concepts available in trunk?

On 12 August 2015 at 23:54, Dijk, J. van wrote: > Thanks for the clarification. I hope the attached patch against current > wwwdocs will be of use (only the name of the feature test macro is missing > in the new file cxx1z.html; did not manage to find that.) Thanks, I've committed the attached ch

Re: [PATCH][2/2] Make SCCVN use conditional equivalences

On m68k: FAIL: gcc.dg/tree-ssa/vrp33.c scan-tree-dump vrp1 "Folding predicate.*== 1 to 0" $ gcc/xgcc -B gcc/ ../gcc/testsuite/gcc.dg/tree-ssa/vrp33.c -O2 -fdump-tree-vrp1 -S $ grep -c Folding *.vrp1 0 Andreas. -- Andreas Schwab, SUSE Labs, sch...@suse.de GPG Key fingerprint = 0196 BAD8 1CE9 1

RE: [Patch, MIPS] MIPS specific optimization for o32 ABI

Hi Steve, Overall, I don't think these optimizations are ready to include. In principle the idea looks good but it is done at the wrong point in the compiler in my opinion. The biggest concern I have is that the analysis should be possible at (or prior to) the point where the prologue/epilogue ar

Re: [PATCH][2/2] Make SCCVN use conditional equivalences

On Thu, 13 Aug 2015, Andreas Schwab wrote: > On m68k: > > FAIL: gcc.dg/tree-ssa/vrp33.c scan-tree-dump vrp1 "Folding predicate.*== 1 to > 0" > > $ gcc/xgcc -B gcc/ ../gcc/testsuite/gcc.dg/tree-ssa/vrp33.c -O2 > -fdump-tree-vrp1 -S > $ grep -c Folding *.vrp1 > 0 I suppose for logical-op-non-sh

Re: [wwwdocs] Re: C++ Concepts available in trunk?

Here's the patch for the rest of the C++17 support. On 13 August 2015 at 09:58, Jonathan Wakely wrote: > On 12 August 2015 at 23:54, Dijk, J. van wrote: >> Thanks for the clarification. I hope the attached patch against current >> wwwdocs will be of use (only the name of the feature test macro is

[PATCH] Missing Skylake -march=/-mtune= option

Hi All, Here is patch for adding march/mtune options for Skylake. Bootstrap and regression testing did not show any new failures. Is it OK for trunk? ChangeLog: 2015-08-13 Yuri Rumyantsev * config/i386/driver-i386.c (host_detect_local_cpu): Add support for skylake. * config/i386/i386.c (PTA

[PATCH] Fix PR67191

Just remove the assert which I now know how it can trigger without causing harm. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-08-13 Richard Biener PR tree-optimization/67191 * tree-ssa-sccvn.c (sccvn_dom_walker::before_dom_children): Remove

Re: [PATCH][2/2] Make SCCVN use conditional equivalences

On ia64 and arm64: FAIL: g++.dg/tree-ssa/pr61034.C -std=gnu++11 scan-tree-dump-times fre2 "free" 10 $ gcc/xg++ -Bgcc/ ../gcc/testsuite/g++.dg/tree-ssa/pr61034.C -nostdinc++ -Iia64-suse-linux/libstdc++-v3/include/ia64-suse-linux -Iia64-suse-linux/libstdc++-v3/include -I../libstdc++-v3/libsupc

Re: [PATCH][2/2] Make SCCVN use conditional equivalences

On Thu, 13 Aug 2015, Andreas Schwab wrote: > On ia64 and arm64: > > FAIL: g++.dg/tree-ssa/pr61034.C -std=gnu++11 scan-tree-dump-times fre2 > "free" 10 > > $ gcc/xg++ -Bgcc/ ../gcc/testsuite/g++.dg/tree-ssa/pr61034.C -nostdinc++ > -Iia64-suse-linux/libstdc++-v3/include/ia64-suse-linux > -Iia

Re: [PATCH, libjava/classpath]: Fix overriding recipe for target 'gjdoc' build warning

On Wed, Aug 12, 2015 at 6:47 PM, Jeff Law wrote: > On 08/12/2015 10:24 AM, Ian Lance Taylor wrote: >> >> On Wed, Aug 12, 2015 at 9:21 AM, Tom Tromey wrote: >>> >>> Jeff> In the past this has stalled on issues like how will >>> asynch-exceptions >>> Jeff> be tested and the like. >>> >>> It seems t

Re: [PATCH] [graphite] Constrain only on INTEGER_TYPE

On Wed, Aug 12, 2015 at 10:41 PM, Tobias Grosser wrote: > On 08/12/2015 10:33 PM, Aditya Kumar wrote: >> >> Passes bootstrap, no regressions. >> >> With this patch gcc bootstraps with graphite. >> make BOOT_CFLAGS="-g -O2 -fgraphite-identity -floop-interchange >> -floop-block" > > > LGTM, but plea

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On Wed, Aug 12, 2015 at 10:52 PM, Mike Stump wrote: > On Aug 12, 2015, at 1:07 PM, Richard Sandiford > wrote: >>> I don't think the right shifts are an issue at all. >> >> Well, they're implementation-defined, at least in C. > >> The C11 wording for E1 >> E2 is "If E1 has a signed type and a neg

[PING][Patch] Add support for IEEE-conformant versions of scalar fmin* and fmax*

Hi, Sorry to bother people again. Is this OK to go now? Thanks! David. > > > > > On Mon, 29 Jun 2015, David Sherwood wrote: > > > > > > > Hi, > > > > > > > > I have added new STRICT_MAX_EXPR and STRICT_MIN_EXPR expressions to > > > > support the > > > > IEEE versions of fmin and fmax. This is d

[PING][PATCH][3/N] Replace the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m)

Hi, This patch follows on from [PATCH][1/N] Change GET_MODE_INNER to always return a non-void mode It is another tidy up, replacing the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m). Also replaces any calls to GET_MODE_PRECISION (GET_MODE_INNER (m)) with GET_MODE_U

RE: [PATCH, MIPS] Enable load/store bonding for I6400

> > gcc/ > > * config/mips/mips.h (ENABLE_LD_ST_PAIRS): Enable load/store pairs for > > I6400. Sorry, I missed this one. OK to commit. Thanks, Matthew

Re: [PATCH][2/2] Make SCCVN use conditional equivalences

Richard Biener writes: > On Thu, 13 Aug 2015, Andreas Schwab wrote: > >> On m68k: >> >> FAIL: gcc.dg/tree-ssa/vrp33.c scan-tree-dump vrp1 "Folding predicate.*== 1 >> to 0" >> >> $ gcc/xgcc -B gcc/ ../gcc/testsuite/gcc.dg/tree-ssa/vrp33.c -O2 >> -fdump-tree-vrp1 -S >> $ grep -c Folding *.vrp1

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

Le 12/08/2015 22:07, Richard Sandiford a écrit : Jeff Law writes: On 08/12/2015 12:32 PM, Richard Biener wrote: On August 12, 2015 8:07:13 PM GMT+02:00, Jeff Law wrote: On 08/12/2015 11:12 AM, Richard Biener wrote: Prec is almost never a constant and is heavily used from wide-int. We are

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

Le 13/08/2015 12:56, Mikael Morin a écrit : Still, implementation-defined behavior is a progress over undefined behaviour. Even if it's not set in stone, the good thing about implementation-defined behaviour is that it's known to be non-random. So it can be checked, either with autoconf, or with

[PATCH][MIPS] Fix register renaming in the interrupt handlers

Hi, It was discovered that with the attached test case compiled with -O2 -funroll-loops, the regrename pass renamed one of the registers ($2) to $8 that was not saved by the prologue. The attached patch fixes it by defining macro HARD_REGNO_RENAME_OK that returns zero iff the current function is

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On 2015.08.13 at 12:56 +0200, Mikael Morin wrote: > Le 12/08/2015 22:07, Richard Sandiford a écrit : > > Jeff Law writes: > >> On 08/12/2015 12:32 PM, Richard Biener wrote: > >>> On August 12, 2015 8:07:13 PM GMT+02:00, Jeff Law wrote: > On 08/12/2015 11:12 AM, Richard Biener wrote: > >

Re: [PING][Patch] Add support for IEEE-conformant versions of scalar fmin* and fmax*

On Thu, Aug 13, 2015 at 12:11 PM, David Sherwood wrote: > Hi, > > Sorry to bother people again. Is this OK to go now? Hmm, why don't you go the vectorized function call path for this, implementing the builtin_vectorized_function target hook? Richard. > Thanks! > David. > >> > >> > > On Mon, 29

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On Thu, Aug 13, 2015 at 1:08 PM, Markus Trippelsdorf wrote: > On 2015.08.13 at 12:56 +0200, Mikael Morin wrote: >> Le 12/08/2015 22:07, Richard Sandiford a écrit : >> > Jeff Law writes: >> >> On 08/12/2015 12:32 PM, Richard Biener wrote: >> >>> On August 12, 2015 8:07:13 PM GMT+02:00, Jeff Law

RE: [PATCH][MIPS] Fix register renaming in the interrupt handlers

I'd like to give Catherine chance to review this, I notice a couple of formatting nits in the test case: Robert Suchanek writes: > a/gcc/testsuite/gcc.target/mips/interrupt_handler-bug-1.c > b/gcc/testsuite/gcc.target/mips/interrupt_handler-bug-1.c > new file mode 100644 > index 000..877d00c

Re: [PATCH 2/2] replace several uses of the anon namespace with GCC_FINAL

On Wed, Aug 12, 2015 at 4:30 PM, Trevor Saunders wrote: > On Wed, Aug 12, 2015 at 03:31:35PM -0400, David Edelsohn wrote: >> This patch has caused a bootstrap failure on AIX. > > reverted, though my bet is this is some sort of generic devirt bug on > aix. There have been a lot of issues with GCC'

Re: [PATCH ppc64,aarch64,alpha 00/15] Improve backend constant generation

On Wed, Aug 12, 2015 at 11:10 PM, Segher Boessenkool wrote: > On Wed, Aug 12, 2015 at 03:31:48AM -0500, Segher Boessenkool wrote: >> > * This is the only platform for which I bothered collecting any sort >> > of performance data: >> > >> > As best I can tell, there is a 9% improvement in

Re: [PATCH] Simple optimization for MASK_STORE.

Hi Richard, Did you have a chance to look at updated patch? Thanks. Yuri. 2015-08-06 14:07 GMT+03:00 Yuri Rumyantsev : > HI All, > > Here is updated patch which implements Richard proposal to use vector > comparison with boolean result instead of target hook. Support for it > was added to ix86_e

Re: [PATCH] Simple optimization for MASK_STORE.

On Thu, Aug 13, 2015 at 1:32 PM, Yuri Rumyantsev wrote: > Hi Richard, > > Did you have a chance to look at updated patch? Having a quick look now. Btw, you didn't try the simpler alternative of tree type = type_for_mode (int_mode_for_mode (TYPE_MODE (vectype))); build2 (EQ_EXPR, boolean_type_

RE: [PATCH, MIPS] Enable load/store bonding for I6400

Hi, > > > gcc/ > > > * config/mips/mips.h (ENABLE_LD_ST_PAIRS): Enable load/store pairs for > > > I6400. > > Sorry, I missed this one. OK to commit. > > Thanks, > Matthew Committed as r226860. Regards, Robert

[PATCH] Use non-nullness of parameters in SCCVN

Simply register an != 0 expression for them. This should solve Honzas request to optimize away != 0 checks for this pointers during early opts. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2015-08-13 Richard Biener * tree.c (nonnull_arg_p): Move from ...

Re: [PATCH][AArch64][1/3] Expand signed mod by power of 2 using CSNEG

On 03/08/15 14:01, James Greenhalgh wrote: On Fri, Jul 24, 2015 at 11:55:33AM +0100, Kyrill Tkachov wrote: Hi all, This patch implements an aarch64-specific expansion of the signed modulo by a power of 2. The proposed sequence makes use of the conditional negate instruction CSNEG. For a power

[PATCH] [Ada] Make the stack non-executable in GNAT tools

Due to PR67205, the deeply nested instantiations require trampolines, which in turn requires an executable stack for the GNAT tools on architectures such as x86_64. Bootstrapped on x86_64-redhat-linux-gnu, and make check-ada reports no unexpected failures. Okay for trunk? -- Florian Weimer / Re

[C++ Patch] PR 63693

Hi, in this ICE on invalid, during error recovery resolve_typename_type gets a TYPE which has a DECLTYPE_TYPE as TYPE_CONTEXT and CLASSTYPE_PRIMARY_TEMPLATE_TYPE ICEs on the latter. Checking CLASS_TYPE_P and thus returning the TYPE as is avoids the ICE and passes testing on x86_64-linux. Th

Re: [patch][libstdc++] Provide nearly complete locale support for DragonFly

On 7/31/2015 6:06 PM, John Marino wrote: > So far, DragonFly only handles the C/POSIX locale through the "generic" > locale support files, similar to FreeBSD and Darwin. The following > patchset enables nearly complete support for named locales. The except > is for std:messages which requires get

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On Thu, Aug 13, 2015 at 01:11:53PM +0200, Richard Biener wrote: > Rather ubsan should not complain about implementation defined behavior (or > should separate those cases out with a different switch compared to undefined > behavior). I think ubsan doesn't complain about implementation-defined beha

[patch] Add SD-6 features test macros for recent libstdc++ changes

Subject says it all. Tested ppc64le-linux, committing to trunk. commit d7f997a59a1383b7f08618fbf1d7855edb5fa012 Author: Jonathan Wakely Date: Thu Aug 13 10:27:59 2015 +0100 * include/bits/alloc_traits.h: Add feature-test macro. * include/bits/allocator.h: Likewise. * include/

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On 2015.08.13 at 15:40 +0200, Marek Polacek wrote: > On Thu, Aug 13, 2015 at 01:11:53PM +0200, Richard Biener wrote: > > Rather ubsan should not complain about implementation defined behavior (or > > should separate those cases out with a different switch compared to > > undefined > > behavior). >

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On Thu, Aug 13, 2015 at 03:52:00PM +0200, Markus Trippelsdorf wrote: > On 2015.08.13 at 15:40 +0200, Marek Polacek wrote: > > On Thu, Aug 13, 2015 at 01:11:53PM +0200, Richard Biener wrote: > > > Rather ubsan should not complain about implementation defined behavior (or > > > should separate those

[PATCH] Forward to correct function in std::shared_mutex::unlock().

This commits the patch from https://gcc.gnu.org/ml/gcc-patches/2015-08/msg00663.html and adds tests for all the mutex types. Eelis, thanks for the patch. Please CC the libstdc++ list for all libstdc++ patches, I don't subscribe to gcc-patches and only saw your mail because Ville brought it to my

Re: [wwwdocs] Re: C++ Concepts available in trunk?

And a small correction. On 13 August 2015 at 10:24, Jonathan Wakely wrote: > Here's the patch for the rest of the C++17 support. > > On 13 August 2015 at 09:58, Jonathan Wakely wrote: >> On 12 August 2015 at 23:54, Dijk, J. van wrote: >>> Thanks for the clarification. I hope the attached patch

[v3 PATCH] Add C++11

Greetings, Now that most systems have uchar.h for conversion between char16_t* and char32_t* to multibyte (analogue of wchar.h and cwchar) i think we should check off this last little crumb of C++11. I submitted this a while back but Jonathan suggested improvements and it took me a hot minut

Re: [Aarch64][target/PR 67143] Use correct constraints on operands for atomic operations.

On 12/08/15 22:26, Joseph Myers wrote: On Tue, 11 Aug 2015, Matthew Wahab wrote: PR target/67143 * gcc.target/aarch64/pr67143.c: New What's architecture-specific about this test? That is, why doesn't it just go in gcc.c-torture/compile (no dg- directives needed, automatically

Re: [PATCH 2/2] replace several uses of the anon namespace with GCC_FINAL

On Wed, Aug 12, 2015 at 4:30 PM, Trevor Saunders wrote: > On Wed, Aug 12, 2015 at 03:31:35PM -0400, David Edelsohn wrote: >> This patch has caused a bootstrap failure on AIX. > > reverted, though my bet is this is some sort of generic devirt bug on > aix. bootstrap with GCC 5 does not help. - Da

Re: [v3 PATCH] Add C++11

On 13/08/15 10:37 -0400, Ed Smith-Rowland wrote: Greetings, Now that most systems have uchar.h for conversion between char16_t* and char32_t* to multibyte (analogue of wchar.h and cwchar) i think we should check off this last little crumb of C++11. Ooh, I forgot about this, thanks!

Re: [PATCH 2/2] replace several uses of the anon namespace with GCC_FINAL

On 08/12/2015 11:36 PM, Trevor Saunders wrote: > In many places gcc puts classes in the anon namespace so the compiler can tell > they do not get inheritted from to enable better devirtualization. C++ does not allow class members to have static linkage, so there is no way to tell the compiler that

[PATCH, FIXINCLUDES] AIX stdio C++ inline fix

AIX stdio.h header includes code specific for C++ that looks like: extern "C" { #ifdef __cplusplus #ifdef ferror #undef ferror inline int ferror(FILE * _p) { return ((_p)->_flag & _IOERR); } #endif /*ferror*/ which generates code that makes the AIX linker and loader rather upset because t

RE: [PATCH][MIPS] Fix register renaming in the interrupt handlers

> -Original Message- > From: Matthew Fortune [mailto:matthew.fort...@imgtec.com] > Sent: Thursday, August 13, 2015 7:20 AM > To: Robert Suchanek; Moore, Catherine > Cc: gcc-patches@gcc.gnu.org > Subject: RE: [PATCH][MIPS] Fix register renaming in the interrupt handlers > > I'd like to gi

Re: [Patch] sext_hwi: Avoid left shift of negative value undefined behaviour

On Aug 13, 2015, at 3:05 AM, Richard Biener wrote: > Ok, then guard the << >> with __GCC__ and do the expensive bit stuff > otherwise. Just to cater for other host compilers doing sth unsensibly > implementation defined. Ick. The guard should be specific to the implementation defined semantic o

RE: [PATCH] [graphite] Constrain only on INTEGER_TYPE

> Date: Thu, 13 Aug 2015 12:02:43 +0200 > Subject: Re: [PATCH] [graphite] Constrain only on INTEGER_TYPE > From: richard.guent...@gmail.com > To: tob...@grosser.es > CC: hiradi...@msn.com; gcc-patches@gcc.gnu.org; s@samsung.com; > seb...@gmail.com > > O

[patch] Include recog.h from ira-int.h

There was a recent change which causes ira-int.h to depend on recog.h.. but doesnt include it. Every file which needs it included it before I think, it just required some shuffling of order. By including recog.h in ira-int.h ordering issues are fixed, and we can simply remove recog.h form eve

Re: [PATCH 06/15] rs6000: Use rldiwi in constant construction

On Aug 12, 2015, at 7:43 PM, Segher Boessenkool wrote: > Yes. And there are much worse problems, like many things not working > right if your HOST_WIDE_INT would happen to be more than 64 bits; we > cannot really shake those out because there is no actual system to > test that on -- but it also

Re: [PATCH] Add extensions to dwarf2.def

> I'm currently working on migrating debugging information for Ada from GNAT > encodings to standard DWARF. At the moment, I have worked on two topics that > I believe are not (completely) supported in standard DWARF: > > - fixed point types with arbitrary scale factors; > - scalar types with b

Re: [PATCH, FIXINCLUDES] AIX stdio C++ inline fix

Looks good to me... On Thu, Aug 13, 2015 at 10:33 AM, David Edelsohn wrote: > AIX stdio.h header includes code specific for C++ that looks like: > > extern "C" { > #ifdef __cplusplus > #ifdef ferror > #undef ferror > inline int ferror(FILE * _p) > { > return ((_p)->_flag & _IOERR); > } >

Re: [PATCH][MIPS] Fix register renaming in the interrupt handlers

Robert Suchanek writes: > Hi, > > It was discovered that with the attached test case compiled with -O2 > -funroll-loops, the regrename pass renamed one of the registers ($2) > to $8 that was not saved by the prologue. > > The attached patch fixes it by defining macro HARD_REGNO_RENAME_OK > that re

Re: [PATCH] Missing Skylake -march=/-mtune= option

On Thu, Aug 13, 2015 at 11:31 AM, Yuri Rumyantsev wrote: > Hi All, > > Here is patch for adding march/mtune options for Skylake. > > Bootstrap and regression testing did not show any new failures. > > Is it OK for trunk? OK. Thanks, Uros. > ChangeLog: > 2015-08-13 Yuri Rumyantsev > > * confi

Re: [PATCH 2/2] replace several uses of the anon namespace with GCC_FINAL

Trevor Saunders writes: > On Wed, Aug 12, 2015 at 01:03:36PM -0600, Jeff Law wrote: >> On 08/12/2015 12:57 PM, Richard Sandiford wrote: >> >Jeff Law writes: >> >>On 08/10/2015 06:05 AM, tbsaunde+...@tbsaunde.org wrote: >> >>>From: Trevor Saunders >> >>> >> >>>Hi, >> >>> >> >>>In many places gcc

Re: Fix reload1.c warning for some targets

Jeff Law writes: > On 08/05/2015 08:18 AM, Richard Sandiford wrote: >> Building some targets results in a warning about orig_dup[i] potentially >> being used uninitialised. I think the warning is fair, since it isn't >> obvious that the reog_data-based loop bound remains unchanged between: >> >>

Re: [PATCH 06/15] rs6000: Use rldiwi in constant construction

On Thu, 13 Aug 2015, Mike Stump wrote: > On Aug 12, 2015, at 7:43 PM, Segher Boessenkool > wrote: > > Yes. And there are much worse problems, like many things not working > > right if your HOST_WIDE_INT would happen to be more than 64 bits; we > > cannot really shake those out because there is

Re: Fix reload1.c warning for some targets

On 08/13/2015 02:29 PM, Richard Sandiford wrote: Jeff Law writes: On 08/05/2015 08:18 AM, Richard Sandiford wrote: Building some targets results in a warning about orig_dup[i] potentially being used uninitialised. I think the warning is fair, since it isn't obvious that the reog_data-based lo

Re: [PATCH] Move A - (A & B) -> ~B & A

On Fri, 17 Jul 2015, Marek Polacek wrote: On Fri, Jul 17, 2015 at 02:23:50PM +0200, Richard Biener wrote: +/* Fold A - (A & B) into ~B & A. */ +(simplify + (minus (convert? @0) (convert? (bit_and:c @0 @1))) I think you want :s on the bit_and and its convert? Ok, I keep forgetting about thi

Re: [patch] Include recog.h from ira-int.h

On 08/13/2015 12:09 PM, Andrew MacLeod wrote: There was a recent change which causes ira-int.h to depend on recog.h.. but doesnt include it. Every file which needs it included it before I think, it just required some shuffling of order. By including recog.h in ira-int.h ordering issues are fixe

Re: [PING][PATCH][3/N] Replace the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m)

On 08/13/2015 04:12 AM, David Sherwood wrote: Hi, This patch follows on from [PATCH][1/N] Change GET_MODE_INNER to always return a non-void mode It is another tidy up, replacing the pattern GET_MODE_BITSIZE (GET_MODE_INNER (m)) with GET_MODE_UNIT_BITSIZE (m). Also replaces any calls to GET_MOD

Re: [PATCH, libjava/classpath]: Fix overriding recipe for target 'gjdoc' build warning

On 08/13/2015 04:00 AM, Richard Biener wrote: On Wed, Aug 12, 2015 at 6:47 PM, Jeff Law wrote: On 08/12/2015 10:24 AM, Ian Lance Taylor wrote: On Wed, Aug 12, 2015 at 9:21 AM, Tom Tromey wrote: Jeff> In the past this has stalled on issues like how will asynch-exceptions Jeff> be tested and

Re: [PATCH GCC]Improve bound information in loop niter analysis

On 07/28/2015 03:36 AM, Bin Cheng wrote: Hi, Loop niter computes inaccurate bound information for different loops. This patch is to improve it by using loop initial condition in determine_value_range. Generally, loop niter is computed by subtracting start var from end var in loop exit condition

Re: [PATCH GCC]Improve loop bound info by simplifying conversions in iv base

On 07/28/2015 03:38 AM, Bin Cheng wrote: Hi, For now, SCEV may compute iv base in the form of "(signed T)((unsigned T)base + step))". This complicates other optimizations/analysis depending on SCEV because it's hard to dive into type conversions. For many cases, such type conversions can be sim

Re: [PATCH][MIPS] Fix register renaming in the interrupt handlers

On Aug 13, 2015, at 12:54 PM, Richard Sandiford wrote: > >> It was discovered that with the attached test case compiled with -O2 >> -funroll-loops, the regrename pass renamed one of the registers ($2) >> to $8 that was not saved by the prologue. >> >> The attached patch fixes it by defining mac

Re: r226516 - in /trunk/gcc: ChangeLog testsuite/Ch...

On 08/05/2015 01:44 AM, Andreas Schwab wrote: FAIL: gcc.dg/pr66314.c (test for excess errors) Excess errors: /usr/local/gcc/gcc-20150805/gcc/testsuite/gcc.dg/pr66314.c:1:0: warning: -fsanitize=address and -fsanitize=kernel-address are not supported for this target Fixing this is ever-so-slight

Re: Using libbacktrace in libgfortran: some questions

On Thu, Aug 13, 2015 at 8:50 AM, FX wrote: >> And yet, that patch has absolutely nothing to do with libbacktrace. >> Hmmm. Let's try this one. > > Works perfectly with the patch: Patch tested and committed with this ChangeLog entry. 2015-08-13 Ian Lance Taylor * dwarf.c (read_function_entry

[gomp4.1] coerce libgomp to build with C++

Ughh... what was supposed to be a short hack turned out to be 2 days of pure torture. So...I'm implementing task priorities as per the 4.1 standard, and decided to use a priority queue. Since we already have splay trees in libgomp, I figured these priority queues could be built on top of them

[PATCH 1/2] C++-ify dominance.c

Hi all. These two patches are refactoring of dominator-related code. The comment in dominance.c says: "We work in a poor-mans object oriented fashion, and carry an instance of this structure through all our 'methods'". So, the first patch converts the mentioned structure (dom_info) into a class w

[PATCH, committed] jit: on OS X, add -Wl,-undefined,dynamic_lookup to driver invocation

Reported as fixing the library on OS X Yosemite: https://gcc.gnu.org/ml/jit/2015-q3/msg00147.html Committed to trunk as r226882. Committed to gcc-5-branch as r226883. gcc/jit/ChangeLog: * jit-playback.c (invoke_driver): On OS X, add "-Wl,-undefined,dynamic_lookup" to the driver

Re: [PATCH GCC]Improve bound information in loop niter analysis

On Fri, Aug 14, 2015 at 6:08 AM, Jeff Law wrote: > On 07/28/2015 03:36 AM, Bin Cheng wrote: >> >> Hi, >> Loop niter computes inaccurate bound information for different loops. >> This >> patch is to improve it by using loop initial condition in >> determine_value_range. Generally, loop niter is co

Re: [PATCH GCC]Improve loop bound info by simplifying conversions in iv base

On Fri, Aug 14, 2015 at 6:10 AM, Jeff Law wrote: > On 07/28/2015 03:38 AM, Bin Cheng wrote: >> >> Hi, >> For now, SCEV may compute iv base in the form of "(signed T)((unsigned >> T)base + step))". This complicates other optimizations/analysis depending >> on SCEV because it's hard to dive into ty