RE: [PATCH, Fortran] PR61234: -Wuse-no-only

Attached the reworked patch. The only change is that the warning is now not part of -Wall, given the consensus on the list. The patch has been bootstrapped and regtested on x86_64-unknown-linux-gnu. If OK, please apply to trunk. gcc/fortran/ChangeLog: 2014-06-04 Joost VandeVondele PR

Re: [PATCH] Add patch for debugging compiler ICEs

> This is the resurrected patch with added GCC version information > into generated repro file. I wonder whether we should also set ADDR_NO_RANDOMIZE and ADDR_COMPAT_LAYOUT in addition to -frandom-seed (according to https://gcc.gnu.org/wiki/Randomization). -Y

[PATCH, PR61446] Fix mode for register copy in REE pass

Hi, This patch fixes PR61446. The problem appears when we insert value copies after transformations. We use the widest extension mode met in a chain, but it may be wider than original destination register size. This patch checks it and use smaller mode if required. Bootstrapped and tested on

Re: [PATCH] Trust TREE_ADDRESSABLE

varpool_node_for_decl): Mark public or external variables as TREE_ADDRESSABLE. * cgraphunit.c (varpool_finalize_decl): Likewise. * gcc.dg/torture/20140610-1.c: New testcase. * gcc.dg/torture/20140610-2.c: Likewise. Index: gcc/tree.h ===

RE: [PATCH] Fix PR61306: improve handling of sign and cast in bswap

> From: Richard Biener [mailto:richard.guent...@gmail.com] > Sent: Wednesday, June 04, 2014 5:39 PM > To: Thomas Preud'homme > > > I'm failing to get why you possibly need two casts ... you should > only need one, from the bswap/load result to the final type > (zero-extended as you say - so the

Re: ipa-visibility TLC 2/n

On Sun, Jun 8, 2014 at 6:44 PM, Jan Hubicka wrote: >> Honza, >> >> I finally was able to bootstrap GCC on AIX yesterday. The bootstrap >> works, but the testsuite results are in extremely bad shape: 250 >> failures in G++ testsuite and 470 failures in libstdc++ testsuite. > > David, this is first

[PATCH][AArch64] Add a big-endian lane flip at expand-time in saturating math patterns

Hi all, On some of the saturating math expanders we need to perform a lane flip on big-endian when expanding to RTL so that we keep consistent with GCCs' view of lane numbering. During assembly emission the pattern will perform another lane flip to translate from GCCs' numbering to the architec

RE: [PATCH] Fix PR61306: improve handling of sign and cast in bswap

> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches- > ow...@gcc.gnu.org] On Behalf Of Thomas Preud'homme > > Is this OK for trunk? Does this bug qualify for a backport patch to > 4.8 and 4.9 branches? I forgot to mention that this was tested via bootstrap on x86_64-linux-gnu target, the t

Re: Move DECL_SECTION_NAME into symtab

On Mon, Jun 9, 2014 at 4:34 AM, Jan Hubicka wrote: > Hi, > this patch follows the change to move DECL_COMDAT_GROUP by moving > DECL_SECTION_NAME > into symtab nodes instead of keeping it in decl_with_vis. (I pla to proceed > with > other symbol table related fields). > > It follows exactly same

Re: [PATCH][AArch64] Add a big-endian lane flip at expand-time in saturating math patterns

On 10/06/14 09:53, Kyrill Tkachov wrote: Hi all, On some of the saturating math expanders we need to perform a lane flip on big-endian when expanding to RTL so that we keep consistent with GCCs' view of lane numbering. During assembly emission the pattern will perform another lane flip to transl

Re: [PATCH] Fix PR61375: cancel bswap optimization when value doesn't fit in a HOST_WIDE_INT

On Tue, Jun 10, 2014 at 4:30 AM, Thomas Preud'homme wrote: > When analyzing a bitwise AND with a constant as part of a bitwise OR, > the bswap pass stores the constant in a int64_t variable without checking > if it fits. As a result, we get ICE when the constant is an __int128 value. > This affect

Re: Commit policy? Re: [PATCH 7/7] Plug ipa-prop escape analysis into gimple_call_arg_flags

On Tue, Jun 10, 2014 at 8:47 AM, Thomas Schwinge wrote: > Hi! > > On Tue, 3 Jun 2014 11:55:44 +0200, I wrote: >> Ping -- OK to commit to trunk? > > Even though several of those who I'd consider regular GCC developers do > agree with this patch (see also ), that is > no

[PATCH, loop2_invariant, 1/2] Check only one register class

Hi, For loop2-invariant pass, when flag_ira_loop_pressure is enabled, function gain_for_invariant checks the pressures of all register classes. This does not make sense since one invariant might impact only one register class. The patch enhances functions get_inv_cost and gain_for_invariant to ch

[PATCH, loop2_invariant, 2/2] Change heuristics for identical invariants

Hi, When analysing logs of loop2-invariant of eembc, I found the same invariant occurred lots of times in a loop. But it was not selected since its cost was not high and register pressure was high. Logs show performance improvement by giving them higher priority to move. The patch changes the heu

[PATCH, loop2_invariant] Skip inv (marked as move) from depends_on

Hi, The patch skips an invariant from depends_on if it has been marked as "move" since its register pressure and cost had been taken into account in previous iterations. Bootstrap and no make check regression on X86-64. Bootstrap and no make check regression on X86-64 with flag_ira_loop_pressure

Re: [PATCH][ARM][doc] Improve description of AArch32 CRC32 intrinsics

On 09/06/14 11:06, Kyrill Tkachov wrote: > Hi all, > > The ACLE intrinsics documentation for arm can be improved a bit. > > Since there are potentially other ACLE intrinsics besides the CRC32 ones > in the future, I moved the comment about their availability into the > CRC32 intrinsics subsecti

[PATCH, loop2_invariant] Pre-check invariants

Hi, During tests, I found some invariants could not be replaced at the last stage. If we can identify such invariants earlier, we can skip them and give the chance to other invariants. So the patch pre-checks candidates to skip the one which can not make a valid insn during replacement in move_in

[PATCH] Fix PR61456

The following fixes an issue with nonoverlapping_component_refs_of_decl_p (and the latent same issue in nonoverlapping_component_refs_p). We can't rely on all variant types having the same TYPE_FIELDS, so the following simply uses DECL_FIELD_CONTEXT directly (which is either the same for shared T

[PATCH][AArch64][1/2] Implement CRC32 ACLE intrinsics

Hi all, This is an implementation of the ACLE intrinsics that can be used to access the CRC32 instructions. We have them already implemented in aarch32. You can find their definition and documentation at http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053c/IHI0053C_acle_2_0.pdf The CRC32

Re: [C++ Patch] PR 19200

Hi, On 06/10/2014 03:40 AM, Jason Merrill wrote: I think the parser approach is more correct. I suspected that, in fact it's the first approach I tried, but the additional parameter in many places made me a little nervous and persisted ;) On 06/09/2014 07:02 PM, Paolo Carlini wrote:

[PATCH][AArch64][2/2] Add CRC32 ACLE intrinsics testsuite

Hi all, This is the testsuite for the CRC32 ACLE intrinsics. They are done in much the same way as the aarch32 tests in gcc.target/arm/acle/acle.exp except that these are modified to run at -O2 optimisation level. These pass now on aarch64. Ok for trunk after patch [1/2]? Thanks, Kyrill 20

Re: [PATCH, Fortran] PR61234: -Wuse-no-only

> This explicitly tests that no bogus error message is issued > for a use statement that has an only qualifier ? I don't see the need for '! { dg-bogus "has no ONLY qualifier" }'. AFAICT there is no warning emitted for this line (unless you add -Wall) and if some day it happens that an error/warni

Re: [PING, PATCH2/2, PR52252] Vectorization for load/store groups of size 3.

ping. The changes are similar to already committed on loads group. On Tue, Jun 3, 2014 at 5:22 PM, Evgeny Stupachenko wrote: > I've added a bug report for the stores group case: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61403 > > > On Wed, May 28, 2014 at 5:18 PM, Evgeny Stupachenko > wrot

Re: [PATCH AArch64 / testsuite] Add V1DFmode, fixes PR/59843

On 15 May 2014 17:12, Alan Lawrence wrote: > Oops, I missed: > > gcc/ChangeLog: > 2014-05-15 Alan Lawrence > > * config/aarch64/aarch64-modes.def: Add V1DFmode. > * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): > Support V1DFmode. > > gcc/testsuite/ChangeLo

Re: [PATCH, x86] Improves x86 permutation expand

The stability of the changes are covered in gcc.dg/vect/pr52252-ld.c Test on "pblend" scan I'll add with the patch: https://gcc.gnu.org/ml/gcc-patches/2014-06/msg00795.html On Tue, Jun 10, 2014 at 12:19 AM, H.J. Lu wrote: > On Mon, Jun 9, 2014 at 12:49 PM, Richard Henderson wrote: >> On 06/09/20

Re: [PATCH] Sink loads (fix PR59299)

On Sat, 7 Jun 2014, Eric Botcazou wrote: > > The following adds the missing capability to sink loads to > > tree-ssa-sink.c. This enables sinking of loads and dependent > > expressions into code paths that uses them (thus performing > > partial dead code elimination on loads). > > There is a muc

[PATCH] Add testcases from PR57186

The fix for PR59299 fixed two testcases referenced in PR57186. Tested on x86_64-unknown-linux-gnu, applied. Richard. 2014-06-10 Richard Biener PR tree-optimization/57186 PR tree-optimization/59299 * gcc.dg/tree-ssa/ssa-sink-11.c: New testcase. * gcc.dg/tree-s

[PATCH, i386] Remove use of vpmacsdql instruction from multiplication.

Hi, The below patch fixes the issue with 64-bit multiplication. The instruction "vpmacsdql" does signed 32-bit multiplication. For V2DImode, we require widened unsigned multiplication. So, replacing the "vpmacsdql" instruction with "vpmuludq" and "vpaddq". This patch had been already discussed in

Re: [PATCH, loop2_invariant] Pre-check invariants

On Tue, Jun 10, 2014 at 11:55 AM, Zhenqiang Chen wrote: > > * loop-invariant.c (find_invariant_insn): Skip invariants, which > can not make a valid insn during replacement in move_invariant_reg. > > --- a/gcc/loop-invariant.c > +++ b/gcc/loop-invariant.c > @@ -881,6 +881,35 @@ find_

Re: [PATCH, loop2_invariant] Skip inv (marked as move) from depends_on

On Tue, Jun 10, 2014 at 11:32 AM, Zhenqiang Chen wrote: > > * loop-invariant.c (get_inv_cost): Skip invariants, which are marked > as "move", from depends_on. > This is OK. Ciao! Steven

Re: [PATCH AArch64] Remove from arm_neon.h functions not in the spec

On 29 May 2014 17:47, Alan Lawrence wrote: > Patch retaining vfmaq_n_f64 attached, updated gcc/ChangeLog: > > * config/aarch64/arm_neon.h (vmlaq_n_f64, vmlsq_n_f64, vrsrtsq_f64, > > vcge_p8, vcgeq_p8, vcgez_p8, vcgez_u8, vcgez_u16, vcgez_u32, > vcgez_u64, > vcgezq_p8, vcgez

Re: [PATCH, loop2_invariant, 1/2] Check only one register class

On Tue, Jun 10, 2014 at 11:22 AM, Zhenqiang Chen wrote: > Hi, > > For loop2-invariant pass, when flag_ira_loop_pressure is enabled, > function gain_for_invariant checks the pressures of all register > classes. This does not make sense since one invariant might impact > only one register class. > >

Re: [PATCH, loop2_invariant, 2/2] Change heuristics for identical invariants

On Tue, Jun 10, 2014 at 11:23 AM, Zhenqiang Chen wrote: > * loop-invariant.c (struct invariant): Add a new member: eqno; > (find_identical_invariants): Update eqno; > (create_new_invariant): Init eqno; > (get_inv_cost): Compute comp_cost wiht eqno; > (gain_fo

[PATCH] Fix PR61438

The following fixes PR61438 - when moving the PHI insertion inhibiting code I forgot to guard it so that it only runs for PRE. Bootstrap/regtest pending on x86_64-unknown-linux-gnu. Richard. 2014-06-10 Richard Biener PR tree-optimization/61438 * tree-ssa-pre.c (eliminate_dom

[PATCH] Fix PR61452

The following fixes PR61452 - when keeping a lattice value at VARYING we shouldn't adjust the lattice ->expr or ->has_constants. Bootstrap and regtest pending on x86_64-unknown-linux-gnu. Richard. 2014-06-10 Richard Biener PR tree-optimization/61452 * tree-ssa-sccvn.c (visit

Re: [PING, PATCH2/2, PR52252] Vectorization for load/store groups of size 3.

On Tue, 10 Jun 2014, Evgeny Stupachenko wrote: > ping. > The changes are similar to already committed on loads group. Ok. Thanks, Richard. > On Tue, Jun 3, 2014 at 5:22 PM, Evgeny Stupachenko wrote: > > I've added a bug report for the stores group case: > > https://gcc.gnu.org/bugzilla/show_bu

[Patch, GCC/Thumb-1]Mishandle the label type insn in function thumb1_reorg

Hi There, The thumb1_reorg function use macro INSN_CODE to find expected instructions. But the macro INSN_CODE doesn’t work for label type instruction. The INSN_CODE(label_insn) will return the label number. When we have a lot of labels and current label_insn is the first insn of basic block, the

Re: [PATCH 1/7] Add missing documentation of four IPA-CP params

On Wed, 21 May 2014, Martin Jambor wrote: > +@item ipa-cp-loop-hint-bonus > +When IPA-CP determines that a cloning candidate would make the number > +of iterations of a loop known, it adds a bonus of ^ > +@option{ipa-cp-loop-hint-bonus} bonus to the p

Re: [PATCH, PR52252] Alternative way of vectorization for load groups of size 2 and 3.

ix86_reassociation_width checks INTEGRAL_MODE_P and FLOAT_MODE_P which include vector mode. I'll try to separate this into scalar and vector part, but it will require more testing (under the testing now). What about the rest of the patch? Thanks, Evgeny On Thu, Jun 5, 2014 at 3:54 PM, Ramana Radh

Re: [PATCH, i386] Remove use of vpmacsdql instruction from multiplication.

On Tue, Jun 10, 2014 at 12:30 PM, Gopalasubramanian, Ganesh wrote: > Hi, > > The below patch fixes the issue with 64-bit multiplication. > The instruction "vpmacsdql" does signed 32-bit multiplication. > For V2DImode, we require widened unsigned multiplication. > So, replacing the "vpmacsdql" inst

Re: ipa-visibility TLC 2/n

On Sun, Jun 8, 2014 at 12:58 PM, Jan Hubicka wrote: > Hi, > this is the last part. It makes DECL_VIRTUAL to be copied when creating > aliases. This is > needed to make sanity check in gimple-fold happy (it checks that vtables are > DECL_VIRTUAL). > It also resets initializers of aliases to sav

[AArch64] Fix REG_CFA_RESTORE mode.

Looks like a copy n paste error originally. Committed. /Marcuscommit f6a9bafb21d26b2e7d767b392bea0f60c31701d5 Author: Marcus Shawcroft Date: Fri Jun 6 14:26:50 2014 +0100 [AArch64] Fix REG_CFA_RESTORE mode. diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bf68f34..c510f44 100644 --- a/g

[COMMITTED] [AArch64] Fix layout of frame related functions.

Fixing various white space issues in the frame layout code. Committed. /Marcusdiff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index e7f455b..3eb18e9 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -1917,7 +1917,6 @@ aarch64_save_or_restore

Re: [PATCH][AArch64] Add a big-endian lane flip at expand-time in saturating math patterns

On 10 June 2014 09:53, Kyrill Tkachov wrote: > * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane): > New expander. > (aarch64_sqrdmulh_lane): Likewise. > (aarch64_sqdmulh_lane): Rename to... > (aarch64_sqdmulh_lane_interna): ...this. > (aarch64_sqdmulh_laneq): New exp

[patch] implement std::experimental::any

This patch implements std::experimental::any from the Fundamentals TS, including small-object optimisation, uses-allocator construction and partial support for -fno-rtti (I should probably disable the allocator-extended constructors when RTTI is disabled, or any_cast doesn't work). The allocator-

Re: [PATCH, PR61446] Fix mode for register copy in REE pass

> This patch fixes PR61446. ... Confirmed, it also allows to bootstrap Core* targets. Could it be reviewed and committed ASAP? TIA Dominique

Re: [gomp4] Add tables generation

On 04/17/2014 08:33 PM, Ilya Verbin wrote: Could you please take a look at this patch? It fixes the ordering issue in the tables stated above, and passes all the tests that I have. But I'm not sure about its correctness from the architectural point of view. I'm still skeptical relying on orde

Re: [PING*2][PATCH] Extend mode-switching to support toggle (1/2)

On 13 May 2014 22:41, Oleg Endo wrote: > Right. I was thinking to add FPSCR.SZ mode switching to SH, in order to > do float vector moves. For that SZ and PR need to be switched both at > the same time (only SH4A has both, fpchg and fschg). So basically I'd > add another mode entity, which woul

[PATCH][AArch64]Add testcases to cover various pro/epi stack layout

This patch add testcases for various aarch64 prologue/epilogue scenarios. It will make sure our later frame code refine and improvement will not cause any regression. OK for trunk? Thanks. gcc/testsuite/ * gcc.target/aarch64/test_frame_common.h: New pattern file. * gcc.target/aarch64/test_

Re: [PATCH][AARCH64]Support full addressing modes for ldr/str in vectorization scenarios

Hello, This commit (211211) causes gcc.target/aarch64/vect-mull.c execution test to FAIL for target aarch64_be-none-elf. (tested using qemu) Christophe. On 3 June 2014 13:08, Marcus Shawcroft wrote: > On 28 May 2014 08:30, Bin.Cheng wrote: >> Missing patch. >> >> On Wed, May 28, 2014 at 3:02

Re: [PATCH][AArch64]Add testcases to cover various pro/epi stack layout

On 10 June 2014 15:03, Jiong Wang wrote: > This patch add testcases for various aarch64 prologue/epilogue scenarios. > > It will make sure our later frame code refine and improvement will not cause > any regression. > > OK for trunk? > > Thanks. > > gcc/testsuite/ > * gcc.target/aarch64/test_fram

Re: [PATCH][AARCH64]Support full addressing modes for ldr/str in vectorization scenarios

On 10 June 2014 15:29, Christophe Lyon wrote: > Hello, > > This commit (211211) causes gcc.target/aarch64/vect-mull.c execution > test to FAIL for target aarch64_be-none-elf. > (tested using qemu) Yep, that is exactly what Bin said in his original submission.. /Marcus >>> On Wed, May 28, 2014 a

Re: [RFC][ARM] TARGET_ATOMIC_ASSIGN_EXPAND_FENV hook

On Tue, Jun 10, 2014 at 12:25 AM, Kugan wrote: > On 30/05/14 18:35, Ramana Radhakrishnan wrote: >>> + if (!TARGET_VFP) >>> +return; >>> + >>> + /* Generate the equivalence of : >> >> s/equivalence/equivalent. >> >> Ok with that change and if no regressions. > > Hi Ramana, > > Sorry, I missed

Re: [C++ Patch] PR 19200

On 06/10/2014 05:58 AM, Paolo Carlini wrote: && (friendp == 0 || dname == current_class_name)) Can't we just drop the dname condition here, rather than clear ctype later? That seems to be specifically what we're fixing: a friend is not a member function even if it has the same name a

Re: [C++ Patch] PR 19200

Hi, > On 10/giu/2014, at 16:32, Jason Merrill wrote: > >> On 06/10/2014 05:58 AM, Paolo Carlini wrote: >>&& (friendp == 0 || dname == current_class_name)) > > Can't we just drop the dname condition here, rather than clear ctype later? > That seems to be specifically what we're fixing:

Re: [C++ Patch] PR 19200

On 06/10/2014 11:19 AM, Paolo Carlini wrote: Back to you in a few hours, but I suspect we would have trouble with the famous struct S { friend S::S(); }; compiled with -fpermissive. I don't think so; that should be handled later in grokdeclarator by if (declarator && d

[PATCH][AArch64] Fix some reg-to-reg move scheduler types

Hi all, This patch corrects the insn types used for scheduling for some of our move patterns. GP->FP moves have type f_mcr FP->GP moves have type f_mrc GP->GP moves have type mov_reg FP->FP moves have type fmov. Bootstrapped on aarch64-none-linux-gnu and tested aarch64-none-elf. Ok for trunk

Re: [PATCH][AArch64] Fix some reg-to-reg move scheduler types

On 10 June 2014 16:37, Kyrill Tkachov wrote: > Hi all, > > This patch corrects the insn types used for scheduling for some of our move > patterns. > GP->FP moves have type f_mcr > FP->GP moves have type f_mrc > GP->GP moves have type mov_reg > FP->FP moves have type fmov. > > > Bootstrapped on aar

Re: [PR 61424] std::regex matches right to left, not leftmost longest

diff --git a/libstdc++-v3/include/bits/regex.tcc b/libstdc++-v3/include/bits/regex.tcc index a81f517..6a1faaf 100644 --- a/libstdc++-v3/include/bits/regex.tcc +++ b/libstdc++-v3/include/bits/regex.tcc @@ -70,7 +70,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION // without defining a macro. Users shou

Re: Move DECL_SECTION_NAME into symtab

> On Mon, Jun 9, 2014 at 4:34 AM, Jan Hubicka wrote: > > Hi, > > this patch follows the change to move DECL_COMDAT_GROUP by moving > > DECL_SECTION_NAME > > into symtab nodes instead of keeping it in decl_with_vis. (I pla to proceed > > with > > other symbol table related fields). > > > > It fol

Re: ipa-visibility TLC 2/n

> Honza, > > Thanks for this patch which improves some of the G++ testsuite > failures, but most of the libstdc++ testsuite continues to fail on > AIX. Yep, I am still looking into this. Just made new alias verifier that catches quite few nonsenses in how C++ builds thunks and same body aliases.

Re: [gomp4] Add tables generation

On 10 Jun 15:52, Bernd Schmidt wrote: > On 04/17/2014 08:33 PM, Ilya Verbin wrote: > >+{ > >+ /* Collect all omp-target global variables to offload_vars, if they have > >not > >+ been gathered earlier by input_offload_tables. */ > >+ if (vec_safe_is_empty (offload_vars)) > > What if a vari

Re: [PATCH] Delete temporary string within demangler even in failure cases.

On 27/05/2014 2:47 PM, Ian Lance Taylor wrote: > On Tue, May 27, 2014 at 3:57 AM, Andrew Burgess wrote: >> >> libiberty/ChangeLog >> >> * cplus-dem.c (do_type): Call string_delete even if the call to >> demangle_template fails. > > This is OK. > > Thanks. > > I have to ask: you

[patch] libstdc++/61390 don't redeclare template-parameters

Yo dawg, I heard you like templates, so I renamed the template-parameters of your template template-parameters so they are not the same as the template-parameters of your templates. G++ fails to diagnose this (PR17267) but Clang gives an error and EDG gives a warning. Tested x86_64-linux, commit

PING: Re: [PATCH] demangler, only access valid fields for DEMANGLE_COMPONENT_FIXED_TYPE.

Ping! Thanks for your time, Andrew On 29/05/2014 1:02 AM, Andrew Burgess wrote: > On 28/05/2014 11:56 PM, Pedro Alves wrote: >> On 05/28/2014 09:38 PM, Andrew Burgess wrote: >>> >>> diff --git a/libiberty/testsuite/demangle-expected >>> b/libiberty/testsuite/demangle-expected >>> index 453f9a3..

Re: [PATCH, libbid]: Fix "variable ‘Ql’ set but not used" warnings

On Mon, May 26, 2014 at 6:52 PM, Uros Bizjak wrote: > Attached patch fixes several "variable ‘Ql’ set but not used" warnings > in bid128_div.c and bid64_div.c libbid sources. We can simply use > __mul_128x128_high functions when lowpart is not needed. > > 2014-05-26 Uros Bizjak > > * bid12

Re: [PATCH 2/8] Speed up lookup_constraint

On 06/05/14 15:29, Richard Sandiford wrote: lookup_constraint is also an out-of-line switch-based function. Since most constraints are still single-letter ones, it should be more efficient to have a lookup array for the single-character case and an out-of-line function for the more complicated on

Re: [PATCH 3/8] Speed up constraint_satisfied_p

On 06/05/14 15:30, Richard Sandiford wrote: After the earlier changes, the only important function that switches on constraint_num is constraint_satisfied_p (now constraint_satisfied_p_1). Since constraint_num is a dense enum, it seems faster to use a jump table instead. In many cases this allow

Re: [PATCH 1/8] Faster checks for constraint types

On 06/05/14 15:26, Richard Sandiford wrote: genpreds.c defines routines insn_extra_memory_constraint and insn_extra_address_constraint for testing whether a particular constraint_num is a memory or address constraint. At the moment it uses an out-of-line switch-based function to do this, but if

Re: [PATCH 5/8] Remove unused operand_alternative fields

On 06/05/14 15:33, Richard Sandiford wrote: This patch just gets rid of some write-only operand_alternative fields, which makes things easier for the later patches to preprocess_constraints. Richard gcc/ * recog.h (operand_alternative): Remove offmem_ok, nonffmem_ok, decmem_ok

Re: [PATCH 6/8] Treat 'I'-'P' as separate subtype

On 06/05/14 15:37, Richard Sandiford wrote: This patch extends patch 4 to have a CT_CONST_INT type for CONST_INT constraints ('I'-'P'), which are already handled by things like constraint_satisfied_p. On its own this has little effect, since most places handle 'I'-'P' as a separate case statemen

Re: [PATCH 7/8] Remove 'I'-'P' and 'G'/'H' cases

On 06/05/14 15:41, Richard Sandiford wrote: After the previous patch, we can remove the separate 'I'-'P' and 'G'/'H' cases without increasing compile time. I didn't bother adding the kind of fast-path for 'G'/'H' that I did for 'I'-'P' since it should be much rarer. This removes the last use of

[Fortran-CAF][Fortran-DEV] Merge from the trunk into the branch

I have merged the trunk into the Fortran-caf branch (as Rev. 211423) and into the Fortran-dev branch (as Rev. 211427). Tobias

[PATCH] libstdc++/testsuite: Fix a 4402.cc compilation error

Hi, I needed some diagnostics to sort out a failure observed on one of our targets in 27_io/basic_ostream/inserters_arithmetic/wchar_t/4402.cc in the libstdc++ test suite and defined the `TEST_NUMPUT_VERBOSE' macro referred there. That resulted in a compilation error like below: .../libstdc+

Re: [PATCH 4/8] Remove old macros and make lookup_constraint explicit

On 06/05/14 15:32, Richard Sandiford wrote: Now that all extra constraints are defined in .md files, there's no real need for the old REG_CLASS_FROM_CONSTRAINT-style macros. The macros also seem dangerous performance-wise, since each one contains an embedded call to lookup_constraint. This mean

Re: [PR 61424] std::regex matches right to left, not leftmost longest

On Tue, Jun 10, 2014 at 9:54 AM, Jonathan Wakely wrote: > I'm sure this is because I still don't understand all the regex code, > but doesn't this change mean that for an "extended" mode regex with > backrefs, the user could define _GLIBCXX_REGEX_USE_THOMPSON_NFA and > backrefs wouldn't work? Sor

Re: [C++ Patch] PR 19200

Hi, On 06/10/2014 05:31 PM, Jason Merrill wrote: On 06/10/2014 11:19 AM, Paolo Carlini wrote: Back to you in a few hours, but I suspect we would have trouble with the famous struct S { friend S::S(); }; compiled with -fpermissive. I don't think so; that should be handled late

Re: [PATCH 8/8] Add a common .md file and define standard constraints there

On 06/05/14 15:43, Richard Sandiford wrote: This final patch uses a common .md file to define all standard constraints except 'g'. It then gets rid of explicit case statements for the standard constraints, except in two cases: (1) recog.c:asm_operand_ok still needs to handle 'o' specially for

Re: [Patch ARM/testsuite 00/22] Neon intrinsics executable tests

On Thu, Jun 5, 2014 at 11:04 PM, Christophe Lyon wrote: > This is patch series is a more complete version of the patch I sent > some time ago: > https://gcc.gnu.org/ml/gcc-patches/2013-10/msg00624.html > > I have created a series of patches to help review. The 1st one adds > some documentation, t

[PATCH] GCC/MMIX: Remove orphan mmix_asm_output_source_line prototype

Hi, I've noticed mmix_asm_output_source_line is declared, but nowhere defined. OK to remove the prototype? 2014-06-10 Maciej W. Rozycki gcc/ * config/mmix/mmix-protos.h (mmix_asm_output_source_line): Remove prototype. Maciej gcc-mmix-prototype-fix.patch Index:

Re: ipa-visibility TLC 2/n

On Tue, Jun 10, 2014 at 2:02 PM, Jan Hubicka wrote: >> Honza, >> >> Thanks for this patch which improves some of the G++ testsuite >> failures, but most of the libstdc++ testsuite continues to fail on >> AIX. > > Yep, I am still looking into this. Just made new alias verifier that > catches quite

Re: ipa-visibility TLC 2/n

> Honza, > > I am not sure that the problem is caused only by aliases and thunks. > The large increase in AIX linker warnings about branches not followed > by nop also worry me. > > Your patch was about visibility. How does the more aggressive ipa-visibility is a pass that basically bring extern

Re: [PATCH] libstdc++/testsuite: Fix a 4402.cc compilation error

On 10/06/14 20:24 +0100, Maciej W. Rozycki wrote: The reason is cout is a plain character stream and does not accept wide characters. An obvious fix is below, verified to produce correct output. OK to apply? Yes OK, thanks.

Re: [PATCH] libstdc++/testsuite: Fix a 4402.cc compilation error

On Wed, 11 Jun 2014, Jonathan Wakely wrote: > > The reason is cout is a plain character stream and does not accept wide > > characters. An obvious fix is below, verified to produce correct output. > > > > OK to apply? > > Yes OK, thanks. Committed, thanks for your review. Maciej

Re: [PATCH] GCC/MMIX: Remove orphan mmix_asm_output_source_line prototype

On Tue, 10 Jun 2014, Maciej W. Rozycki wrote: > Hi, > > I've noticed mmix_asm_output_source_line is declared, but nowhere > defined. OK to remove the prototype? Sure; in fact, obvious. brgds, H-P

Re: [PATCH] Trust TREE_ADDRESSABLE

t, right? Honza > > Thanks, > Richard. > > 2014-06-10 Richard Biener > > * tree.h (TREE_ADDRESSABLE): Clarify. > * varpool.c (varpool_node_for_decl): Mark public or external > variables as TREE_ADDRESSABLE. > * cg

Re: [PING*2][PATCH] Extend mode-switching to support toggle (1/2)

41 # of unexpected successes 1 # of expected failures 90 # of unresolved testcases 2 # of unsupported tests 1585 /ssd/adapteva/bld-epiphany/gcc/xgcc version 4.10.0 20140608 (experimental) (Epiphany toolchain (built 20140610)) This is the same as before applying the pat

Re: Move DECL_SECTION_NAME into symtab

Hi, this patch proceeds with the conversion of sections to symtab. It adds the verifier I described in previous mail and fixes the fallout. It also moves implicit_section flag from decl to cgraph. Next step I would like to do is to add an hashtable dictionary of sections used and move representati

Re: [Fortran-CAF][Fortran-DEV] Merge from the trunk into the branch

Tobias Burnus wrote: I have merged the trunk into the Fortran-caf branch (as Rev. 211423) and into the Fortran-dev branch (as Rev. 211427). For fortran-dev, I had to fix a merge fallout, see attachment (committed as Rev. 211435). Tobias Index: trans-openmp.c ===

[PATCH, cpp] Fix line directive bug‏

--disable-libgcj Thread model: posix gcc version 4.10.0 20140610 (experimental) (GCC) Cheers, Nicholas Ormrod