Joern Rennecke writes:
> Quoting Richard Sandiford :
>> Joern Rennecke writes:
>>> Quoting Richard Sandiford :
The fact that we even have shared unique ids is pretty bad -- and surely
a contradiction in terms -- but I think both ways of handling them rely
on the length being the sa
Joern Rennecke writes:
> @@ -1165,6 +1175,7 @@ shorten_branches (rtx first ATTRIBUTE_UN
> get the current insn length. If it has changed, reflect the change.
> When nothing changes for a full pass, we are done. */
>
> + bool first_pass ATTRIBUTE_UNUSED = true;
>while (somethin
Hi,
this patch fixes BUILT_IN_UNREACHABLE declaration of C frontned. The function
is also pure (so DSE can do its job). As a special case ECF flags for
CONST & NORETURN also add looping, so this declaration is correct.
The implicit declaration of the builtin is already set this way.
Bootstrappe
Quoting Richard Sandiford :
I think instead the set-up loop should have:
if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
{
#ifdef CASE_VECTOR_SHORTEN_MODE
if (increasing && GET_CODE (body) == ADDR_DIFF_VEC)
PUT_MODE (body, CASE_VECTOR_SHO
Hi,
Quite a few tests fail for big-endian multilibs which use VFP
instructions at present. One reason for many of these is glaringly
obvious once you notice it: for D registers interpreted as two S
registers, the lower-numbered register is always the less-significant
part of the value, and the hig
Joern Rennecke writes:
> Quoting Richard Sandiford :
>> I think instead the set-up loop should have:
>>
>> if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
>> {
>> #ifdef CASE_VECTOR_SHORTEN_MODE
>>if (increasing && GET_CODE (body) == ADDR_DIFF_VEC)
>>
> * expmed.c (lowpart_bit_field_p): New function.
> (store_bit_field_1): Remove unit, offset, bitpos and byte_offset
> from the outermost scope. Express conditions in terms of bitnum
> rather than offset, bitpos and byte_offset. Split the plain move
> cases into two,
Hi,
the TLC path I sent last week became outdated for few reaons. I decided to
split it up for easier reviewing.
This is simple correcntess issue I am comitting as obvoius - my last update to
loop-iv missed the fact
that loop-iv bounds may depend on further conditions. In that case we can not
r
> > > > What about the conservative variant of simply
> > > >
> > > > else
> > > > delta = double_int_one;
> > >
> > > I think it would be bad idea: it makes us to completely unroll one
> > > interation
> > > too many that bloats code for no benefit. No optimization cancels the
>
After recent patches there were too many regressions of LRA on GCC
testsuite on x86 and x86-64.
The following patch fixes all of them.
It was successfully bootstrapped on x86/x86-64.
Committed as rev. 192637.
2012-10-20 Vladimir Makarov
* lra.c (check_rtx): Don't check UNSPEC
Hi,
this patch fixes heuristic on decide_unroll_constant_iterations to take into
account the profile: even when the loop is known to have constant loop
iteration bound, it doesn't need to really iterate many times. So use profile
and loop_max to double check that this is the case.
Bootstrapped/re
On 10/19/2012 11:41 PM, Ramana Radhakrishnan wrote:
> On Tue, Oct 16, 2012 at 10:25 AM, Chung-Lin Tang
> wrote:
>> On 12/9/27 6:25 AM, Janis Johnson wrote:
>>> On 09/26/2012 01:58 AM, Chung-Lin Tang wrote:
>>>
>>> +/* { dg-do compile } */
>>> +/* { dg-options "-mthumb -O1 -march=armv5te -fno-omit-
> The patch was fully tested on x86_64-suse-linux, where it removes half of
> the useless stores in the original testcase for PR rtl-optimization/54315,
> and manually tested for arm-linux-gnueabi (for now), where it also removes
> stores for small structures. Comments?
>
> 2012-10-08 Eric Botcaz
On Wed, 10 Oct 2012, Andreas Krebbel wrote:
> the attached patch adds initial support for the latest release of
> the IBM mainframe series - the IBM zEnterprise EC12 (zEC12).
Nice. Can you please also add a note to the release notes at
gcc-4.8/changes.html ?
In principle, I'm also in favor of ad
On Sat, Oct 20, 2012 at 4:38 AM, Julian Brown wrote:
> Hi,
>
> Quite a few tests fail for big-endian multilibs which use VFP
> instructions at present. One reason for many of these is glaringly
> obvious once you notice it: for D registers interpreted as two S
> registers, the lower-numbered regis
...and some other simplifications and improvements I noticed on
the way.
This was triggered by a note that the sources.redhat.com DNS entry
is going to go away at some point in the future that I got yesterday.
Applied.
Gerald
2012-10-21 Gerald Pfeifer
* news.html: Replace reference
The following patch fixes PR54991.
Committed as rev. 192645.
2012-10-20 Vladimir Makarov
PR rtl-optimization/54991
* lra-constraints.c (lra_constraints): Change equiv memory check
on reverse equivalence check.
(inherit_in_ebb): Invalidate usage insns for multi-word hard regs.
With a simulator that doesn't just allocate zeros on any access, it's
necessary to tell the simulator the bounds of defined memory, both for
static and dynamically allocated memory. This patch implements static
code and data allocatation; zero'd data and constants may not be
otherwise loaded. A p
CC:ing middle-end maintainers this time. I was a bit surprised
when Eric Botcazou wrote in his review, quoted below, that he's
not one of you. Maybe approve that too?
On Mon, 15 Oct 2012, Hans-Peter Nilsson wrote:
> On Fri, 12 Oct 2012, Eric Botcazou wrote:
> > > (insn 168 49 51 3 (set (reg/f:D
For mmix-knuth-mmixware, MAX_FIXED_MODE_SIZE is the default,
GET_MODE_BITSIZE (DImode), which of course isn't larger than the
size-type, the same size on this 64-bit target. I don't think making
it larger (i.e. TImode) would help: that seems instead likely to
introduce awkward spurious non-host_in
Hi Sterling,
the last thread pointer builtin changes left an unused 'arg' variable in
xtensa_expand_builtin(), which triggered a new warning. Thanks to
Jan-Benedict for testing this. Attached patch was committed as obvious.
Thanks,
Chung-Lin
* config/xtensa/xtensa.c (xtensa_expand_builtin
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