Re: [patch][rfc] Clean up CFG dumping

Steven, I think your patch broke bootstrapping with Graphite enabled. Tobias PS: Possible patch, I haven't checked whether "0" makes sense or something else should be used. --- a/gcc/graphite-poly.c +++ b/gcc/graphite-poly.c @@ -675,3 +675,3 @@ print_pbb_body (FILE *file, poly_bb_p pbb, int

Commit: ARM: Document -munaligned-access

Hi Guys, I am checking in this patch to the mainline to document the ARM port's -munaligned-access command line option. Cheers Nick gcc/ChangeLog 2012-07-18 Nick Clifton * doc/invoke.texi (ARM Options): Document -munaligned-access. Index: gcc/doc/invoke.texi ==

Re: [SH] Add test case for PR 38621

On Tue, 2012-07-17 at 15:26 -0700, Mike Stump wrote: > On Jul 17, 2012, at 1:06 PM, Oleg Endo wrote: > > The attached patch adds the test case from comment #3 of PR 38621 to the > > test suite. > > > > Tested with > > make check-gcc RUNTESTFLAGS="compile.exp=pr38621.c --target_board=sh-sim > > \{-

Re: [PATCH] Add flag to control straight-line strength reduction

On Tue, 17 Jul 2012, William J. Schmidt wrote: > I overlooked adding a pass-control flag for strength reduction, added > here. I named it -ftree-slsr for consistency with other -ftree- flags, > but could change it to -fgimple-slsr if you prefer that for a pass named > gimple-ssa-... > > Bootstra

Re: [PATCH 1/2] gcc symbol database

Yunfeng ZHANG writes: >> It took me a couple of minutes to understand what you meant here, so >> please let me re-phrase to make sure I got it. >> >> You are saying that the callback function of the cb_lex_token event is >> set by the callback function of the macro_start_expand event. >> >> Is th

Re: [patch][rfc] Clean up CFG dumping

On Wed, Jul 18, 2012 at 2:24 AM, H.J. Lu wrote: > This caused: > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54008 Yes, they failed in my testing, too. I must have been blind to overlook them... I received some comments in private about the "new look" of the dumps, that I'll be addressing with

Re: [patch][rfc] Clean up CFG dumping

On Wed, Jul 18, 2012 at 9:00 AM, Tobias Burnus wrote: > Steven, > > I think your patch broke bootstrapping with Graphite enabled. Yes it did. That's twice in one week, because Graphite isn't enabled for builds on the compile farm. I'll see if I can install the necessary libraries on the machines

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, Jul 18, 2012 at 9:59 AM, Richard Guenther wrote: > On Tue, 17 Jul 2012, William J. Schmidt wrote: > >> I overlooked adding a pass-control flag for strength reduction, added >> here. I named it -ftree-slsr for consistency with other -ftree- flags, >> but could change it to -fgimple-slsr if

Re: [ARM Patch 1/3]PR53189: optimizations of 64bit logic operation with constant

On Tue, Jul 17, 2012 at 9:47 PM, Ramana Radhakrishnan wrote: > Carrot, > > Sorry about the delayed response. > > On 3 July 2012 12:28, Carrot Wei wrote: >> On Thu, Jun 28, 2012 at 12:14 AM, Ramana Radhakrishnan >> wrote: >>> On 28 May 2012 11:08, Carrot Wei wrote: Hi This is the

Re: [PATCH] Re-work get_object_alignment (again)

> Now, back to PR53970, where #pragma pack() is used to pack a > struct. With #pragma pack() no part of the type or field-decls > have a hint that packing took place (well, their align information > tell you), which means the vectorizers use of contains_packed_reference > is not conservative enoug

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, 18 Jul 2012, Steven Bosscher wrote: > On Wed, Jul 18, 2012 at 9:59 AM, Richard Guenther wrote: > > On Tue, 17 Jul 2012, William J. Schmidt wrote: > > > >> I overlooked adding a pass-control flag for strength reduction, added > >> here. I named it -ftree-slsr for consistency with other -f

Re: [PATCH] Add flag to control straight-line strength reduction

> In the past, -fstrength-reduce applied to loop strength reduction in > loop.c. I don't think it should be re-used for a completely different > code transformation. Seconded. -- Eric Botcazou

Re: [Fortran, Patch] Fix #line parsing

On 07/17/2012 11:29 PM, Tobias Burnus wrote: Mikael Morin wrote: On 17/07/2012 20:52, Tobias Burnus wrote: Build and regtested on x86-64-gnu-linux. OK for the trunk? I should have bootstrapped and not just build the patch. It then fails in libgfortran: Warning: libgfortran/kinds-override.h

Re: [ARM Patch 1/3]PR53189: optimizations of 64bit logic operation with constant

On 18 July 2012 09:20, Carrot Wei wrote: > On Tue, Jul 17, 2012 at 9:47 PM, Ramana Radhakrishnan > wrote: >> Carrot, >> >> Sorry about the delayed response. >> >> On 3 July 2012 12:28, Carrot Wei wrote: >>> On Thu, Jun 28, 2012 at 12:14 AM, Ramana Radhakrishnan >>> wrote: On 28 May 2012 11

Re: Commit: ARM: Document -munaligned-access

On 18 July 2012 07:51, Nick Clifton wrote: > Hi Guys, > > I am checking in this patch to the mainline to document the ARM port's > -munaligned-access command line option. Could you ask if RM's object to backporting this to the 4.7 branch. ? Thanks, ramana > > Cheers > Nick > > gcc/ChangeL

Fwd: Re: Commit: ARM: Document -munaligned-access

Hi Richard, I have a documentation update for the 4.7 branch. Is it OK to apply this ? Cheers Nick gcc/ChangeLog 2012-07-18 Nick Clifton * doc/invoke.texi (ARM Options): Document -munaligned-access. Index: gcc/doc/invoke.texi

Re: Fwd: Re: Commit: ARM: Document -munaligned-access

On Wed, 18 Jul 2012, nick clifton wrote: > Hi Richard, > > I have a documentation update for the 4.7 branch. Is it OK to apply this ? Sure. Thanks, Richard. > Cheers > Nick > > > gcc/ChangeLog > > 2012-07-18 Nick Clifton > > > > * doc/invoke.texi (ARM Options): Document -muna

[PATCH] Fix PR53970

With get_object_alignment and get_object_or_type_alignment fused it is now easy to fix PR53970 and remove the bogus contains_packed_reference function. The vectorizer wants to know whether the scalar access is aligned in a way that peeling can eventually reach VF * scalar alignment (thus, vector

Re: [ARM Patch 1/3]PR53189: optimizations of 64bit logic operation with constant

On Wed, Jul 18, 2012 at 5:39 PM, Ramana Radhakrishnan wrote: > On 18 July 2012 09:20, Carrot Wei wrote: >> On Tue, Jul 17, 2012 at 9:47 PM, Ramana Radhakrishnan >> wrote: >>> Carrot, >>> >>> Sorry about the delayed response. >>> >>> On 3 July 2012 12:28, Carrot Wei wrote: On Thu, Jun 28, 2

Re: [PATCH 4/6] Thread pointer built-in functions, s390

On 07/12/2012 08:52 AM, Chung-Lin Tang wrote: > * config/s390/s390.c (s390_builtin,code_for_builtin_64, > code_for_builtin_31,s390_init_builtins,s390_expand_builtin): > Remove. > (s390_expand_builtin_thread_pointer): Add hook function for > TARGET_EXPAND_BUIL

[Ada] Fix spurious 'noreturn' function does return warning at -O0 (1)

This fixes a spurious 'noreturn' function does return warning at -O0 on code involving controlled types. Tested on x86_64-suse-linux, applied on the mainline. 2012-07-18 Eric Botcazou * gcc-interface/trans.c (stmt_group_may_fallthru): New function. (gnat_to_gnu) : Use it to

[patch] Fix spurious 'noreturn' function does return warning at -O0 (2)

This fixes a spurious 'noreturn' function does return warning at -O0 on code involving an exception block. I overlooked this case when I implemented the mechanism in gimple-low.c during the 4.5 development phase. Tested on x86_64-suse-linux, OK for the mainline? 2012-07-18 Eric Botcazou

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, 2012-07-18 at 11:01 +0200, Richard Guenther wrote: > On Wed, 18 Jul 2012, Steven Bosscher wrote: > > > On Wed, Jul 18, 2012 at 9:59 AM, Richard Guenther wrote: > > > On Tue, 17 Jul 2012, William J. Schmidt wrote: > > > > > >> I overlooked adding a pass-control flag for strength reduction,

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, 2012-07-18 at 08:24 -0500, William J. Schmidt wrote: > On Wed, 2012-07-18 at 11:01 +0200, Richard Guenther wrote: > > On Wed, 18 Jul 2012, Steven Bosscher wrote: > > > > > On Wed, Jul 18, 2012 at 9:59 AM, Richard Guenther > > > wrote: > > > > On Tue, 17 Jul 2012, William J. Schmidt wrote

[PATCH] [MIPS] Support for -mmcu and -mno-mcu

Hi Richard, This patch adds support for the -mmcu option to gcc. Okay to commit? Thanks, Catherine 2012-07-18 Maciej W. Rozycki Chao-ying Fu * config/mips/mips.opt (mmcu): New option. * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define _mips_mcu whe

Re: Fix PR c++/19351 (operator new[] overflow)

On 06/26/2012 10:29 AM, Florian Weimer wrote: + /* Set to (size_t)-1 if the size check fails. */ + if (size_check != NULL_TREE) +*size = fold_build3 (COND_EXPR, sizetype, size_check, +original_size, TYPE_MAX_VALUE (sizetype)); VEC_safe_insert (tree, gc, *args, 0

Re: [PATCH] Add flag to control straight-line strength reduction

Here's the patch with documentation changes included. I also cleaned up missing work from a couple of my previous patches, so -fhoist-adjacent-loads is documented now, and -fvect-cost-model is added to the list of options on by default at -O3. Ok for trunk? Thanks, Bill 2012-07-18 Bill Schmid

[patch] Fix ICE in set_lattice_value

This is a regression present on mainline and 4.7 branch for targets using SJLJ exceptions by default in Ada (e.g. ARM). The error message is: +===GNAT BUG DETECTED==+ | 4.8.0 20120716 (experimental) [trunk revision 189525] (x86_64-suse-linux) G

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, Jul 18, 2012 at 3:24 PM, William J. Schmidt wrote: > It turns out I was looking at a very old copy of the manual, and the > -ftree... stuff is not as prevalent now as it once was. I'll just go > with -fslsr to be consistent with -fgcse, -fipa-sra, etc. Sadly, it is more prevalent than it

[patch] Fix GIMPLE verification failure on CONSTRUCTOR

This is a regression present on mainline and 4.7 branch. The error message is: p.adb: In function 'P.Proc': p.adb:3:4: error: non-trivial conversion at assignment system__address void (*) (void) r.callback.callback.address = q__proc; +===GNAT BUG DETECTED=

Re: Fix PR c++/19351 (operator new[] overflow)

On 07/18/2012 03:55 PM, Jason Merrill wrote: On 06/26/2012 10:29 AM, Florian Weimer wrote: + /* Set to (size_t)-1 if the size check fails. */ + if (size_check != NULL_TREE) +*size = fold_build3 (COND_EXPR, sizetype, size_check, + original_size, TYPE_MAX_VALUE (sizetype));

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, 18 Jul 2012, William J. Schmidt wrote: > Here's the patch with documentation changes included. I also cleaned up > missing work from a couple of my previous patches, so > -fhoist-adjacent-loads is documented now, and -fvect-cost-model is added > to the list of options on by default at -O3

Re: [PATCH] Add flag to control straight-line strength reduction

On Wed, 18 Jul 2012, Steven Bosscher wrote: > On Wed, Jul 18, 2012 at 3:24 PM, William J. Schmidt > wrote: > > It turns out I was looking at a very old copy of the manual, and the > > -ftree... stuff is not as prevalent now as it once was. I'll just go > > with -fslsr to be consistent with -fgcs

[patch] Fix ICE during out-of-SSA

This is a regression present on mainline and 4.7 branch for targets using SJLJ exceptions by default in Ada (e.g. ARM). The error message is: Unable to coalesce ssa_names 2 and 20 which are marked as MUST COALESCE. b1_2(ab) and b1_20(ab) +===GNAT BUG DETECTED

Re: [patch] Fix ICE in set_lattice_value

On Wed, Jul 18, 2012 at 4:05 PM, Eric Botcazou wrote: > This is a regression present on mainline and 4.7 branch for targets using SJLJ > exceptions by default in Ada (e.g. ARM). The error message is: > > +===GNAT BUG DETECTED==+ > | 4.8.0 201207

Re: [patch] Fix GIMPLE verification failure on CONSTRUCTOR

On Wed, Jul 18, 2012 at 4:25 PM, Eric Botcazou wrote: > This is a regression present on mainline and 4.7 branch. The error message > is: > > p.adb: In function 'P.Proc': > p.adb:3:4: error: non-trivial conversion at assignment > system__address > void (*) (void) > r.callback.callback.address = q

Re: [patch] Fix ICE during out-of-SSA

On Wed, Jul 18, 2012 at 4:54 PM, Eric Botcazou wrote: > This is a regression present on mainline and 4.7 branch for targets using SJLJ > exceptions by default in Ada (e.g. ARM). The error message is: > > Unable to coalesce ssa_names 2 and 20 which are marked as MUST COALESCE. > b1_2(ab) and b1_2

Re: [patch] Add v850-*-rtems*

On 07/17/12 17:11, Ralf Corsepius wrote: Hi, The patch below adds an v850-*-rtems* target configuration to GCC. It's a sightly modified copy of the v850*-*-* target, with some RTEMS specific changes added. I would like to apply this patch to trunk and gcc-4_7-branch. OK to commit? Yes. This

[Patch, Fortran] Allow assumed-shape arrays with BIND(C) for TS29113

This patch was written on top of the big assumed-shape patch.* However, it should also work by itself. Bootstrapped and regtested on x86-64-linux. OK for the trunk? Tobias * http://gcc.gnu.org/ml/fortran/2012-07/msg00052.html 2012-07-18 Tobias Burnus * decl.c (gfc_verify_c_interop_param):

Re: [patch] Add v850-*-rtems*

On 07/18/2012 05:02 PM, Jeff Law wrote: On 07/17/12 17:11, Ralf Corsepius wrote: Hi, The patch below adds an v850-*-rtems* target configuration to GCC. It's a sightly modified copy of the v850*-*-* target, with some RTEMS specific changes added. I would like to apply this patch to trunk and gc

Re: [PATCH] New fdo summary-based icache sensitive unrolling (issue6351086)

Ping (retrying ping in plain text mode so that it goes through properly). Thanks, Teresa On Wed, Jul 11, 2012 at 10:42 AM, Teresa Johnson wrote: > Ports some patches related to improving FDO program summary information > and using it to guide loop unrolling from google branches to mainline. > Th

Re: [PATCH, testsuite] Skip 20101011-1.c for bare-metal m68k

On Jul 17, 2012, at 7:00 PM, Sandra Loosemore wrote: > Like the subject line says; this is consistent with the existing test to bail > out for MIPS bare-metal. OK for mainline? Ok.

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

On Mon, Jul 16, 2012 at 01:14:08PM -0700, H.J. Lu wrote: > Hi, > > This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. > It fixed: > > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 > > Hi, Here is the patch with updated ChangeLog entry. X32 has the same issue as MIP

Re: PR libjava/53973: Check and and skip 67h address size prefix for x32

On Mon, Jul 16, 2012 at 02:04:41PM -0700, H.J. Lu wrote: > Hi, > > Since x32 may generate 64-bit integer divide like > > 67 48 f7 bd a0 fe ff ff idivq -0x160(%ebp) > > we need to check and skip 67h address size for x32. OK for trunk if > there are no regressions on Linux/x86-64? > > T

[RESEND-2][PATCH] Allow printing of escaped curly braces in assembler directives with operands

Hi, Resending. I did not get any responses the last two times and I too forgot about it. Can someone please review this? Thanks, Siddhesh Begin forwarded message: Date: Tue, 3 Apr 2012 18:46:53 +0530 From: Siddhesh Poyarekar To: gcc-patches@gcc.gnu.org Subject: Fw: [PATCH] Allow printing of es

RE: [committed] PR 51931: force non-MIPS16ness for long-branch tests (NOW RFA: MIPS16 Long Branch Patch)

Hi Richard, Now that we are in the window for 4.8, I'd like to discuss the possibility of applying this patch. Have you had a chance to think about it? Thanks, Catherine > -Original Message- > From: Richard Sandiford [mailto:rdsandif...@googlemail.com] > Sent: Monday, February 06, 2012

[patch] More cleanups for CFG dumping

On Wed, Jul 18, 2012 at 10:08 AM, Steven Bosscher wrote: > On Wed, Jul 18, 2012 at 2:24 AM, H.J. Lu wrote: >> This caused: >> >> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54008 > > Yes, they failed in my testing, too. I must have been blind to overlook > them... > > I received some comments in

Re: [PATCH] [MIPS] Support for -mmcu and -mno-mcu

"Moore, Catherine" writes: > +mmcu > +Target Report Mask(MCU) > +Use MCU instructions Please use Var(TARGET_MCU) instead, in order to avoid eating up target_flags. OK with that change, thanks. Richard

Re: [Patch, mips] Fix compiler abort with -mips32r2 -mips16 -msynci

"Steve Ellcey " writes: > While working on my favorite mips option (-msynci) I noticed an odd thing. > If I compile with '-mips32 -mips16 -msynci' I got a warning about synci not > being supported but if I compiled with '-mips32r2 -mips16 -msynci' I did not > get a warning, even though -mips16 mod

Re: [PATCH 1/2] if-to-switch conversion pass

On Tue, Jul 17, 2012 at 01:21:00PM +0200, Tom de Vries wrote: > /* The root of the compilation pass tree, once constructed. */ > extern struct opt_pass *all_passes, *all_small_ipa_passes, > *all_lowering_passes, >Index: gcc/tree-if-switch-conversion.c >===

Re: PR libjava/53973: Check and and skip 67h address size prefix for x32

On 07/18/2012 05:30 PM, H.J. Lu wrote: > 2012-07-16 H.J. Lu > > PR libjava/53973 > * include/x86_64-signal.h (CHECK_67H_PREFIX): New. > (HANDLE_DIVIDE_OVERFLOW): Check and and skip 67h address size > prefix if CHECK_67H_PREFIX is 1. Use ULL suffix for 64-bit > int

[patch] PR debug/53948

Hello, This is my proposed fix for PR53948. We don't want to put user variables in callee-clobbered registers, but obviously function arguments are OK there. REG_USERVAR_P is set on PARM_DECLs and on user variables, so it can't be used to distinguish between the two. As it turns out, I can hi-jac

Re: PR libjava/53973: Check and and skip 67h address size prefix for x32

On Wed, Jul 18, 2012 at 7:34 PM, Andrew Haley wrote: > On 07/18/2012 05:30 PM, H.J. Lu wrote: >> 2012-07-16 H.J. Lu >> >> PR libjava/53973 >> * include/x86_64-signal.h (CHECK_67H_PREFIX): New. >> (HANDLE_DIVIDE_OVERFLOW): Check and and skip 67h address size >> prefix if

Re: [patch] PR debug/53948

Hello Steven, On Wed, 18 Jul 2012 19:46:16 +0200, Steven Bosscher wrote: > This is my proposed fix for PR53948. I can't speak for the GCC code but could it have a GCC testcase? Thanks, Jan

Re: PR libjava/53973: Check and and skip 67h address size prefix for x32

On Wed, Jul 18, 2012 at 10:47 AM, Uros Bizjak wrote: > On Wed, Jul 18, 2012 at 7:34 PM, Andrew Haley wrote: >> On 07/18/2012 05:30 PM, H.J. Lu wrote: >>> 2012-07-16 H.J. Lu >>> >>> PR libjava/53973 >>> * include/x86_64-signal.h (CHECK_67H_PREFIX): New. >>> (HANDLE_DIVIDE_OVER

Re: [patch] PR debug/53948

On Wed, Jul 18, 2012 at 7:55 PM, Jan Kratochvil wrote: > Hello Steven, > > On Wed, 18 Jul 2012 19:46:16 +0200, Steven Bosscher wrote: >> This is my proposed fix for PR53948. > > I can't speak for the GCC code but could it have a GCC testcase? I wouldn't know what to test for. Looking for a .loc m

[PATCH]: Add entity argument to MODE_AFTER macro

Hello! As with all other mode switching macros, we need to pass entity index also to MODE_AFTER macro. In a multi-entity mode switching case, we usually don't have same modes for all entities, and we should be able to return the mode that applies to a specific entity. It looks that epiphany port a

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

On Wed, Jul 18, 2012 at 6:27 PM, H.J. Lu wrote: >> This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. >> It fixed: >> >> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 > > Here is the patch with updated ChangeLog entry. X32 has the same issue > as MIPS n32, which was fi

Re: [patch] PR debug/53948

On Wed, 18 Jul 2012 20:05:46 +0200, Steven Bosscher wrote: > I wouldn't know what to test for. Looking for a .loc marker seems a bit > fragile. What is fragile on // { dg-final { scan-assembler-times "\\.loc\t1 3 0\\r\\n\t\[^.\]" 6 } } or something like that. Line numbers are constant for the t

Re: PR #53525 - track-macro-expansion performance regression

Hello Dimitrios, > With the attached patches I introduce four new obstacks in struct > cpp_reader to substitute malloc's/realloc's when expanding > macros. Numbers have been posted in the PR, but to summarize: > > before: 0.785 s or 2201 M instr > after: 0.760 s or 2108 M instr > > Memory ove

Re: [patch v2] support for multiarch systems

Hi! On Sun, 08 Jul 2012 20:48:23 +0200, Matthias Klose wrote: > Please find attached v2 of the patch updated for trunk 20120706, x86 only, > tested on > x86-linux-gnu, KFreeBSD and the Hurd. As suggested by Diego Novillo I have now attached this patch to . > I left

Re: [patch] PR debug/53948

On Wed, Jul 18, 2012 at 08:55:17PM +0200, Jan Kratochvil wrote: > On Wed, 18 Jul 2012 20:05:46 +0200, Steven Bosscher wrote: > > I wouldn't know what to test for. Looking for a .loc marker seems a bit > > fragile. > > What is fragile on > // { dg-final { scan-assembler-times "\\.loc\t1 3 0\\r\\n\

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

On Wed, Jul 18, 2012 at 11:44 AM, Uros Bizjak wrote: > On Wed, Jul 18, 2012 at 6:27 PM, H.J. Lu wrote: > >>> This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. >>> It fixed: >>> >>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 >> >> Here is the patch with updated Chang

Re: [PATCH] Define FFI_SIZEOF_JAVA_RAW to 4 for x32

On Wed, Jul 18, 2012 at 9:10 PM, H.J. Lu wrote: This patch defines FFI_SIZEOF_JAVA_RAW to 4 for x32, similar to MIPS n32. It fixed: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53982 >>> >>> Here is the patch with updated ChangeLog entry. X32 has the same issue >>> as MIPS n32

Re: cosmetic change - simplify cse.c:preferable()

Hey Dimitrios, I can't say much about your patch, so I am CC-ing the maintainers. Thanks. Dimitrios Apostolou a écrit: > Hello, > > I've had this patch some time now, it's simple and cosmetic only, I > had done it while trying to understand expression costs in CSE. I > think it's more readable

cp-demangle PATCH to handle C++ casts

When I ran the C++ testsuite with -fabi-version defaulting to 0, I noticed a couple of tests that failed because they were expecting the =2 mangling. I also noticed that the demangler didn't understand the correct mangling for new-style casts. Tested x86_64-pc-linux-gnu, applying to trunk. co

Re: [PATCH 1/2] if-to-switch conversion pass

Bernhard, thanks for the review. On 18/07/12 19:32, Bernhard Reutner-Fischer wrote: > On Tue, Jul 17, 2012 at 01:21:00PM +0200, Tom de Vries wrote: > >> /* The root of the compilation pass tree, once constructed. */ >> extern struct opt_pass *all_passes, *all_small_ipa_passes, >> *all_lowering

Re: [PATCH 1/2] if-to-switch conversion pass

On Wed, Jul 18, 2012 at 11:30 PM, Tom de Vries wrote: >>> +tree-if-switch-conversion.o : tree-if-switch-conversion.c $(CONFIG_H) \ >>> +$(SYSTEM_H) $(TREE_H) $(TM_P_H) $(TREE_FLOW_H) $(DIAGNOSTIC_H) \ >>> +$(TREE_INLINE_H) $(TIMEVAR_H) $(TM_H) coretypes.h $(TREE_DUMP_H) \ >>> +$(GIMPLE

Re: [Patch, mips] Fix compiler abort with -mips32r2 -mips16 -msynci

On Wed, 2012-07-18 at 18:30 +0100, Richard Sandiford wrote: > The abort sounds like the bug here. It's deliberate that things like > -msynci, -mbranch-likely, etc., are OK with -mips16. On the one hand, > you could compile with -mips16 but have an __attribute__((nomips16)) > function that could

Re: [PATCH] Fix PR53970

On Wed, 18 Jul 2012, Richard Guenther wrote: > Bootstrapped on x86_64-unknown-linux-gnu, testing in progress. > > Richard. > > 2012-07-18 Richard Guenther > > PR tree-optimization/53970 > * tree.h (contains_packed_reference): Remove. > * expr.c (contains_packed_reference):

Re: [patch v2] support for multiarch systems

On Sun, 08 Jul 2012, Matthias Klose wrote: > Please find attached v2 of the patch updated for trunk 20120706, x86 only, > tested on > x86-linux-gnu, KFreeBSD and the Hurd. Currently, Debian gcc packages for hppa contain multiarch support. Because of this, I have used a multiarch patch for testi

Re: [PATCH 1/2] gcc symbol database

To Dodji Seketeli: Thanks for you check my patch, I will release it again later. Yunfeng

Re: [C++ RFC / Patch] PR 51213 ("access control under SFINAE")

On 07/12/2012 07:06 PM, Jason Merrill wrote: I notice that your patch changes the behavior of C++98/03 mode as well, which seems wrong to me; I think this is a big enough change that we should limit it to C++11 mode. ...except that I can't figure out what the semantics before this DR were real

Re: PR53914, rs6000 constraints and reload queries

Thanks very much Uli for verifying my conclusions about reload, operand predicates and constraints, and particularly the general unusability of the "o" constraint. Re http://gcc.gnu.org/ml/gcc/2012-07/msg00142.html, this patch adds the missing secondary reload patterns, corrects constraints I got

Re: [patch v2] support for multiarch systems

From: John David Anglin Date: Wed, 18 Jul 2012 21:12:26 -0400 > I imagine other Debian ports are in a similar situation. GCC hacking has been extremely painful on sparc for me because of this debian multiarch situation, so yes I'm in this group as well.

[PATCH] Intrinsics for ADCX, ADOX, RDSEED and PREFETCHW

Hi, This patch adds new intrinsics for new ADCX, ADOX, RDSEED and PREFETCHW instructions, introduced here: http://software.intel.com/en-us/avx/ Bootstrapped on x86-64, testing is in progress. Is it ok for trunk? Changelog entry: 2012-07-17 Michael Zolotukhin * common/config/i386/i386