On Thu, Jul 15, 2021 at 09:15:55AM -0500, Peter Bergner wrote:
> On 7/14/21 4:12 PM, Peter Bergner wrote:
> > I'll make the change above and rebuild just to be safe and then commit.
>
> Regtesting was clean as expected, so I pushed the commit to trunk. Thanks.
> Is this ok for backporting to GCC
On 7/14/21 4:12 PM, Peter Bergner wrote:
> I'll make the change above and rebuild just to be safe and then commit.
Regtesting was clean as expected, so I pushed the commit to trunk. Thanks.
Is this ok for backporting to GCC 11 after a day or two on trunk?
Given GCC 10 doesn't have the opaque mod
On 7/13/21 5:59 PM, Segher Boessenkool wrote:
>> - && adjacent_mem_locations (str_mem, str_mem2))
>> + && adjacent_mem_locations (str_mem, str_mem2) != NULL_RTX)
>
> ... so don't change this? Or write != 0 != 0 != 0, if one time is good,
> three times must be better! :-
Hi!
On Tue, Jul 13, 2021 at 12:14:22PM -0500, Peter Bergner wrote:
> +/* If the target storage locations of arguments MEM1 and MEM2 are
> + adjacent, then return the argument that has the lower address.
> + Otherwise, return NULL_RTX. */
>
> -static bool
> +static rtx
> adjacent_mem_locati
On Tue, Jul 13, 2021 at 12:09:07PM -0500, Peter Bergner wrote:
> On 7/10/21 7:39 PM, seg...@gate.crashing.org wrote:
> > It is very hard to see the differences now. Don't fold the changes into
> > one patch, just have the code movement in a separate trivial patch, and
> > then the actual changes a
On 7/13/21 12:14 PM, Peter Bergner wrote:
> ...and patch 2:
[snip]
> I'm currently bootstrapping and regtesting these two patches and
> will report back. Better now?
Ok, this along with the previous move patch bootstrapped and regtested
with no regressions on powerpc64le-linux.
Peter
else
>> +opnd = XVECEXP (src, 0, nvecs - i - 1);
>
> Put this together with the case below as well? Probably keep the
> WORDS_BIG_ENDIAN test as the outer "if"?
Ok, reworked a little bit.
I'm currently bootstrapping and regtesting these tw
On 7/10/21 7:39 PM, seg...@gate.crashing.org wrote:
> It is very hard to see the differences now. Don't fold the changes into
> one patch, just have the code movement in a separate trivial patch, and
> then the actual changes as a separate patch? That way it is much easier
> to review :-)
Ok, I
On Fri, Jul 09, 2021 at 06:14:49PM -0500, Peter Bergner wrote:
> Ok, I removed the consecutive_mem_locations() function from the previous
> patch and just call adjacent_mem_locations() directly now. I also moved
> rs6000_split_multireg_move() to later in the file to fix the declaration
> issue. H
On 7/9/21 6:14 PM, Peter Bergner wrote:
> ...code section. Does this look better? I'm currently running bootstraps
> and regtests on LE and BE.
Bootstrap and regtesting on both LE and BE showed no regressions.
Peter
On 7/8/21 8:26 PM, Peter Bergner wrote:
> We do need different code for LE versus BE. So you want something like
>
> if (WORDS_BIG_ENDIAN) {...} else {...}
>
> ...instead? I can try that to see if the code is easier to read.
[snip]
> Let me make the changes you want and I'll repost with what
On Thu, Jul 08, 2021 at 08:26:45PM -0500, Peter Bergner wrote:
> On 7/8/21 6:28 PM, Segher Boessenkool wrote:
> >> int index = WORDS_BIG_ENDIAN ? i : nvecs - 1 - i;
> >> -rtx dst_i = gen_rtx_REG (reg_mode, reg + index);
> >> -emit_insn (gen_rtx_SET (dst_i, XVECEXP (src, 0,
On 7/8/21 6:28 PM, Segher Boessenkool wrote:
> It needs testing on BE.
Will do.
>> +static bool consecutive_mem_locations (rtx, rtx);
>
> Please don't; just move functions to somewhere earlier than where they
> are used.
Will do.
>> @@ -16841,8 +16843,35 @@ rs6000_split_multireg_move (rtx
Hi!
On Thu, Jul 08, 2021 at 05:01:05PM -0500, Peter Bergner wrote:
> The MMA build built-ins currently use individual lxv instructions to
> load up the registers of a __vector_pair or __vector_quad. If the
> memory addresses of the built-in operands are to adjacent locations,
> then we could use
The MMA build built-ins currently use individual lxv instructions to
load up the registers of a __vector_pair or __vector_quad. If the
memory addresses of the built-in operands are to adjacent locations,
then we could use an lxvp in some cases to load up two registers at once.
The patch below adds
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