Here we introduce the flags that will be used for straight line speculation.
The new flag introduced is `-mharden-sls=`.
This flag can take arguments of `none`, `all`, or a comma seperated list
of one or more of `retbr` or `blr`.
`none` indicates no special mitigation of the straight line speculat
Matthew Malcomson writes:
> + aarch64_sls_hardening = SLS_NONE;
> + if (strcmp (const_str, "none") == 0)
> +{
> + aarch64_sls_hardening = SLS_NONE;
> + return;
Gah, I totally misread the previous patch and didn't see that
you were already setting aarch64_sls_hardening to SLS_NONE
With suggestions applied.
Here we introduce the flags that will be used for straight line speculation.
The new flag introduced is `-mharden-sls=`.
This flag can take arguments of `none`, `all`, or a comma seperated list of one
or more of `retbr` or `blr`.
`none` indicates no special mitigation o
Matthew Malcomson writes:
> On 23/06/2020 16:48, Richard Sandiford wrote:
>> Matthew Malcomson writes:
>>> @@ -14466,6 +14466,81 @@ aarch64_validate_mcpu (const char *str, const
>>> struct processor **res,
>>> return false;
>>> mfix-cortex-a53-835769
>>> Target Report Var(aarch64_fix_a53
On 23/06/2020 16:48, Richard Sandiford wrote:
Matthew Malcomson writes:
@@ -14466,6 +14466,81 @@ aarch64_validate_mcpu (const char *str, const struct
processor **res,
return false;
mfix-cortex-a53-835769
Target Report Var(aarch64_fix_a53_err835769) Init(2) Save
Workaround for ARM Cor
Matthew Malcomson writes:
> @@ -14466,6 +14466,81 @@ aarch64_validate_mcpu (const char *str, const struct
> processor **res,
>return false;
> }
>
> +
Should just be one blank line here.
> +/* Straight line speculation indicators. */
> +enum aarch64_sls_hardening_type
> +{
> +SLS_NON
Here we introduce the flags that will be used for straight line speculation.
The new flag introduced is `-mharden-sls=`.
This flag can take arguments of `none`, `all`, or a comma seperated list of one
or more of `retbr` or `blr`.
`none` indicates no special mitigation of the straight line speculat
Hi,
A new speculative cache side-channel vulnerability has been published at
the link below, named "straight-line speculation" (SLS in this patch series).
https://developer.arm.com/support/arm-security-updates/speculative-processor-vulnerability/downloads/straight-line-speculation
This vulnerabili
