Re: Rework subreg_get_info

2016-11-22 Thread Eric Botcazou
> Actually, thinking more about it: the assumption we're making in the > WORDS_BIG_ENDIAN != REG_WORDS_BIG_ENDIAN condition discussed below is > really: > > /* We assume that the ordering of registers within a multi-register > value has a consistent endianness: if bytes and register words >

Re: Rework subreg_get_info

2016-11-22 Thread Richard Sandiford
Eric Botcazou writes: >> Well, I think it's probably grammatical, but how about: >> >> If the register representation of a non-scalar mode has holes in it, >> we expect the scalar units to be concatenated together, with the holes >> distributed evenly among the scalar units. Each scalar un

Re: Rework subreg_get_info

2016-11-18 Thread Richard Sandiford
Joseph Myers writes: > On Tue, 15 Nov 2016, Richard Sandiford wrote: >> Richard Sandiford writes: >> > This isn't intended to change the behaviour, just rewrite the >> > existing logic in a different (and hopefully clearer) way. >> > The new form -- particularly the part based on the "block" >> >

Re: Rework subreg_get_info

2016-11-16 Thread Eric Botcazou
> Well, I think it's probably grammatical, but how about: > > If the register representation of a non-scalar mode has holes in it, > we expect the scalar units to be concatenated together, with the holes > distributed evenly among the scalar units. Each scalar unit must occupy > at least

Re: Rework subreg_get_info

2016-11-16 Thread Richard Sandiford
Eric Botcazou writes: >> This isn't intended to change the behaviour, just rewrite the >> existing logic in a different (and hopefully clearer) way. > > Yes, I agree that it's an improvement. A few remarks below. > >> diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c >> index ca6cced..7c0acf5 100644 >>

Re: Rework subreg_get_info

2016-11-16 Thread Eric Botcazou
> This isn't intended to change the behaviour, just rewrite the > existing logic in a different (and hopefully clearer) way. Yes, I agree that it's an improvement. A few remarks below. > diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c > index ca6cced..7c0acf5 100644 > --- a/gcc/rtlanal.c > +++ b/gcc/

Re: Rework subreg_get_info

2016-11-15 Thread Joseph Myers
On Tue, 15 Nov 2016, Richard Sandiford wrote: > Richard Sandiford writes: > > This isn't intended to change the behaviour, just rewrite the > > existing logic in a different (and hopefully clearer) way. > > The new form -- particularly the part based on the "block" > > concept -- is easier to con

Re: Rework subreg_get_info

2016-11-15 Thread Richard Sandiford
Richard Sandiford writes: > This isn't intended to change the behaviour, just rewrite the > existing logic in a different (and hopefully clearer) way. > The new form -- particularly the part based on the "block" > concept -- is easier to convert to polynomial sizes. > > Tested on aarch64-linux-gnu

Rework subreg_get_info

2016-11-15 Thread Richard Sandiford
This isn't intended to change the behaviour, just rewrite the existing logic in a different (and hopefully clearer) way. The new form -- particularly the part based on the "block" concept -- is easier to convert to polynomial sizes. Tested on aarch64-linux-gnu and x86_64-linux-gnu. OK to install?