s.
>>
>> Thanks
>> Gui Haochen
>>
>> ChangeLog
>> rs6000: Generate mfvsrwz for all platform and remove redundant zero extend
>>
>> mfvsrwz has lower latency than xxextractuw or vextuw[lr]x. So it should be
>> generated even with p9 vector enabl
0.html
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
>
> Thanks
> Gui Haochen
>
> ChangeLog
> rs6000: Generate mfvsrwz for all platform and remove redundant zero extend
>
> mfvsrwz has lower latency than xxextractuw or vextuw[lr]
ChangeLog
rs6000: Generate mfvsrwz for all platform and remove redundant zero extend
mfvsrwz has lower latency than xxextractuw or vextuw[lr]x. So it should be
generated even with p9 vector enabled. Also the instruction is already
zero extended. A combine pattern is needed to eliminate redundant z
c.gnu.org/pipermail/gcc-patches/2023-July/625128.html
Since the previous one is v2, this is actually v3. ;-)
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
>
> Thanks
> Gui Haochen
>
> ChangeLog
> rs6000: Generate mfvsrwz for all platform
BE and LE with no regressions.
Thanks
Gui Haochen
ChangeLog
rs6000: Generate mfvsrwz for all platform and remove redundant zero extend
mfvsrwz has lower latency than xxextractuw or vextuw[lr]x. So it should be
generated even with p9 vector enabled. Also the instruction is already
zero extended.
ped and tested on powerpc64-linux BE and LE with no regressions.
>
> Thanks
> Gui Haochen
>
>
> ChangeLog
> rs6000: Generate mfvsrwz for all subtargets and remove redundant zero extend
>
> mfvsrwz has lower latency than xxextractuw or vextuw[lr]x. So it should be
>
te mfvsrwz for all subtargets and remove redundant zero extend
mfvsrwz has lower latency than xxextractuw or vextuw[lr]x. So it should be
generated even with p9 vector enabled. Also the instruction is already
zero extended. A combine pattern is needed to eliminate redundant zero
extend instruct
> which can help eliminate redundant zero extend.
>
> Bootstrapped and tested on powerpc64-linux BE and LE with no regressions.
>
> Thanks
> Gui Haochen
>
>
> ChangeLog
> rs6000: Generate mfvsrwz for all platforms and remove redundant zero extend
>
> mf
tested on powerpc64-linux BE and LE with no regressions.
Thanks
Gui Haochen
ChangeLog
rs6000: Generate mfvsrwz for all platforms and remove redundant zero extend
mfvsrwz has lower latency than xxextractuw. So it should be generated
even with p9 vector enabled if possible. Also the instruction is
On 3/11/20 7:34 AM, Nidal Faour via Gcc-patches wrote:
> This patch is a code density oriented and attempt to remove redundant
> sign/zero extension from assignment statement.
> The approach taken is to use VRP data while expanding the assignment to RTL
> to determine whether a sign/zero extens
On Thu, 2020-03-12 at 14:43 -0700, Jim Wilson wrote:
> On Thu, Mar 12, 2020 at 2:38 AM Richard Biener via Gcc-patches
> wrote:
> > On Thu, Mar 12, 2020 at 4:06 AM Jeff Law via Gcc-patches
> > wrote:
> > > On Wed, 2020-03-11 at 13:04 +, Nidal Faour via Gcc-patches wrote:
> > > > This patch is
Hi!
On Thu, Mar 12, 2020 at 02:43:06PM -0700, Jim Wilson wrote:
> I looked at combine because I'm familiar with that pass, but the ree
> pass might be the right place to handle this.
IMO, part of this should perhaps be done on Gimple already. But the part
that should be done on RTL should be don
On Thu, Mar 12, 2020 at 2:38 AM Richard Biener via Gcc-patches
wrote:
>
> On Thu, Mar 12, 2020 at 4:06 AM Jeff Law via Gcc-patches
> wrote:
> >
> > On Wed, 2020-03-11 at 13:04 +, Nidal Faour via Gcc-patches wrote:
> > > This patch is a code density oriented and attempt to remove redundant
>
On Thu, Mar 12, 2020 at 4:06 AM Jeff Law via Gcc-patches
wrote:
>
> On Wed, 2020-03-11 at 13:04 +, Nidal Faour via Gcc-patches wrote:
> > This patch is a code density oriented and attempt to remove redundant
> > sign/zero
> > extension from assignment statement.
> > The approach taken is to u
On Wed, 2020-03-11 at 13:04 +, Nidal Faour via Gcc-patches wrote:
> This patch is a code density oriented and attempt to remove redundant
> sign/zero
> extension from assignment statement.
> The approach taken is to use VRP data while expanding the assignment to RTL to
> determine whether a si
: New test
+
2020-03-09 Marek Polacek
PR c++/92031 - bogus taking address of rvalue error.
Regards,
Nidal Faour
>-Original Message-
>From: David Malcolm
>Sent: Wednesday, 11 March 2020 15:12
>To: Nidal Faour ; gcc-patches@gcc.gnu.org
>Cc: Ofer Shinaar ; Craig B
On Wed, 2020-03-11 at 13:04 +, Nidal Faour via Gcc-patches wrote:
[...]
> diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
> index f91af78a302..c5a701e08af 100644
> --- a/gcc/testsuite/ChangeLog
> +++ b/gcc/testsuite/ChangeLog
> @@ -1,3 +1,7 @@
> +2020-02-19 Nidal Faour
> +
This patch is a code density oriented and attempt to remove redundant sign/zero
extension from assignment statement.
The approach taken is to use VRP data while expanding the assignment to RTL to
determine whether a sign/zero extension is necessary.
Thought the motivation of the patch is code den
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