> * function.h (regno_reg_rtx): Adjust comment.
> * reginfo.c (init_reg_modes_target): Only use the previous mode
> if it fits within one register. Remove MIPS comment.
OK, thanks.
--
Eric Botcazou
Eric Botcazou writes:
> I'm not sure about the assertion though: if it happens to trigger, the
> fix will probably entail far-reaching changes in the back-end, so it's
> probably safer to delay it until the next stage #1.
Yeah, that's probably true. How does this version look?
Thanks,
Richard
> I'm not sure REGNO_REG_CLASS is meaningful here, because many ports define
> subclasses of the natural architectural classes. E.g. MIPS has MD0_REG
> and MD1_REG for HI and LO (which is which depends on endianness), even
> though both are logically the same in terms of architectural class and
>
Eric Botcazou writes:
>> [ BTw, I think the MIPS comment is wrong. HARD_REGNO_NREGS (fpreg, SFmode)
>> is (now) 1, even when using paired FPRs. And the suggestion doesn't
>> seem at all ideal to me. OK to remove? ]
>
> You're the MIPS maintainer, so it's up to you.
OK, I'll remove it.
>>
> [ BTw, I think the MIPS comment is wrong. HARD_REGNO_NREGS (fpreg, SFmode)
> is (now) 1, even when using paired FPRs. And the suggestion doesn't
> seem at all ideal to me. OK to remove? ]
You're the MIPS maintainer, so it's up to you.
> A simple fix, which I've used below, is to make sur
