On 10/16/20 9:45 AM, Kito Cheng wrote:
I think it would be helpful! thanks!
Hello.
I've just installed the patches to master.
Martin
Hi Martin:
> I can do it earlier if it helps for the integration and testing purpose?
I think it would be helpful! thanks!
On Fri, Oct 16, 2020 at 3:33 PM Martin Liška wrote:
>
> On 8/19/20 11:25 AM, Kito Cheng via Gcc-patches wrote:
> > Could you update that for RV32, and this patch will be pe
On 8/19/20 11:25 AM, Kito Cheng via Gcc-patches wrote:
Could you update that for RV32, and this patch will be pending until
LLVM accepts the libsanitizer part.
Hello.
I've noticed that the libsanitizer part was accepted to LLVM. I'm planning to do
a merge upstream (for libsanitizer) and was pl
On Tue, Aug 25, 2020 at 12:39 PM Jim Wilson wrote:
> On Wed, Aug 19, 2020 at 1:02 AM Joshua via Gcc-patches
> wrote:
> > * config/riscv/riscv.c (asan_shadow_offset): Implement the offset
> > of asan shadow memory for risc-v.
> > (asan_shadow_offset): new macro definition.
>
> Whe
On Wed, Aug 19, 2020 at 1:02 AM Joshua via Gcc-patches
wrote:
> * config/riscv/riscv.c (asan_shadow_offset): Implement the offset of
> asan shadow memory for risc-v.
> (asan_shadow_offset): new macro definition.
When I try the patch, I get asan errors complaining about memory map
On Fri, Aug 21, 2020 at 12:04 AM Palmer Dabbelt wrote:
>
> On Wed, 19 Aug 2020 02:25:37 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
> > Hi Andrew:
> >
> > I am not sure the reason why some targets pick different numbers.
> > It seems it's not only target dependent but also OS dependent[1].
> >
> >
On Wed, 19 Aug 2020 02:25:37 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
Hi Andrew:
I am not sure the reason why some targets pick different numbers.
It seems it's not only target dependent but also OS dependent[1].
For RV32, I think using 1<<29 like other 32 bit targets is fine.
[1]
https://
Hi Andrew:
I am not sure the reason why some targets pick different numbers.
It seems it's not only target dependent but also OS dependent[1].
For RV32, I think using 1<<29 like other 32 bit targets is fine.
[1]
https://github.com/llvm/llvm-project/blob/master/compiler-rt/lib/asan/asan_mapping.
I'm having trouble understanding why different ports chose their
various constants--e.g., SPARC uses 1<<29 for 32-bit and 1<<43 for
64-bit, whereas x86 uses 1<<29 and 0x7fff8000, respectively. So I
can't comment on the choice of the constant 1<<36 for RISC-V. But
isn't it a problem that 1<<36 is
Hi Joshua, Jim:
> > +/* Implement TARGET_ASAN_SHADOW_OFFSET. */
> > +
> > +static unsigned HOST_WIDE_INT
> > +riscv_asan_shadow_offset (void)
> > +{
> > + return HOST_WIDE_INT_UC (0x1000);
> > +}
>
> Is there a reason why you used 0x1000?
>
> Looking at other targets, it appears the conv
On Thu, Jul 30, 2020 at 5:31 AM Joshua via Gcc-patches
wrote:
> +/* Implement TARGET_ASAN_SHADOW_OFFSET. */
> +
> +static unsigned HOST_WIDE_INT
> +riscv_asan_shadow_offset (void)
> +{
> + return HOST_WIDE_INT_UC (0x1000);
> +}
Is there a reason why you used 0x1000?
Looking at other ta
On Thu, Jul 30, 2020 at 6:28 AM Martin Liška wrote:
> What's the reason for sending the same patch multiple times
> from a different sender?
I see 3 in the gcc.gnu.org email archive, and I saw 3 on the NNTP feed
from gmane, but it seems only one of them ended up in my gmail inbox.
The other two a
Hello.
What's the reason for sending the same patch multiple times
from a different sender?
Thanks,
Martin
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