RE: [PATCH v6] RISC-V: Using merge approach to optimize repeating sequence

2023-05-29 Thread Li, Pan2 via Gcc-patches
l.com>>; gcc-patches mailto:gcc-patches@gcc.gnu.org>> Cc: Kito.cheng mailto:kito.ch...@sifive.com>>; Li, Pan2 mailto:pan2...@intel.com>>; Wang, Yanzhang mailto:yanzhang.w...@intel.com>> Subject: Re: [PATCH v6] RISC-V: Using merge approach to optimize repeating sequenc

RE: [PATCH v6] RISC-V: Using merge approach to optimize repeating sequence

2023-05-24 Thread Li, Pan2 via Gcc-patches
Oops, forget to remove it in previous version, will wait a while and update them together. Pan From: juzhe.zh...@rivai.ai Sent: Thursday, May 25, 2023 11:14 AM To: Li, Pan2 ; gcc-patches Cc: Kito.cheng ; Li, Pan2 ; Wang, Yanzhang Subject: Re: [PATCH v6] RISC-V: Using merge approach to

Re: [PATCH v6] RISC-V: Using merge approach to optimize repeating sequence

2023-05-24 Thread juzhe.zh...@rivai.ai
* machmode.h (VECTOR_BOOL_MODE_P): New macro. --- a/gcc/machmode.h +++ b/gcc/machmode.h @@ -134,6 +134,10 @@ extern const unsigned char mode_class[NUM_MACHINE_MODES]; || GET_MODE_CLASS (MODE) == MODE_VECTOR_ACCUM \ || GET_MODE_CLASS (MODE) == MODE_VECTOR_UACCUM) +/* Nonzero if MODE