On 2/9/25 5:20 AM, Vineet Gupta wrote:
On 2/8/25 23:02, Jeff Law wrote:
On 2/7/25 9:34 PM, Vineet Gupta wrote:
A couple of Vector pseudoinstructions use x0 scalar which being regfile
crosser could be inefficient on certain wider uarches.
Use the imm 0 form, which should be functionally equi
On 2/8/25 23:02, Jeff Law wrote:
> On 2/7/25 9:34 PM, Vineet Gupta wrote:
>> A couple of Vector pseudoinstructions use x0 scalar which being regfile
>> crosser could be inefficient on certain wider uarches.
>>
>> Use the imm 0 form, which should be functionally equivalent.
>>
>> pseudoinsn
The code change looks good to me. I defer to y'all's judgment as to
how it slots into the release.
On Sat, Feb 8, 2025 at 9:33 AM Jeff Law wrote:
>
>
>
> On 2/7/25 9:34 PM, Vineet Gupta wrote:
> > A couple of Vector pseudoinstructions use x0 scalar which being regfile
> > crosser could be ineffi
On 2/7/25 9:34 PM, Vineet Gupta wrote:
A couple of Vector pseudoinstructions use x0 scalar which being regfile
crosser could be inefficient on certain wider uarches.
Use the imm 0 form, which should be functionally equivalent.
pseudoinsnorig insn with x0 this patch
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