...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Bugfix for vls mode aggregated in GPR calling
convention
Thanks for fixing this bug! LGTM with one minor comment :)
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 7b6111aa545..1de69019cd4 100644
>
v2] RISC-V: Bugfix for vls mode aggregated in GPR calling
convention
Thanks for fixing this bug! LGTM with one minor comment :)
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 7b6111aa545..1de69019cd4 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/
Thanks for fixing this bug! LGTM with one minor comment :)
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 7b6111aa545..1de69019cd4 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -1382,6 +1382,38 @@ riscv_v_ext_mode_p (machine_mode mod