Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-26 Thread Jeff Law
On 7/23/24 6:15 PM, Patrick O'Neill wrote: From: Gianluca Guida This patch adds support for amocas.{b|h|w|d}. Support for amocas.q (64/128 bit cas for rv32/64) will be added in a future patch. Extension: https://github.com/riscv/riscv-zacas Ratification: https://jira.riscv.org/browse/RVS-68

Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-26 Thread Jeff Law
On 7/23/24 6:39 PM, Patrick O'Neill wrote: (define_expand "atomic_compare_and_swap" [(match_operand:SI 0 "register_operand" "") ;; bool output (match_operand:GPR 1 "register_operand" "") ;; val output (match_operand:GPR 2 "memory_operand" "");; memory - (match_operand:

Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-25 Thread Andrea Parri
On Tue, Jul 23, 2024 at 05:15:44PM -0700, Patrick O'Neill wrote: > From: Gianluca Guida > > This patch adds support for amocas.{b|h|w|d}. Support for amocas.q > (64/128 bit cas for rv32/64) will be added in a future patch. > > Extension: https://github.com/riscv/riscv-zacas > Ratification: https

Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-24 Thread Patrick O'Neill
On 7/23/24 19:48, Kito Cheng wrote: I incline do not add skip_zacas stuffs (although skip_zabha is already there but that's fine), because that's different situation compare to the zaamo/zalrsc, zaamo/zalrsc should automatically append if a extension is available, which is new behavior and new ex

Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-23 Thread Kito Cheng
I incline do not add skip_zacas stuffs (although skip_zabha is already there but that's fine), because that's different situation compare to the zaamo/zalrsc, zaamo/zalrsc should automatically append if a extension is available, which is new behavior and new extensions. But zacas is only added whe

Re: [PATCH v2] RISC-V: Add basic support for the Zacas extension

2024-07-23 Thread Patrick O'Neill
(define_expand "atomic_compare_and_swap" [(match_operand:SI 0 "register_operand" "") ;; bool output (match_operand:GPR 1 "register_operand" "") ;; val output (match_operand:GPR 2 "memory_operand" "");; memory - (match_operand:GPR 3 "reg_or_0_operand" "") ;; expected value