Pan
-Original Message-
From: Robin Dapp
Sent: Monday, February 24, 2025 7:44 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@gmail.com; jeffreya...@gmail.com; Robin
Dapp
Subject: Re: [PATCH v1] RISC-V: Fix bug for expand_const_vector interleave
[PR118931]
> I don't explore more cases here consider we are in stage 4. I think the
> expand_const_vector need some refactor up to a point.
I added the negative step check just some weeks ago and I'd see it as
simplification to remove the restriction again if you're touching the actual
step anyway. So I wo
...@gmail.com; jeffreya...@gmail.com; Robin
Dapp
Subject: Re: [PATCH v1] RISC-V: Fix bug for expand_const_vector interleave
[PR118931]
> This patch would like to perform the overflow to smode check before IOR
> the base2 series, and perform the clean highest bit if the const_vector
> overfl
> This patch would like to perform the overflow to smode check before IOR
> the base2 series, and perform the clean highest bit if the const_vector
> overflow to smode occurs. If no overflow, there will do nothing here.
I agree with the general idea but I'm a bit wary fiddling with the coefficien
