On Mon, Aug 12, 2024 at 3:10 PM kong lingling wrote:
>
> For APX instruction with an NDD, the destination GPR will get the
> instruction’s result in bits [OSIZE-1:0] and, if OSIZE < 64b, have its upper
> bits [63:OSIZE] zeroed. Now supporting other NDD instructions.
>
>
> Bootstrapped and regtes
Hi,
Gently ping.
Thanks,
Lingling
From: kong lingling
Sent: Monday, August 12, 2024 3:10 PM
To: gcc-patches@gcc.gnu.org
Cc: H. J. Lu ; Kong, Lingling ;
Liu, Hongtao
Subject: [PATCH 1/4] i386: Optimization for APX NDD is always zero-uppered for
ADD
For APX instruction with an NDD, the destin
