On Tue, May 21, 2019 at 12:03 AM Uros Bizjak wrote:
>
> On Mon, May 20, 2019 at 11:54 PM H.J. Lu wrote:
>
> > > > > Adjust gcc.target/i386/pr22076.c for 64-bit.
> > > > >
> > > > > * gcc.target/i386/pr22076.c: Adjusted for 64-bit.
> > > > Well, it looks like you're just papering over a code
On Mon, May 20, 2019 at 11:54 PM H.J. Lu wrote:
> > > > Adjust gcc.target/i386/pr22076.c for 64-bit.
> > > >
> > > > * gcc.target/i386/pr22076.c: Adjusted for 64-bit.
> > > Well, it looks like you're just papering over a code quality regression?
> > > Or am I missing something?
> >
> > We h
On Mon, May 20, 2019 at 03:54:49PM -0600, Jeff Law wrote:
> >>> Adjust gcc.target/i386/pr22076.c for 64-bit.
> >>>
> >>> * gcc.target/i386/pr22076.c: Adjusted for 64-bit.
> >> Well, it looks like you're just papering over a code quality regression?
> >> Or am I missing something?
> >
> > We
On Mon, May 20, 2019 at 2:52 PM Uros Bizjak wrote:
>
> On Mon, May 20, 2019 at 11:39 PM Jeff Law wrote:
> >
> > On 5/20/19 3:36 PM, H.J. Lu wrote:
> > > With SSE emulation of MMX intrinsics in 64-bit mode,
> > >
> > > ---
> > > __v8qi test ()
> > > {
> > > __v8qi mm0 = {1,2,3,4,5,6,7,8};
> > >
On 5/20/19 3:51 PM, Uros Bizjak wrote:
> On Mon, May 20, 2019 at 11:39 PM Jeff Law wrote:
>>
>> On 5/20/19 3:36 PM, H.J. Lu wrote:
>>> With SSE emulation of MMX intrinsics in 64-bit mode,
>>>
>>> ---
>>> __v8qi test ()
>>> {
>>> __v8qi mm0 = {1,2,3,4,5,6,7,8};
>>> __v8qi mm1 = {11,22,33,44,55,
"H.J. Lu" writes:
> With SSE emulation of MMX intrinsics in 64-bit mode,
>
> ---
> __v8qi test ()
> {
> __v8qi mm0 = {1,2,3,4,5,6,7,8};
> __v8qi mm1 = {11,22,33,44,55,66,77,88};
> volatile __m64 x;
>
> x = _mm_add_pi8 (mm0, mm1);
>
> return x;
> }
> ---
>
> is compiled into
>
> mo
On Mon, May 20, 2019 at 11:39 PM Jeff Law wrote:
>
> On 5/20/19 3:36 PM, H.J. Lu wrote:
> > With SSE emulation of MMX intrinsics in 64-bit mode,
> >
> > ---
> > __v8qi test ()
> > {
> > __v8qi mm0 = {1,2,3,4,5,6,7,8};
> > __v8qi mm1 = {11,22,33,44,55,66,77,88};
> > volatile __m64 x;
> >
> >
On 5/20/19 3:36 PM, H.J. Lu wrote:
> With SSE emulation of MMX intrinsics in 64-bit mode,
>
> ---
> __v8qi test ()
> {
> __v8qi mm0 = {1,2,3,4,5,6,7,8};
> __v8qi mm1 = {11,22,33,44,55,66,77,88};
> volatile __m64 x;
>
> x = _mm_add_pi8 (mm0, mm1);
>
> return x;
> }
> ---
>
> is compile
