Re: [PATCH] RISC-V modified add3 for large stack frame optimization [PR105733]

2022-09-20 Thread Kevin Lee
The proposed patch only makes the difference if the operand 1 is an eliminable register and operand 2 is a splittable const int. Otherwise, it follows the original add3 pattern. Besides the example from pr105733 shown on the first post, #define BUF_SIZE 5012 void saxpy( float a ) { volatile floa

Re: [PATCH] RISC-V modified add3 for large stack frame optimization [PR105733]

2022-09-19 Thread Kito Cheng via Gcc-patches
Could you provide some data including code size and performance? add is frequently used patten, so we should more careful when changing that. Kevin Lee 於 2022年9月19日 週一,18:07寫道: > Hello GCC, > Started from Jim Wilson's patch in > > https://github.com/riscv-admin/riscv-code-speed-optimization/blob