On 11/15/24 8:21 PM, Liao Shihua wrote:
RISC-V N32 ABI means using 32-bit ABI on 64-bit ISA, the discussion in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/381 .
At this moment, N32 is supported batemental toolchain.
Three OpenSource RTOS using this feature and have been merged i
This patch works fine with the rv64ilp32 Linux kernel self-building.
It is tested with binutils together.
Tested-by: Guo Ren
On Sat, Nov 16, 2024 at 12:22 PM Liao Shihua wrote:
>
> RISC-V N32 ABI means using 32-bit ABI on 64-bit ISA, the discussion in
> https://github.com/riscv-non-isa/riscv-e
