"juzhe.zh...@rivai.ai" writes:
> Yeah. I know.
> Like ARM does everywhere:
> (define_expand "vcond"
> [(set (match_operand:SVE_ALL 0 "register_operand")
> (if_then_else:SVE_ALL
> (match_operator 3 "comparison_operator"
> [(match_operand:SVE_I 4 "register_operand")
>(match_op
o Cheng
Date: 2023-05-23 16:45
To: juzhe.zh...@rivai.ai
CC: Robin Dapp; gcc-patches; Kito.cheng; palmer; palmer; jeffreyalaw
Subject: Re: Re: [PATCH] RISC-V: Refactor the framework of RVV
auto-vectorization
> ARM uses rtx operands[] in many places and I personally prefer this way since
> it will
> ARM uses rtx operands[] in many places and I personally prefer this way since
> it will make codes much cleaner.
> I dislike the way making the function argument with multiple operand ,like
> this:
> void func(rtx dest, rtx src1, rtx src2, )
> If we are doing this, we will need to add helper
many places and I personally prefer this way since
it will make codes much cleaner.
I dislike the way making the function argument with multiple operand ,like this:
void func(rtx dest, rtx src1, rtx src2, )
If we are doing this, we will need to add helpers forever...
Sending V2 patch soon
Hi Juzhe,
in general I find the revised structure quite logical and it is definitely
an improvement. Some abstraction are still a bit leaky but we can always
refactor "on the fly". Some comments on the general parts, skipping
over the later details.
> bool m_has_dest_p;
Why does a store not
