On Fri, 02 Sep 2022 18:28:10 PDT (-0700), Palmer Dabbelt wrote:
We don't yet support vectorization on RISC-V.
gcc/testsuite/ChangeLog
* gcc.dg/tree-ssa/gen-vect-34.c: Skip RISC-V targets.
---
gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
LGTM, Maybe we can try is after RVV supported.> We don't yet support
vectorization on RISC-V.
> > gcc/testsuite/ChangeLog> > * gcc.dg/tree-ssa/gen-vect-34.c: Skip RISC-V
> > targets.> ---> gcc/testsuite/gcc.dg/tree-ssa/gen-vect-34.c | 2 +-> 1 file
> > changed, 1 insertion(+), 1 deletion(-)> >