Hi Juzhe,
>>> Can you explain these two points (3 and 4, maybe 2) a bit in the comments?
>>> I.e. what makes fma different from a normal insn?
> You can take a lookt at vector.md. The ternary instruction pattern has
> operands[0] operands[1] operands[2] operands[3] operands[4] operands[5] :
>
>
ugh to review. After this patch is
merged,
I will post fms.
Thanks.
juzhe.zh...@rivai.ai
From: Robin Dapp
Date: 2023-05-26 18:16
To: juzhe.zhong; gcc-patches
CC: rdapp.gcc; kito.cheng; kito.cheng; palmer; palmer; jeffreyalaw; pan2.li
Subject: Re: [PATCH] RISC-V: Add RVV FMA auto-vectorization sup
Hi Juzhe,
> +;; We can't expand FMA for the following reasons:
But we do :) We just haven't selected the proper alternative yet.
> +;; 1. Before RA, we don't know which multiply-add instruction is the ideal
> one.
> +;;The vmacc is the ideal instruction when operands[3] overlaps
> operand
