RE: [PATCH] Fix PR rtl-optimization/65067

2015-03-06 Thread Bernd Edlinger
On Fri, 6 Mar 2015 10:52:53, Eric Botcazou wrote: > >> I know it because strict_volatile_bitfield_p checks this: >> /* Check for cases of unaligned fields that must be split. */ >> if (bitnum % BITS_PER_UNIT + bitsize> modesize >> >> Therefore, if bitsize == modesize, we know that bitnum % BITS_PER

Re: [PATCH] Fix PR rtl-optimization/65067

2015-03-06 Thread Eric Botcazou
> I know it because strict_volatile_bitfield_p checks this: >/* Check for cases of unaligned fields that must be split. */ >if (bitnum % BITS_PER_UNIT + bitsize> modesize > > Therefore, if bitsize == modesize, we know that bitnum % BITS_PER_UNIT > must be zero. Isn't that precisely the c

RE: [PATCH] Fix PR rtl-optimization/65067

2015-03-06 Thread Bernd Edlinger
Hi, On Fri, 6 Mar 2015 10:09:30, Eric Botcazou wrote: > >> Hmm. As you also modify the no-strict-volatile-bitfield path I'm not sure >> you don't regress the case where EP_insv can work on memory. I agree >> that simplifying the strict-volatile-bitfield path to extract the memory >> within strict-

Re: [PATCH] Fix PR rtl-optimization/65067

2015-03-06 Thread Eric Botcazou
> Hmm. As you also modify the no-strict-volatile-bitfield path I'm not sure > you don't regress the case where EP_insv can work on memory. I agree > that simplifying the strict-volatile-bitfield path to extract the memory > within strict-volatile-bitfield constraints to a reg and then using the >

Re: [PATCH] Fix PR rtl-optimization/65067

2015-03-05 Thread Richard Biener
On Thu, Mar 5, 2015 at 10:03 AM, Bernd Edlinger wrote: > Hi, > > On Thu, 5 Mar 2015 09:52:54, Richard Biener wrote: >> >> On Thu, Mar 5, 2015 at 8:10 AM, Bernd Edlinger >> wrote: >>> Hi, >>> >>> on ARM we have a code quality regression, because of the strict volatile >>> bitfields handing. The re

RE: [PATCH] Fix PR rtl-optimization/65067

2015-03-05 Thread Bernd Edlinger
Hi, On Thu, 5 Mar 2015 09:52:54, Richard Biener wrote: > > On Thu, Mar 5, 2015 at 8:10 AM, Bernd Edlinger > wrote: >> Hi, >> >> on ARM we have a code quality regression, because of the strict volatile >> bitfields handing. The reason is that the current implementation directly >> jumps to store_f

Re: [PATCH] Fix PR rtl-optimization/65067

2015-03-05 Thread Richard Biener
On Thu, Mar 5, 2015 at 8:10 AM, Bernd Edlinger wrote: > Hi, > > on ARM we have a code quality regression, because of the strict volatile > bitfields handing. The reason is that the current implementation directly > jumps to store_fixed_bit_field_1 which emits a sequence of and/or/shift > expressi