On Thu, 18 May 2023 at 16:37, Joern Rennecke wrote
in https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618928.html :
>
> This breaks building libstdc++-v3 for
> -march=rv32imafdcv_zicsr_zifencei_zba_zbb_zbc_zbs_zve32f_zve32x_zve64d_zve64f_zve64x_zvl128b_zvl32b_zvl64b
> -mabi=ilp32f .
Sorry, I f
On 5/17/23 10:02, Jivan Hakobyan via Gcc-patches wrote:
Subject:
[v2] RISC-V: Remove masking third operand of rotate instructions
From:
Jivan Hakobyan via Gcc-patches
Date:
5/17/23, 10:02
To:
gcc-patches@gcc.gnu.org
Rotate instructions do not need to mask the third operand.
For example
Rotate instructions do not need to mask the third operand.
For example, RV64 the following code:
unsigned long foo1(unsigned long rs1, unsigned long rs2)
{
long shamt = rs2 & (64 - 1);
return (rs1 << shamt) | (rs1 >> ((64 - shamt) & (64 - 1)));
}
Compiles to:
foo1:
andia1,a1,
On 5/10/23 09:50, Jivan Hakobyan via Gcc-patches wrote:
Subject:
RISC-V: Remove masking third operand of rotate instructions
From:
Jivan Hakobyan via Gcc-patches
Date:
5/10/23, 09:50
To:
gcc-patches@gcc.gnu.org
Rotate instructions do not need to mask the third operand.
For example RV64
Rotate instructions do not need to mask the third operand.
For example RV64 the following code:
unsigned long foo1(unsigned long rs1, unsigned long rs2)
{
long shamt = rs2 & (64 - 1);
return (rs1 << shamt) | (rs1 >> ((64 - shamt) & (64 - 1)));
}
Compiles to:
foo1:
andia1,a1,6
