Thanks for looking at this.
Bernd Schmidt writes:
> On 07/21/11 17:42, Richard Sandiford wrote:
>> /* When optimizing for speed, don't introduce dependencies between
>> memory references in the chain and memory references outside of it,
>> since doing so would limit schedu
On 07/21/11 17:42, Richard Sandiford wrote:
> At the moment, auto-inc-dec.c only considers pairs of instructions,
> so it can't optimise this kind of sequence. The attached patch is a
> WIP (but almost complete) attempt to handle longer sequences too.
So, I promised to look at it, I guess I bett
Bernd Schmidt writes:
> On 07/21/11 17:42, Richard Sandiford wrote:
>> Tested on arm-linux-gnueabi. Thoughts?
>
> I'll try to find some time to look at it a bit.
Thanks.
> One thing I've always
> wanted to do is move auto-inc-dec after reload, so that we can remove
> inc_for_reload - do you thi
On 07/21/11 17:42, Richard Sandiford wrote:
> Tested on arm-linux-gnueabi. Thoughts?
I'll try to find some time to look at it a bit. One thing I've always
wanted to do is move auto-inc-dec after reload, so that we can remove
inc_for_reload - do you think your new code could handle this?
Bernd
Many of the NEON load/store instructions only allow address of the form:
(reg rN)
(post_inc (reg rN))
(post_modify (reg rN) (reg rM))
with no reg+const alternative. If vectorised code has several
consecutive loads, it's often better to use a series of post_incs such as:
*r1++
