Georg-Johann Lay writes:
> There are occasions where knowledge about nonzero bits makes some
> optimizations possible. For example,
>
>Rd |= Rn << Off
>
> can be implemented as
>
>SBRC Rn, 0
>ORI Rd, 1 << Off
>
> when Rn in { 0, 1 }, i.e. nonzero_bits (Rn) == 1. This patch adds som
Georg-Johann Lay writes:
> For code in .initN and .finiN there are no calls, hence let the
> compiler add "used" attribute.
>
> Ok for trunk?
Ok.
Denis
>
> Johann
>
> --
>
> AVR: Add attribute "used" for code in .initN and .initN sections.
>
> Code in .initN and .initN sections is never called
On 3/21/25 2:59 PM, Georg-Johann Lay wrote:
There are occasions where knowledge about nonzero bits makes some
optimizations possible. For example,
Rd |= Rn << Off
can be implemented as
SBRC Rn, 0
ORI Rd, 1 << Off
when Rn in { 0, 1 }, i.e. nonzero_bits (Rn) == 1. This patch a
вт, 25 февр. 2025 г. в 20:23, Jakub Jelinek :
>
> Hi!
>
> As can be seen in gcc/po/gcc.pot:
> #: config/avr/avr.cc:2754
> #, c-format
> msgid "bad I/O address 0x"
> msgstr ""
>
> exgettext couldn't retrieve the whole format string in this case,
> because it uses a macro in the middle. output_opera
Georg-Johann Lay writes:
> This patch executes avr_builtin_supported_p at a later time and in
> avr_resolve_overloaded_builtin. This allows for better diagnostics
> and avoids lto1 hiccups when a built-in decl is NULL_TREE.
>
> Ok for trunk?
>
Ok.
Denis
Georg-Johann Lay writes:
> When REG_UNUSED notes indicate that some result bytes are not
> used by the following code, then there's no need to asm out them.
> The patch uses such notes for the asm out of AND, IOR, XOR, PLUS, MINUS.
>
> Passes without regressions. Ok for trunk?
Ok.
Please apply.
Georg-Johann Lay writes:
> This patch fixes an ICE on trunk, so I don't plan to backport.
>
> Ok for trunk?
Ok.
Denis
...plus, I updated the documentation: -mno-call-main
asserts that main() does not return.
Johann
index 0aef2abf05b..af41d7b9ad3 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24457,6 +24457,24 @@ Do not save registers in @code{main}. The
effect is the same like
attaching attr
Georg-Johann Lay writes:
> Some AVR devices support a Compact Vector Table.
>
> The support is provided by means of a startup code file
> crt-cvt.o from AVR-LibC that can be linked instead
> of the traditional crt.o.
>
> This patch adds a new command line option -mcvt that links
> that CVT startu
Georg-Johann Lay writes:
> This patch implements a more robust parsing of the
> AVR_MCU lines in genmultlib.awk.
>
> The generated t-multilib-avr is the same.
>
> Ok for trunk?
Ok.
Please apply.
Denis.
For easier review, I broke that patch into two parts:
One for the strlen built-ins, and one to handle built-ins
that are only available in C.
Delta is the same.
Johann
Am 30.01.25 um 11:42 schrieb Georg-Johann Lay:
AVR: Provide built-ins for strlen where the string lives in some AS.
This pa
ср, 22 янв. 2025 г. в 23:53, Georg-Johann Lay :
>
> As it turns out, logical 32-bit shifts with an offset of 25..30 can
> be performed in 7 instructions or less. This beats the 7 instruc-
> tions required for the default code of a shift loop.
> Plus, with zero overhead, these cases can be 3-operan
Georg-Johann Lay writes:
> u16 << 5 and u16 << 6 can be tweaked by using MUL instructions.
> Benefit is a better speed ratio with -Os and smaller size with -O2.
>
> No new regressions.
>
> Ok for trunk?
Ok. Please apply.
Denis.
Georg-Johann Lay writes:
> Most of the avr built-in functions can be attributed "const".
>
> Ok for trunk?
>
Ok.
Denis.
> Johann
>
> --
>
> AVR: Add "const" attribute to avr built-in functions if possible.
>
> gcc/
> * config/avr/avr-c.cc (DEF_BUILTIN): Add ATTRS argument to macro
>
чт, 16 янв. 2025 г. в 21:19, Georg-Johann Lay :
>
> This patch uses the INT_N interface to define __int24.
>
> Ok for trunk?
Ok.
Please apply.
Denis.
On 12/3/24 7:45 AM, Georg-Johann Lay wrote:
Am 03.12.24 um 15:36 schrieb Jeff Law:
On 12/3/24 3:57 AM, Georg-Johann Lay wrote:
This patch skips some tests that don't work on avr.
Ok for trunk?
Johann
--
AVR: Skip some test cases that don't work for it.
gcc/testsuite/
* gcc.c-tortu
ср, 11 дек. 2024 г. в 16:56, Georg-Johann Lay :
>
> This patch adds __flashx as a new named address space that allocates
> objects in .progmemx.data. The handling is mostly the same or similar
> to that of 24-bit space __memx, except that the output routines are
> simpler and more efficient. Load
сб, 7 дек. 2024 г. в 17:39, Georg-Johann Lay :
>
> ...the patch
>
> Am 07.12.24 um 14:36 schrieb Georg-Johann Lay:
> > This patch implements an alarm should we ever run out of
> > section flags bits.
> >
> > Ok for trunk?
Ok.
Denis
Am 07.12.24 um 02:03 schrieb Oleg Endo:
On Fri, 2024-12-06 at 16:51 +0100, Georg-Johann Lay wrote:
The CRC tables ARE put into .rodata, not into .data.
The correct question is: Why is avr putting .rodata into RAM?
Suppose the following C code:
char read_c (const char *p)
{
return p[1]
...the patch
Am 07.12.24 um 14:36 schrieb Georg-Johann Lay:
This patch implements an alarm should we ever run out of
section flags bits.
Ok for trunk?
Johann
--
AVR: Assert minimal required bit width of section_common::flags.
gcc/
* config/avr/avr.cc (avr_ctz): New constexpr function.
On Fri, 2024-12-06 at 16:51 +0100, Georg-Johann Lay wrote:
>
> The CRC tables ARE put into .rodata, not into .data.
>
> The correct question is: Why is avr putting .rodata into RAM?
>
> Suppose the following C code:
>
> char read_c (const char *p)
> {
> return p[1];
> }
>
> Where p may
Am 06.12.24 um 15:50 schrieb Oleg Endo:
On Fri, 2024-12-06 at 06:32 -0700, Jeff Law wrote:
On 12/6/24 5:23 AM, Sam James wrote:
Georg-Johann Lay writes:
This patch disables CRC lookup tables which consume quite some RAM.
Given that -foptimize-crc is new, it may be useful to CC the pass
au
On Fri, 2024-12-06 at 06:32 -0700, Jeff Law wrote:
>
> On 12/6/24 5:23 AM, Sam James wrote:
> > Georg-Johann Lay writes:
> >
> > > This patch disables CRC lookup tables which consume quite some RAM.
> >
> > Given that -foptimize-crc is new, it may be useful to CC the pass
> > authors in case th
Am 06.12.24 um 14:53 schrieb Richard Biener:
On Fri, Dec 6, 2024 at 2:17 PM Georg-Johann Lay wrote:
Am 06.12.24 um 13:23 schrieb Sam James:
Georg-Johann Lay writes:
This patch disables CRC lookup tables which consume quite some RAM.
Given that -foptimize-crc is new, it may be useful to C
Georg-Johann Lay writes:
> Am 06.12.24 um 13:23 schrieb Sam James:
>> Georg-Johann Lay writes:
>>
>>> This patch disables CRC lookup tables which consume quite some RAM.
>> Given that -foptimize-crc is new, it may be useful to CC the pass
>> authors in case they have input.
>
> CCing Mariam Aru
On Fri, Dec 6, 2024 at 2:17 PM Georg-Johann Lay wrote:
>
> Am 06.12.24 um 13:23 schrieb Sam James:
> > Georg-Johann Lay writes:
> >
> >> This patch disables CRC lookup tables which consume quite some RAM.
> >
> > Given that -foptimize-crc is new, it may be useful to CC the pass
> > authors in cas
On 12/6/24 5:23 AM, Sam James wrote:
Georg-Johann Lay writes:
This patch disables CRC lookup tables which consume quite some RAM.
Given that -foptimize-crc is new, it may be useful to CC the pass
authors in case they have input.
I think this is trivially OK for the AVR. The bigger questi
Am 06.12.24 um 13:23 schrieb Sam James:
Georg-Johann Lay writes:
This patch disables CRC lookup tables which consume quite some RAM.
Given that -foptimize-crc is new, it may be useful to CC the pass
authors in case they have input.
CCing Mariam Arutunian
Ok for trunk?
Johann
The probl
Georg-Johann Lay writes:
> This patch disables CRC lookup tables which consume quite some RAM.
Given that -foptimize-crc is new, it may be useful to CC the pass
authors in case they have input.
>
> Ok for trunk?
>
> Johann
чт, 5 дек. 2024 г. в 14:23, Georg-Johann Lay :
>
> This is an addendum to the -msplit-ldst patch.
>
> When -msplit-ldst is on, it may be possible to propagate __zero_reg__
> to the sources of the new stores. For example, without this patch,
>
> unsigned long lx;
>
> void store_lsr17 (void)
> {
>
ср, 4 дек. 2024 г. в 13:39, Georg-Johann Lay :
>
> This patch reworks patterns that add / subtract an (inverted) MSB.
> It handles more cases by using mode iterators.
>
> Ok for trunk?
>
Please apply.
Denis
чт, 5 дек. 2024 г. в 00:07, Georg-Johann Lay :
>
> In nonlocal_goto sets, change hard_frame_pointer_rtx only after
> emit_stack_restore() restored SP. This is needed because SP
> my be stored in some frame location.
>
> The only change to test results is that gcc.c-torture/execute/pr64242.c
> is p
ср, 4 дек. 2024 г. в 20:16, Georg-Johann Lay :
>
> This patch splits multi-byte loads and stores into single-byte
> ones provided:
>
> - New option -msplit-ldst is on (e.g. -O2 and higher), and
> - The memory is non-volatile, and
> - The address space is generic, and
> - The split addresses are
вт, 3 дек. 2024 г. в 17:32, Georg-Johann Lay :
>
> Some diagnostics are issues late, e.g. in avr_print_operand().
> This patch uses the insn's location as a proxy for the operand
> location. Without the patch, the location is usually input_location,
> which points to the closing } of the function
Am 03.12.24 um 15:36 schrieb Jeff Law:
On 12/3/24 3:57 AM, Georg-Johann Lay wrote:
This patch skips some tests that don't work on avr.
Ok for trunk?
Johann
--
AVR: Skip some test cases that don't work for it.
gcc/testsuite/
* gcc.c-torture/execute/ieee/cdivchkd.x: New file.
* gcc
On 12/3/24 3:57 AM, Georg-Johann Lay wrote:
This patch skips some tests that don't work on avr.
Ok for trunk?
Johann
--
AVR: Skip some test cases that don't work for it.
gcc/testsuite/
* gcc.c-torture/execute/ieee/cdivchkd.x: New file.
* gcc.c-torture/execute/ieee/cdivchkf.x: Ne
пн, 2 дек. 2024 г. в 15:29, Georg-Johann Lay :
>
> Logic 8-bit shifts with an offset of 6 can be improved by
> supporting them as 3-operand operations.
>
> Ok for trunk?
>
Ok. Please apply.
Denis.
On Sun, 1 Dec 2024, Georg-Johann Lay wrote:
> > > > As a matter of interest, is the timeout/memory exhaustion observed with
> > > > host compilation or target execution?
> > > It happens during link, when the linker observes that the memory regions
> > > won't fit:
> > >
> > > .../avr/bin/ld: mem
Am 01.12.24 um 19:15 schrieb Dimitar Dimitrov:
On Sun, Dec 01, 2024 at 12:32:55PM +0100, Georg-Johann Lay wrote:
Am 01.12.24 um 05:45 schrieb Maciej W. Rozycki:
On Sat, 30 Nov 2024, Georg-Johann Lay wrote:
The gcc.c-torture/execute/memcpy-a[1248].c tests consumed more time
than the whole rest
On Sun, Dec 01, 2024 at 12:32:55PM +0100, Georg-Johann Lay wrote:
> Am 01.12.24 um 05:45 schrieb Maciej W. Rozycki:
> > On Sat, 30 Nov 2024, Georg-Johann Lay wrote:
> >
> > > The gcc.c-torture/execute/memcpy-a[1248].c tests consumed more time
> > > than the whole rest of the test suite, just to co
Am 01.12.24 um 05:45 schrieb Maciej W. Rozycki:
On Sat, 30 Nov 2024, Georg-Johann Lay wrote:
The gcc.c-torture/execute/memcpy-a[1248].c tests consumed more time
than the whole rest of the test suite, just to come up with
a "memory full" even at -Os. Skipped thusly.
As a matter of interest, i
On Sat, 30 Nov 2024, Georg-Johann Lay wrote:
> The gcc.c-torture/execute/memcpy-a[1248].c tests consumed more time
> than the whole rest of the test suite, just to come up with
> a "memory full" even at -Os. Skipped thusly.
As a matter of interest, is the timeout/memory exhaustion observed with
пт, 29 нояб. 2024 г. в 21:07, Georg-Johann Lay :
>
> This patch splits 2-byte and 3-byte shifts after reload into
> a 3-operand byte shift and a residual 2-operand shift.
>
> The "2op" shift insn alternatives are not needed and removed because
> all shift insn already have a "r,0,n" alternative tha
пт, 29 нояб. 2024 г. в 21:33, Georg-Johann Lay :
>
> This patch fixes a build warning for libgcc/unwind-sjlj.c
> which used word_mode for _Unwind_Word but should use Pmode.
>
> Ok for trunk?
Ok.
Please apply.
Denis.
>
> Johann
>
> --
>
> AVR: target/117681 - Set UNWIND_WORD_MODE to Pmode.
>
> Th
On Mon, 18 Nov 2024, Georg-Johann Lay wrote:
>> We also have
>>
>>AVR
>>Manufacturer: Atmel
>>>
>> href="https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/avr-mcus";>AVR
>>documentation
>>
>>
>> in https://gcc.gnu.org/readings.html .
чт, 21 нояб. 2024 г. в 20:39, Georg-Johann Lay :
>
> This is a no-op refactoring that uses a prefix of avropt_
> (formerly: avr_) for variables defined qua Var() directives
> in avr.opt. This makes it easier to spot values that come directly
> from avr.opt in the rest of the backend.
>
> Ok for tr
пт, 22 нояб. 2024 г. в 17:12, Georg-Johann Lay :
>
> This patch is similar to https://gcc.gnu.org/r15-5569 (tweak ashift:SI)
> but for
> ashiftrt and lshiftrt codes. It splits constant shift offsets > 16
> into a 3-operand byte shift and a 2-operand residual bit shift.
> Moreover, some of the
чт, 21 нояб. 2024 г. в 18:08, Georg-Johann Lay :
>
> This patch improves the 4-byte ASHIFT insns.
> 1) It adds a "r,r,C15" alternative for improved long << 15.
> 2) It adds 3-operand alternatives (depending on options) and
> splits them after peephole2 / before avr-fuse-move into
> a 3-oper
../../gcc/config/avr/avr-passes.cc: In member function ‘void
{anonymous}::memento_t::apply_insn1(rtx_insn*, bool)’:
../../gcc/config/avr/avr-passes.cc:2119:9: error: no match for ‘operator&=’
(operand types are ‘{anonymous}::gprmask_t’ {aka ‘unsigned int’} and
‘HARD_REG_SET’)
2119 | known &=
Am 18.11.24 um 09:03 schrieb Georg-Johann Lay:
Am 16.11.24 um 13:19 schrieb Gerald Pfeifer:
On Mon, 2 Sep 2024, Georg-Johann Lay wrote:
Atmel is no more the AVR manufacturer. This patch removes the
manufacturer from the file headers.
We also have
AVR
Manufacturer: Atmel
href="https
вт, 19 нояб. 2024 г. в 21:22, Georg-Johann Lay :
>
> This patch calculates more accurate shift costs, but makes
> the costs for larger offsets no more expensive than the costs
> for an unrolled shift.
>
> Ok for trunk?
Ok. Please apply.
Denis.
вт, 19 нояб. 2024 г. в 15:32, Georg-Johann Lay :
>
> This patch adds 3-operand alternatives to the shift insns for
> offsets that are one less than the bit-size of the mode.
> For example, ashrhi3 can support "r,r,C15" without overhead.
> Apart from that, the asm out functions for the shifts now us
вт, 19 нояб. 2024 г. в 17:21, Georg-Johann Lay :
>
> Now that the C default is C23, we can use bool in avr.h
> (which is still used in libgcc via tm.h).
> bool is a keyword in C23, so no stdbool.h is required in libgcc.
>
> No regressions. Ok for trunk?
Ok.
Please apply.
Denis.
Am 19.11.24 um 13:31 schrieb Andreas Schwab:
../../gcc/config/avr/avr-passes.cc: In member function ‘void
{anonymous}::memento_t::apply_insn1(rtx_insn*, bool)’:
../../gcc/config/avr/avr-passes.cc:2119:9: error: no match for ‘operator&=’
(operand types are ‘{anonymous}::gprmask_t’ {aka ‘unsigned
вс, 17 нояб. 2024 г. в 21:23, Georg-Johann Lay :
>
> Am 17.11.24 um 17:01 schrieb Denis Chertykov:
> > вс, 17 нояб. 2024 г. в 18:42, Georg-Johann Lay :
> >>
> >> This introduces a new post reload pass that tracks known values held
> >> in registers and performs optimizations based on that knowledge
Am 16.11.24 um 13:19 schrieb Gerald Pfeifer:
On Mon, 2 Sep 2024, Georg-Johann Lay wrote:
Atmel is no more the AVR manufacturer. This patch removes the
manufacturer from the file headers.
We also have
AVR
Manufacturer: Atmel
https://www.microchip.com/en-us/products/microcontroller
On 16.11.2024 13:19, Gerald Pfeifer wrote:
[...]
How should that be changed? (Simply drop the Atmel line?)
I am not sure what you mean, but I think "Atmel" should be replaced with
"Microchip" because other devices have manufacturers listed.
https://www.microchip.com/pdf/mchp_to_acquire_atmel.p
Am 17.11.24 um 15:42 schrieb Georg-Johann Lay:
Here are some examples:
Here are the examples again, but unTABified for legibility:
Without optimization | With optimization
| =
long long fn_zero (void)
{
retur
вс, 17 нояб. 2024 г. в 18:42, Georg-Johann Lay :
>
> This introduces a new post reload pass that tracks known values held
> in registers and performs optimizations based on that knowledge.
>
> It runs between the two instances of the RTL peephole pass.
[...]
> (Memento, AbsInt, AbsInsByte,
сб, 16 нояб. 2024 г. в 18:01, Georg-Johann Lay :
>
> Some passes like CSE kick-up when they see a (clobber (match_dup)) in an
> insn pattern, like it is the case for avr.md's *tablejump.
>
> This patch uses a new "scratch_operand" instead. As the clobbered
> entity is known, the casesi expander n
On Mon, 2 Sep 2024, Georg-Johann Lay wrote:
> Atmel is no more the AVR manufacturer. This patch removes the
> manufacturer from the file headers.
We also have
AVR
Manufacturer: Atmel
https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/8-bit-mcus/avr-mcus";>AVR
do
сб, 9 нояб. 2024 г. в 15:51, Georg-Johann Lay :
>
> This patch avoids an internal compiler error when a %i gets an operand
> that's not valid for %i. It uses output_operand_lossage that outputs
> an ordinary error.
>
> Ok to apply?
Ok, please apply.
Denis.
>
> Johann
>
> --
>
> AVR: target/11750
ср, 6 нояб. 2024 г. в 12:58, Georg-Johann Lay :
>
> For operations like X o= CST, regalloc may spill l-reg X to a d-reg:
> D = X
> D o= CST
> X = D
> where it is better to instead
> D = CST
> X o= D
> This patch adds an according RTL peephole.
>
> Ok for trunk?
Please apply
вт, 22 окт. 2024 г. в 14:19, Georg-Johann Lay :
>
> This patch is a 2nd take on fixing PR116953:
>
> The output function for avr_out_sbxx_branch() runs
> jump_over_one_insn_p() which calls extract for the next insn, which
> clobbers recog_data. The previous fix makes local copy of the input
> oper
чт, 3 окт. 2024 г. в 12:19, Georg-Johann Lay :
>
> avr_out_sbxx_branch calls jump_over_one_insn_p which may clobber
> recog_data.operand as is calls extract on the next insn.
>
> A fix is to make a copy of avr_out_sbxx_branch`s incoming operands.
>
> Ok to apply?
Ok.
Please apply.
Denis.
>
> Joh
Am 04.10.24 um 16:32 schrieb Jakub Jelinek:
On Fri, Oct 04, 2024 at 08:09:48AM -0600, Jeff Law wrote:
On 10/4/24 7:46 AM, Georg-Johann Lay wrote:
This patch implements TARGET_FLOATN_MODE which maps
_Float32[x] to SFmode and _Float64[x] to DFmode.
There is currently no library support for ext
On Fri, Oct 04, 2024 at 08:09:48AM -0600, Jeff Law wrote:
>
>
> On 10/4/24 7:46 AM, Georg-Johann Lay wrote:
> > This patch implements TARGET_FLOATN_MODE which maps
> > _Float32[x] to SFmode and _Float64[x] to DFmode.
> >
> > There is currently no library support for extended float types,
> > but
On 10/4/24 7:46 AM, Georg-Johann Lay wrote:
This patch implements TARGET_FLOATN_MODE which maps
_Float32[x] to SFmode and _Float64[x] to DFmode.
There is currently no library support for extended float types,
but these settings are more reasonable for avr (and they make
more tests pass).
Ok
On 9/17/24 4:44 AM, Georg-Johann Lay wrote:
This patch updates more web links from nongnu to Github.
The http://www.nongnu.org/avr links still worked, but the
"super project" seems to be deserted. Instead, it now links:
* https://avrdudes.github.io/avr-libc/avr-libc-user-manual/
install_too
On 9/10/24 9:59 AM, Georg-Johann Lay wrote:
The order in which multi-byte EQ and NE comparisons are performing
the byte comparisons does not matter, and there are situations where
using SBIW on the high word can save an instruction.
This is for trunk.
Johann
--
AVR: Tweak 32-bit EQ and NE
пн, 16 сент. 2024 г. в 19:45, Georg-Johann Lay :
>
> AVR-LibC has been moved to GitHub a while ago. This patch
> adjusts web links to the documentation and to the project
> page.
>
> Ok for trunk?
Please apply.
Denis.
>
> Johann
>
> --
>
> AVR: Update weblinks to AVR-LibC.
>
> AVR-LibC has move
Am 16.09.24 um 13:04 schrieb Denis Chertykov:
вс, 15 сент. 2024 г. в 19:32, Georg-Johann Lay :
Unsigned comparisons may skip comparing the lower bytes when
the according bytes of the constant are all zeros. For example,
uint16 >= 0x1200
is true iff
hi8 (uint16) >= hi8 (0x1200)
вс, 15 сент. 2024 г. в 19:32, Georg-Johann Lay :
>
> Unsigned comparisons may skip comparing the lower bytes when
> the according bytes of the constant are all zeros. For example,
>
> uint16 >= 0x1200
>
> is true iff
>
> hi8 (uint16) >= hi8 (0x1200)
>
> and similar for uint16 < 0x1200.
сб, 14 сент. 2024 г. в 14:29, Georg-Johann Lay :
>
> This patch tidies up enum and struct tags that are
> not required in C++. It also uses rtx_code for
> RTX codes instead of RTX_CODE. RTX_CODE is now only
> used in #ifdef's in avr-protos.h.
>
> Ok for trunk?
Ok.
Please apply.
Denis.
>
> Joha
сб, 14 сент. 2024 г. в 13:00, Georg-Johann Lay :
>
> This uses new rtx code copysign instead of an unspec.
> It also allows const_double as 2nd operand because gcc
> does not optimize code like
>
> __builtin_copysignf (x, -1.0f);
>
> Ok for trunk?
Ok. Please apply.
Denis.
>
> Johann
>
> --
>
>
пт, 13 сент. 2024 г. в 20:41, Georg-Johann Lay :
>
> The transparent call insns like "*parityhi2.libgcc" output a single
> [R]CALL instruction that can be skipped by the skip instructions.
> Such insns have attribute "type" of "xcall" and can therefore
> be easily recognized.
>
> Ok for trunk?
Ple
пт, 13 сент. 2024 г. в 15:08, Georg-Johann Lay :
>
> This is a no-op change that uses the recently added avr_byte()
> function instead of simplify_gen_subreg (QImode, ...
>
> Ok for trunk?
Ok.
Please, apply.
Denis
>
> Johann
>
> --
>
> AVR: Use avr_byte instead of simplify_gen_subreg (QImod
чт, 12 сент. 2024 г. в 17:32, Georg-Johann Lay :
>
> This patch reworks avr_out_compare:
>
> Use new convenient helper functions that may be useful in
> other output functions, too.
>
> Generalized some special cases that only work for EQ and NE
> comparisons. For example, with the patch
>
> ;; R2
пн, 2 сент. 2024 г. в 12:10, Georg-Johann Lay :
>
> Am 02.09.24 um 09:18 schrieb Jan Dubiec:
> > On 02.09.2024 08:49, Georg-Johann Lay wrote:
> >> Atmel is no more the AVR manufacturer. This patch removes the
> >> manufacturer from the file headers.
> >>
> >> Ok for trunk?
> > In this context, mic
пт, 30 авг. 2024 г. в 16:09, Georg-Johann Lay :
>
> There are cases, where opportunities to use POST_INC addressing
> only occur very late in the compilation process. Take for example
> the following function from AVR-LibC's qsort:
>
> void swapfunc (char *a, char *b, int n)
> {
> do
> {
Am 30.08.24 um 15:31 schrieb Richard Biener:
On Fri, Aug 30, 2024 at 3:28 PM Georg-Johann Lay wrote:
Am 30.08.24 um 14:46 schrieb Richard Biener:
On Fri, Aug 30, 2024 at 2:10 PM Georg-Johann Lay wrote:
There are cases, where opportunities to use POST_INC addressing
only occur very late in
On Fri, Aug 30, 2024 at 3:28 PM Georg-Johann Lay wrote:
>
> Am 30.08.24 um 14:46 schrieb Richard Biener:
> > On Fri, Aug 30, 2024 at 2:10 PM Georg-Johann Lay wrote:
> >>
> >> There are cases, where opportunities to use POST_INC addressing
> >> only occur very late in the compilation process. Tak
Am 30.08.24 um 14:46 schrieb Richard Biener:
On Fri, Aug 30, 2024 at 2:10 PM Georg-Johann Lay wrote:
There are cases, where opportunities to use POST_INC addressing
only occur very late in the compilation process. Take for example
the following function from AVR-LibC's qsort:
void swapfunc (
On Fri, Aug 30, 2024 at 2:10 PM Georg-Johann Lay wrote:
>
> There are cases, where opportunities to use POST_INC addressing
> only occur very late in the compilation process. Take for example
> the following function from AVR-LibC's qsort:
>
> void swapfunc (char *a, char *b, int n)
> {
> do
чт, 29 авг. 2024 г. в 12:22, Georg-Johann Lay :
> This patch adds a new C++ module avr-passes.cc for the avr-specific
> passes.
>
> There are currently 5 avr-specific passes, and since avr.cc has
> gotten fat, this patch moves the respective classes and support
> functions to avr-passes.cc.
>
> Co
On Tue, Aug 27, 2024 at 7:53 PM Georg-Johann Lay wrote:
>
> Am 27.08.24 um 17:28 schrieb Jeff Law:
> >
> > On 8/26/24 1:15 PM, Georg-Johann Lay wrote:
> >
> >> What the avr-ifelse pass does is try to replace 2 cbranch insns with
> >> one compare insn and two branches. It runs after reload and jus
Am 27.08.24 um 17:28 schrieb Jeff Law:
On 8/26/24 1:15 PM, Georg-Johann Lay wrote:
What the avr-ifelse pass does is try to replace 2 cbranch insns with
one compare insn and two branches. It runs after reload and just prior
to .split2 (split_after_reload). It must run after reload because
REG
On 8/26/24 1:15 PM, Georg-Johann Lay wrote:
What the avr-ifelse pass does is try to replace 2 cbranch insns with
one compare insn and two branches. It runs after reload and just prior
to .split2 (split_after_reload). It must run after reload because
REG_CC comes into existence in .split2.
Am 25.08.24 um 18:15 schrieb Denis Chertykov:
Starting to review the patch...
Denis
Great to see you back!
Prior to commenting on the attached new versions of
the overhaul, let me answer Jeff's questions from the
other mail:
On 8/23/24 6:16 AM, Georg-Johann Lay wrote:
This patch overhauls
вс, 25 авг. 2024 г. в 20:15, Denis Chertykov :
>
>
>
> вс, 25 авг. 2024 г. в 17:55, Jeff Law :
>>
>>
>>
>> On 8/23/24 6:20 AM, Richard Biener wrote:
>> > On Fri, Aug 23, 2024 at 2:16 PM Georg-Johann Lay wrote:
>> >>
>> >> This patch overhauls the avr-ifelse mini-pass that optimizes
>> >> two cbran
вс, 25 авг. 2024 г. в 17:55, Jeff Law :
>
>
> On 8/23/24 6:20 AM, Richard Biener wrote:
> > On Fri, Aug 23, 2024 at 2:16 PM Georg-Johann Lay wrote:
> >>
> >> This patch overhauls the avr-ifelse mini-pass that optimizes
> >> two cbranch insns to one comparison and two branches.
> >>
> >> More opti
On 8/23/24 6:16 AM, Georg-Johann Lay wrote:
This patch overhauls the avr-ifelse mini-pass that optimizes
two cbranch insns to one comparison and two branches.
More optimization opportunities are realized, and the code
has been refactored.
No new regressions. Ok for trunk?
There is currentl
On 8/23/24 6:20 AM, Richard Biener wrote:
On Fri, Aug 23, 2024 at 2:16 PM Georg-Johann Lay wrote:
This patch overhauls the avr-ifelse mini-pass that optimizes
two cbranch insns to one comparison and two branches.
More optimization opportunities are realized, and the code
has been refactore
On Fri, Aug 23, 2024 at 2:16 PM Georg-Johann Lay wrote:
>
> This patch overhauls the avr-ifelse mini-pass that optimizes
> two cbranch insns to one comparison and two branches.
>
> More optimization opportunities are realized, and the code
> has been refactored.
>
> No new regressions. Ok for tru
Am 10.07.24 um 01:17 schrieb Jeff Law:
On 7/9/24 4:03 AM, Georg-Johann Lay wrote:
Hi Jeff,
This patch adds peephole2s and insns to make better use of
instructions that set condition code (SREG) as a byproduct.
Of course with cc0 all this was *much* simpler... so here we go;
adding CCNmode and
Applied with the addendum below.
Am 23.07.24 um 22:19 schrieb Georg-Johann Lay:
This patch adds support for arguments to the signal and interrupt
function attributes. It allows to specify the ISR by means of the
associated IRQ number, in extension to the current attributes that
require to speci
On 7/23/24 2:19 PM, Georg-Johann Lay wrote:
This patch adds support for arguments to the signal and interrupt
function attributes. It allows to specify the ISR by means of the
associated IRQ number, in extension to the current attributes that
require to specify the ISR name like "__vector_1"
On 7/20/24 11:27 AM, Georg-Johann Lay wrote:
Hi Jeff,
at least combiner patterns won't work. For something like
var |= 1 << (off & 7)
insn combine is just getting lost; it tries expressions with
MEM, IOR, even PARALLELs, but nothing that's close to a rotation.
Also it doesn't break out m
Am 19.07.24 um 16:56 schrieb Jeff Law:
On 7/18/24 3:12 PM, Georg-Johann Lay wrote:
This new builtin provides a faster way to compute
expressions like 1 << x or ~(1 << x) that are sometimes
used as masks for setting bits in the I/O region, and when
x is not known at compile-time.
The open code
On 7/18/24 3:12 PM, Georg-Johann Lay wrote:
This new builtin provides a faster way to compute
expressions like 1 << x or ~(1 << x) that are sometimes
used as masks for setting bits in the I/O region, and when
x is not known at compile-time.
The open coded C expression takes 5 + 4 * x cycles
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