On Mon, Apr 14, 2014 at 6:13 PM, Terry Guo wrote:
> On Thu, Apr 3, 2014 at 10:11 PM, Eric Botcazou wrote:
>>> I find the GCC function simplify_subreg fails to simplify rtx (subreg:SI
>>> (and:DI (reg/v:DI 115 [ a ]) (const_int 4294967295 [0x])) 4) to zero
>>> during the fwprop1 pass, cons
On Thu, Apr 3, 2014 at 10:11 PM, Eric Botcazou wrote:
>> I find the GCC function simplify_subreg fails to simplify rtx (subreg:SI
>> (and:DI (reg/v:DI 115 [ a ]) (const_int 4294967295 [0x])) 4) to zero
>> during the fwprop1 pass, considering the fact that the high 32-bit part of
>> (a & 0x
> I find the GCC function simplify_subreg fails to simplify rtx (subreg:SI
> (and:DI (reg/v:DI 115 [ a ]) (const_int 4294967295 [0x])) 4) to zero
> during the fwprop1 pass, considering the fact that the high 32-bit part of
> (a & 0x) is zero. This leads to some unnecessary multiplic
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Terry Guo
> Sent: Friday, March 28, 2014 3:48 PM
> To: gcc-patches@gcc.gnu.org
> Subject: [Patch]Simplify SUBREG with operand whose target bits are cleared
> by AND operation